2ac4c5f4d2
It is never supposed to fail and cannot return an error, so just have it return the proper type. Have it return 0xff on nothing available, since that's what would happen on a real bus. Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com>
128 lines
3.2 KiB
C
128 lines
3.2 KiB
C
/* A simple I2C slave for returning monitor EDID data via DDC.
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*
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* Copyright (c) 2011 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "qemu/log.h"
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#include "hw/i2c/i2c.h"
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#include "hw/i2c/i2c-ddc.h"
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#ifndef DEBUG_I2CDDC
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#define DEBUG_I2CDDC 0
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#endif
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#define DPRINTF(fmt, ...) do { \
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if (DEBUG_I2CDDC) { \
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qemu_log("i2c-ddc: " fmt , ## __VA_ARGS__); \
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} \
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} while (0)
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static void i2c_ddc_reset(DeviceState *ds)
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{
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I2CDDCState *s = I2CDDC(ds);
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s->firstbyte = false;
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s->reg = 0;
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}
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static int i2c_ddc_event(I2CSlave *i2c, enum i2c_event event)
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{
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I2CDDCState *s = I2CDDC(i2c);
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if (event == I2C_START_SEND) {
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s->firstbyte = true;
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}
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return 0;
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}
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static uint8_t i2c_ddc_rx(I2CSlave *i2c)
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{
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I2CDDCState *s = I2CDDC(i2c);
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int value;
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value = s->edid_blob[s->reg % sizeof(s->edid_blob)];
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s->reg++;
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return value;
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}
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static int i2c_ddc_tx(I2CSlave *i2c, uint8_t data)
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{
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I2CDDCState *s = I2CDDC(i2c);
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if (s->firstbyte) {
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s->reg = data;
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s->firstbyte = false;
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DPRINTF("[EDID] Written new pointer: %u\n", data);
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return 0;
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}
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/* Ignore all writes */
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s->reg++;
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return 0;
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}
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static void i2c_ddc_init(Object *obj)
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{
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I2CDDCState *s = I2CDDC(obj);
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qemu_edid_generate(s->edid_blob, sizeof(s->edid_blob), &s->edid_info);
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}
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static const VMStateDescription vmstate_i2c_ddc = {
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.name = TYPE_I2CDDC,
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.version_id = 1,
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.fields = (VMStateField[]) {
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VMSTATE_BOOL(firstbyte, I2CDDCState),
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VMSTATE_UINT8(reg, I2CDDCState),
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VMSTATE_END_OF_LIST()
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}
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};
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static Property i2c_ddc_properties[] = {
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DEFINE_EDID_PROPERTIES(I2CDDCState, edid_info),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void i2c_ddc_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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I2CSlaveClass *isc = I2C_SLAVE_CLASS(oc);
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dc->reset = i2c_ddc_reset;
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dc->vmsd = &vmstate_i2c_ddc;
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dc->props = i2c_ddc_properties;
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isc->event = i2c_ddc_event;
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isc->recv = i2c_ddc_rx;
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isc->send = i2c_ddc_tx;
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}
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static TypeInfo i2c_ddc_info = {
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.name = TYPE_I2CDDC,
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.parent = TYPE_I2C_SLAVE,
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.instance_size = sizeof(I2CDDCState),
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.instance_init = i2c_ddc_init,
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.class_init = i2c_ddc_class_init
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};
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static void ddc_register_devices(void)
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{
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type_register_static(&i2c_ddc_info);
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}
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type_init(ddc_register_devices);
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