Signed-off-by: Andrew Baumann <Andrew.Baumann@microsoft.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 1457467526-8840-2-git-send-email-Andrew.Baumann@microsoft.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
222 lines
7.9 KiB
C
222 lines
7.9 KiB
C
/*
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* Raspberry Pi emulation (c) 2012 Gregory Estrade
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* Upstreaming code cleanup [including bcm2835_*] (c) 2013 Jan Petrous
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*
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* Rasperry Pi 2 emulation and refactoring Copyright (c) 2015, Microsoft
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* Written by Andrew Baumann
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*
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* This code is licensed under the GNU GPLv2 and later.
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*/
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#include "qemu/osdep.h"
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#include "hw/arm/bcm2835_peripherals.h"
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#include "hw/misc/bcm2835_mbox_defs.h"
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#include "hw/arm/raspi_platform.h"
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/* Peripheral base address on the VC (GPU) system bus */
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#define BCM2835_VC_PERI_BASE 0x7e000000
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/* Capabilities for SD controller: no DMA, high-speed, default clocks etc. */
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#define BCM2835_SDHC_CAPAREG 0x52034b4
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static void bcm2835_peripherals_init(Object *obj)
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{
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BCM2835PeripheralState *s = BCM2835_PERIPHERALS(obj);
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/* Memory region for peripheral devices, which we export to our parent */
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memory_region_init(&s->peri_mr, obj,"bcm2835-peripherals", 0x1000000);
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object_property_add_child(obj, "peripheral-io", OBJECT(&s->peri_mr), NULL);
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sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr);
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/* Internal memory region for peripheral bus addresses (not exported) */
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memory_region_init(&s->gpu_bus_mr, obj, "bcm2835-gpu", (uint64_t)1 << 32);
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object_property_add_child(obj, "gpu-bus", OBJECT(&s->gpu_bus_mr), NULL);
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/* Internal memory region for request/response communication with
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* mailbox-addressable peripherals (not exported)
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*/
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memory_region_init(&s->mbox_mr, obj, "bcm2835-mbox",
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MBOX_CHAN_COUNT << MBOX_AS_CHAN_SHIFT);
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/* Interrupt Controller */
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object_initialize(&s->ic, sizeof(s->ic), TYPE_BCM2835_IC);
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object_property_add_child(obj, "ic", OBJECT(&s->ic), NULL);
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qdev_set_parent_bus(DEVICE(&s->ic), sysbus_get_default());
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/* UART0 */
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s->uart0 = SYS_BUS_DEVICE(object_new("pl011"));
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object_property_add_child(obj, "uart0", OBJECT(s->uart0), NULL);
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qdev_set_parent_bus(DEVICE(s->uart0), sysbus_get_default());
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/* Mailboxes */
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object_initialize(&s->mboxes, sizeof(s->mboxes), TYPE_BCM2835_MBOX);
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object_property_add_child(obj, "mbox", OBJECT(&s->mboxes), NULL);
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qdev_set_parent_bus(DEVICE(&s->mboxes), sysbus_get_default());
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object_property_add_const_link(OBJECT(&s->mboxes), "mbox-mr",
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OBJECT(&s->mbox_mr), &error_abort);
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/* Property channel */
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object_initialize(&s->property, sizeof(s->property), TYPE_BCM2835_PROPERTY);
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object_property_add_child(obj, "property", OBJECT(&s->property), NULL);
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object_property_add_alias(obj, "board-rev", OBJECT(&s->property),
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"board-rev", &error_abort);
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qdev_set_parent_bus(DEVICE(&s->property), sysbus_get_default());
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object_property_add_const_link(OBJECT(&s->property), "dma-mr",
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OBJECT(&s->gpu_bus_mr), &error_abort);
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/* Extended Mass Media Controller */
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object_initialize(&s->sdhci, sizeof(s->sdhci), TYPE_SYSBUS_SDHCI);
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object_property_add_child(obj, "sdhci", OBJECT(&s->sdhci), NULL);
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qdev_set_parent_bus(DEVICE(&s->sdhci), sysbus_get_default());
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}
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static void bcm2835_peripherals_realize(DeviceState *dev, Error **errp)
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{
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BCM2835PeripheralState *s = BCM2835_PERIPHERALS(dev);
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Object *obj;
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MemoryRegion *ram;
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Error *err = NULL;
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uint32_t ram_size;
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int n;
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obj = object_property_get_link(OBJECT(dev), "ram", &err);
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if (obj == NULL) {
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error_setg(errp, "%s: required ram link not found: %s",
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__func__, error_get_pretty(err));
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return;
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}
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ram = MEMORY_REGION(obj);
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ram_size = memory_region_size(ram);
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/* Map peripherals and RAM into the GPU address space. */
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memory_region_init_alias(&s->peri_mr_alias, OBJECT(s),
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"bcm2835-peripherals", &s->peri_mr, 0,
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memory_region_size(&s->peri_mr));
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memory_region_add_subregion_overlap(&s->gpu_bus_mr, BCM2835_VC_PERI_BASE,
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&s->peri_mr_alias, 1);
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/* RAM is aliased four times (different cache configurations) on the GPU */
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for (n = 0; n < 4; n++) {
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memory_region_init_alias(&s->ram_alias[n], OBJECT(s),
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"bcm2835-gpu-ram-alias[*]", ram, 0, ram_size);
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memory_region_add_subregion_overlap(&s->gpu_bus_mr, (hwaddr)n << 30,
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&s->ram_alias[n], 0);
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}
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/* Interrupt Controller */
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object_property_set_bool(OBJECT(&s->ic), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->peri_mr, ARMCTRL_IC_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->ic), 0));
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sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic));
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/* UART0 */
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object_property_set_bool(OBJECT(s->uart0), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->peri_mr, UART0_OFFSET,
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sysbus_mmio_get_region(s->uart0, 0));
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sysbus_connect_irq(s->uart0, 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_UART));
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/* Mailboxes */
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object_property_set_bool(OBJECT(&s->mboxes), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->peri_mr, ARMCTRL_0_SBM_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->mboxes), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->mboxes), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_ARM_IRQ,
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INTERRUPT_ARM_MAILBOX));
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/* Property channel */
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object_property_set_int(OBJECT(&s->property), ram_size, "ram-size", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_bool(OBJECT(&s->property), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->mbox_mr,
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MBOX_CHAN_PROPERTY << MBOX_AS_CHAN_SHIFT,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->property), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->property), 0,
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qdev_get_gpio_in(DEVICE(&s->mboxes), MBOX_CHAN_PROPERTY));
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/* Extended Mass Media Controller */
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object_property_set_int(OBJECT(&s->sdhci), BCM2835_SDHC_CAPAREG, "capareg",
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&err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_bool(OBJECT(&s->sdhci), true, "pending-insert-quirk",
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&err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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object_property_set_bool(OBJECT(&s->sdhci), true, "realized", &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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memory_region_add_subregion(&s->peri_mr, EMMC_OFFSET,
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sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->sdhci), 0));
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sysbus_connect_irq(SYS_BUS_DEVICE(&s->sdhci), 0,
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qdev_get_gpio_in_named(DEVICE(&s->ic), BCM2835_IC_GPU_IRQ,
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INTERRUPT_ARASANSDIO));
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object_property_add_alias(OBJECT(s), "sd-bus", OBJECT(&s->sdhci), "sd-bus",
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&err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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}
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static void bcm2835_peripherals_class_init(ObjectClass *oc, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(oc);
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dc->realize = bcm2835_peripherals_realize;
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}
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static const TypeInfo bcm2835_peripherals_type_info = {
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.name = TYPE_BCM2835_PERIPHERALS,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(BCM2835PeripheralState),
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.instance_init = bcm2835_peripherals_init,
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.class_init = bcm2835_peripherals_class_init,
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};
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static void bcm2835_peripherals_register_types(void)
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{
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type_register_static(&bcm2835_peripherals_type_info);
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}
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type_init(bcm2835_peripherals_register_types)
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