malc a35e86c55f Shuffle contents of tcg_target_reg_alloc_order ... Move reserved/volatile registers down. Currently qemu_ld/stXX are marked with TCG_OPF_CALL_CLOBBER and since memory accesses are frequent and R3 through R12 are volatile moving this down results in less spills and tighter generated code. git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4778 c046a42c-6fe2-441c-8c8c-71466251a162		2008-06-23 05:47:03 +00:00
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tcg-target.c	Shuffle contents of tcg_target_reg_alloc_order	2008-06-23 05:47:03 +00:00
tcg-target.h	Use rem/div[u]_i32 drop div[u]2_i32	2008-06-09 23:44:44 +00:00