Since HAX_VM_IOCTL_ALLOC_RAM takes a 32-bit size, it cannot handle RAM blocks of 4GB or larger, which is why HAXM can only run guests with less than 4GB of RAM. Solve this problem by utilizing the new HAXM API, HAX_VM_IOCTL_ADD_RAMBLOCK, which takes a 64-bit size, to register RAM blocks with the HAXM kernel module. The new API is first added in HAXM 7.0.0, and its availablility and be confirmed by the presence of the HAX_CAP_64BIT_RAMBLOCK capability flag. When the guest RAM size reaches 7GB, QEMU will ask HAXM to set up a memory mapping that covers a 4GB region, which will fail, because HAX_VM_IOCTL_SET_RAM also takes a 32-bit size. Work around this limitation by splitting the large mapping into small ones and calling HAX_VM_IOCTL_SET_RAM multiple times. Bug: https://bugs.launchpad.net/qemu/+bug/1735576 Signed-off-by: Yu Ning <yu.ning@intel.com> Message-Id: <1515752555-12784-1-git-send-email-yu.ning@linux.intel.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
328 lines
6.9 KiB
C
328 lines
6.9 KiB
C
/*
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* QEMU HAXM support
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*
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* Copyright (c) 2011 Intel Corporation
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* Written by:
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* Jiang Yunhong<yunhong.jiang@intel.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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/* HAX module interface - darwin version */
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#include "qemu/osdep.h"
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#include <sys/ioctl.h>
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#include "target/i386/hax-i386.h"
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hax_fd hax_mod_open(void)
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{
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int fd = open("/dev/HAX", O_RDWR);
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if (fd == -1) {
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fprintf(stderr, "Failed to open the hax module\n");
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}
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fcntl(fd, F_SETFD, FD_CLOEXEC);
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return fd;
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}
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int hax_populate_ram(uint64_t va, uint64_t size)
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{
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int ret;
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if (!hax_global.vm || !hax_global.vm->fd) {
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fprintf(stderr, "Allocate memory before vm create?\n");
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return -EINVAL;
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}
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if (hax_global.supports_64bit_ramblock) {
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struct hax_ramblock_info ramblock = {
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.start_va = va,
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.size = size,
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.reserved = 0
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};
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ret = ioctl(hax_global.vm->fd, HAX_VM_IOCTL_ADD_RAMBLOCK, &ramblock);
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} else {
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struct hax_alloc_ram_info info = {
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.size = (uint32_t)size,
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.pad = 0,
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.va = va
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};
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ret = ioctl(hax_global.vm->fd, HAX_VM_IOCTL_ALLOC_RAM, &info);
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}
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if (ret < 0) {
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fprintf(stderr, "Failed to register RAM block: ret=%d, va=0x%" PRIx64
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", size=0x%" PRIx64 ", method=%s\n", ret, va, size,
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hax_global.supports_64bit_ramblock ? "new" : "legacy");
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return ret;
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}
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return 0;
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}
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int hax_set_ram(uint64_t start_pa, uint32_t size, uint64_t host_va, int flags)
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{
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struct hax_set_ram_info info;
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int ret;
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info.pa_start = start_pa;
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info.size = size;
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info.va = host_va;
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info.flags = (uint8_t) flags;
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ret = ioctl(hax_global.vm->fd, HAX_VM_IOCTL_SET_RAM, &info);
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if (ret < 0) {
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return -errno;
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}
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return 0;
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}
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int hax_capability(struct hax_state *hax, struct hax_capabilityinfo *cap)
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{
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int ret;
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ret = ioctl(hax->fd, HAX_IOCTL_CAPABILITY, cap);
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if (ret == -1) {
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fprintf(stderr, "Failed to get HAX capability\n");
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return -errno;
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}
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return 0;
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}
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int hax_mod_version(struct hax_state *hax, struct hax_module_version *version)
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{
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int ret;
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ret = ioctl(hax->fd, HAX_IOCTL_VERSION, version);
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if (ret == -1) {
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fprintf(stderr, "Failed to get HAX version\n");
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return -errno;
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}
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return 0;
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}
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static char *hax_vm_devfs_string(int vm_id)
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{
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char *name;
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if (vm_id > MAX_VM_ID) {
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fprintf(stderr, "Too big VM id\n");
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return NULL;
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}
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#define HAX_VM_DEVFS "/dev/hax_vm/vmxx"
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name = g_strdup(HAX_VM_DEVFS);
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if (!name) {
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return NULL;
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}
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snprintf(name, sizeof HAX_VM_DEVFS, "/dev/hax_vm/vm%02d", vm_id);
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return name;
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}
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static char *hax_vcpu_devfs_string(int vm_id, int vcpu_id)
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{
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char *name;
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if (vm_id > MAX_VM_ID || vcpu_id > MAX_VCPU_ID) {
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fprintf(stderr, "Too big vm id %x or vcpu id %x\n", vm_id, vcpu_id);
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return NULL;
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}
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#define HAX_VCPU_DEVFS "/dev/hax_vmxx/vcpuxx"
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name = g_strdup(HAX_VCPU_DEVFS);
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if (!name) {
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return NULL;
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}
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snprintf(name, sizeof HAX_VCPU_DEVFS, "/dev/hax_vm%02d/vcpu%02d",
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vm_id, vcpu_id);
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return name;
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}
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int hax_host_create_vm(struct hax_state *hax, int *vmid)
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{
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int ret;
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int vm_id = 0;
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if (hax_invalid_fd(hax->fd)) {
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return -EINVAL;
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}
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if (hax->vm) {
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return 0;
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}
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ret = ioctl(hax->fd, HAX_IOCTL_CREATE_VM, &vm_id);
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*vmid = vm_id;
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return ret;
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}
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hax_fd hax_host_open_vm(struct hax_state *hax, int vm_id)
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{
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hax_fd fd;
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char *vm_name = NULL;
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vm_name = hax_vm_devfs_string(vm_id);
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if (!vm_name) {
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return -1;
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}
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fd = open(vm_name, O_RDWR);
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g_free(vm_name);
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fcntl(fd, F_SETFD, FD_CLOEXEC);
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return fd;
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}
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int hax_notify_qemu_version(hax_fd vm_fd, struct hax_qemu_version *qversion)
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{
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int ret;
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if (hax_invalid_fd(vm_fd)) {
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return -EINVAL;
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}
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ret = ioctl(vm_fd, HAX_VM_IOCTL_NOTIFY_QEMU_VERSION, qversion);
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if (ret < 0) {
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fprintf(stderr, "Failed to notify qemu API version\n");
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return ret;
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}
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return 0;
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}
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/* Simply assume the size should be bigger than the hax_tunnel,
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* since the hax_tunnel can be extended later with compatibility considered
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*/
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int hax_host_create_vcpu(hax_fd vm_fd, int vcpuid)
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{
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int ret;
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ret = ioctl(vm_fd, HAX_VM_IOCTL_VCPU_CREATE, &vcpuid);
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if (ret < 0) {
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fprintf(stderr, "Failed to create vcpu %x\n", vcpuid);
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}
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return ret;
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}
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hax_fd hax_host_open_vcpu(int vmid, int vcpuid)
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{
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char *devfs_path = NULL;
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hax_fd fd;
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devfs_path = hax_vcpu_devfs_string(vmid, vcpuid);
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if (!devfs_path) {
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fprintf(stderr, "Failed to get the devfs\n");
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return -EINVAL;
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}
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fd = open(devfs_path, O_RDWR);
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g_free(devfs_path);
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if (fd < 0) {
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fprintf(stderr, "Failed to open the vcpu devfs\n");
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}
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fcntl(fd, F_SETFD, FD_CLOEXEC);
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return fd;
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}
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int hax_host_setup_vcpu_channel(struct hax_vcpu_state *vcpu)
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{
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int ret;
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struct hax_tunnel_info info;
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ret = ioctl(vcpu->fd, HAX_VCPU_IOCTL_SETUP_TUNNEL, &info);
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if (ret) {
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fprintf(stderr, "Failed to setup the hax tunnel\n");
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return ret;
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}
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if (!valid_hax_tunnel_size(info.size)) {
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fprintf(stderr, "Invalid hax tunnel size %x\n", info.size);
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ret = -EINVAL;
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return ret;
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}
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vcpu->tunnel = (struct hax_tunnel *) (intptr_t) (info.va);
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vcpu->iobuf = (unsigned char *) (intptr_t) (info.io_va);
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return 0;
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}
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int hax_vcpu_run(struct hax_vcpu_state *vcpu)
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{
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int ret;
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ret = ioctl(vcpu->fd, HAX_VCPU_IOCTL_RUN, NULL);
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return ret;
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}
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int hax_sync_fpu(CPUArchState *env, struct fx_layout *fl, int set)
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{
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int ret, fd;
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fd = hax_vcpu_get_fd(env);
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if (fd <= 0) {
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return -1;
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}
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if (set) {
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ret = ioctl(fd, HAX_VCPU_IOCTL_SET_FPU, fl);
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} else {
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ret = ioctl(fd, HAX_VCPU_IOCTL_GET_FPU, fl);
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}
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return ret;
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}
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int hax_sync_msr(CPUArchState *env, struct hax_msr_data *msrs, int set)
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{
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int ret, fd;
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fd = hax_vcpu_get_fd(env);
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if (fd <= 0) {
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return -1;
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}
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if (set) {
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ret = ioctl(fd, HAX_VCPU_IOCTL_SET_MSRS, msrs);
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} else {
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ret = ioctl(fd, HAX_VCPU_IOCTL_GET_MSRS, msrs);
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}
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return ret;
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}
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int hax_sync_vcpu_state(CPUArchState *env, struct vcpu_state_t *state, int set)
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{
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int ret, fd;
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fd = hax_vcpu_get_fd(env);
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if (fd <= 0) {
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return -1;
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}
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if (set) {
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ret = ioctl(fd, HAX_VCPU_SET_REGS, state);
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} else {
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ret = ioctl(fd, HAX_VCPU_GET_REGS, state);
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}
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return ret;
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}
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int hax_inject_interrupt(CPUArchState *env, int vector)
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{
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int ret, fd;
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fd = hax_vcpu_get_fd(env);
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if (fd <= 0) {
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return -1;
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}
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ret = ioctl(fd, HAX_VCPU_IOCTL_INTERRUPT, &vector);
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return ret;
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}
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