71f5027f34
Adds a line-item reference to the supported quanta-q71l-bmc aspeed entry. Signed-off-by: Patrick Venture <venture@google.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-id: 20210615192848.1065297-2-venture@google.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
110 lines
3.3 KiB
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110 lines
3.3 KiB
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Aspeed family boards (``*-bmc``, ``ast2500-evb``, ``ast2600-evb``)
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==================================================================
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The QEMU Aspeed machines model BMCs of various OpenPOWER systems and
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Aspeed evaluation boards. They are based on different releases of the
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Aspeed SoC : the AST2400 integrating an ARM926EJ-S CPU (400MHz), the
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AST2500 with an ARM1176JZS CPU (800MHz) and more recently the AST2600
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with dual cores ARM Cortex-A7 CPUs (1.2GHz).
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The SoC comes with RAM, Gigabit ethernet, USB, SD/MMC, USB, SPI, I2C,
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etc.
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AST2400 SoC based machines :
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- ``palmetto-bmc`` OpenPOWER Palmetto POWER8 BMC
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- ``quanta-q71l-bmc`` OpenBMC Quanta BMC
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AST2500 SoC based machines :
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- ``ast2500-evb`` Aspeed AST2500 Evaluation board
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- ``romulus-bmc`` OpenPOWER Romulus POWER9 BMC
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- ``witherspoon-bmc`` OpenPOWER Witherspoon POWER9 BMC
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- ``sonorapass-bmc`` OCP SonoraPass BMC
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- ``swift-bmc`` OpenPOWER Swift BMC POWER9
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AST2600 SoC based machines :
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- ``ast2600-evb`` Aspeed AST2600 Evaluation board (Cortex-A7)
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- ``tacoma-bmc`` OpenPOWER Witherspoon POWER9 AST2600 BMC
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Supported devices
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-----------------
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* SMP (for the AST2600 Cortex-A7)
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* Interrupt Controller (VIC)
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* Timer Controller
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* RTC Controller
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* I2C Controller
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* System Control Unit (SCU)
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* SRAM mapping
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* X-DMA Controller (basic interface)
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* Static Memory Controller (SMC or FMC) - Only SPI Flash support
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* SPI Memory Controller
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* USB 2.0 Controller
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* SD/MMC storage controllers
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* SDRAM controller (dummy interface for basic settings and training)
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* Watchdog Controller
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* GPIO Controller (Master only)
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* UART
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* Ethernet controllers
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* Front LEDs (PCA9552 on I2C bus)
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* LPC Peripheral Controller (a subset of subdevices are supported)
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* Hash/Crypto Engine (HACE) - Hash support only. TODO: HMAC and RSA
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Missing devices
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---------------
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* Coprocessor support
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* ADC (out of tree implementation)
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* PWM and Fan Controller
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* Slave GPIO Controller
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* Super I/O Controller
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* PCI-Express 1 Controller
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* Graphic Display Controller
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* PECI Controller
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* MCTP Controller
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* Mailbox Controller
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* Virtual UART
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* eSPI Controller
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* I3C Controller
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Boot options
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------------
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The Aspeed machines can be started using the ``-kernel`` option to
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load a Linux kernel or from a firmware. Images can be downloaded from
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the OpenBMC jenkins :
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https://jenkins.openbmc.org/job/ci-openbmc/lastSuccessfulBuild/distro=ubuntu,label=docker-builder
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or directly from the OpenBMC GitHub release repository :
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https://github.com/openbmc/openbmc/releases
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The image should be attached as an MTD drive. Run :
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.. code-block:: bash
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$ qemu-system-arm -M romulus-bmc -nic user \
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-drive file=obmc-phosphor-image-romulus.static.mtd,format=raw,if=mtd -nographic
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Options specific to Aspeed machines are :
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* ``execute-in-place`` which emulates the boot from the CE0 flash
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device by using the FMC controller to load the instructions, and
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not simply from RAM. This takes a little longer.
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* ``fmc-model`` to change the FMC Flash model. FW needs support for
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the chip model to boot.
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* ``spi-model`` to change the SPI Flash model.
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For instance, to start the ``ast2500-evb`` machine with a different
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FMC chip and a bigger (64M) SPI chip, use :
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.. code-block:: bash
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-M ast2500-evb,fmc-model=mx25l25635e,spi-model=mx66u51235f
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