qemu-patch-raspberry4/target-mips
James Hogan 4ef37e6907 target-mips: get_physical_address: Add KVM awareness
MIPS KVM trap & emulate mode (which is currently the only supported
mode) has to add an extra kseg0/kseg1 at 0x40000000 and an extra
kseg2/kseg3 at 0x60000000. Take this into account in
get_physical_address() so that debug memory access works.

This is done by translating the address to a standard kseg0 or kseg2
address before doing the normal address translation. The real virtual
address is still used for TLB lookups.

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2014-06-18 16:58:37 +02:00
..
cpu-qom.h softmmu: make do_unaligned_access a method of CPU 2014-06-05 16:10:31 +02:00
cpu.c softmmu: make do_unaligned_access a method of CPU 2014-06-05 16:10:31 +02:00
cpu.h softmmu: move ALIGNED_ONLY to cpu.h 2014-06-05 16:10:33 +02:00
dsp_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
gdbstub.c cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
helper.c target-mips: get_physical_address: Add KVM awareness 2014-06-18 16:58:37 +02:00
helper.h tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
lmi_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
machine.c cputlb: Change tlb_flush() argument to CPUState 2014-03-13 19:52:47 +01:00
Makefile.objs cpu: Introduce CPUClass::gdb_{read,write}_register() 2013-07-27 00:04:17 +02:00
mips-defs.h target-mips: add CPU definition for MIPS32R5 2014-02-10 16:45:53 +01:00
op_helper.c softmmu: introduce cpu_ldst.h 2014-06-05 16:10:33 +02:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate.c target-mips: Reset CPU timer consistently 2014-06-18 16:54:30 +02:00
translate_init.c target-mips: Avoid shifting left into sign bit 2014-03-27 19:22:49 +04:00