qemu-patch-raspberry4/target/ppc
Bernhard Kaindl b1c897d587 e500,book3s: mfspr 259: Register mapped/aliased SPRG3 user read
This patch registers mfspr 259 for Book3S and e500 family cores
following this research:

mfspr 259 provides read-only mapped user access to SPRG3(SPR 275) according to:

- PowerISA 2.02, Book III (documents implementation starting with POWER4+ @ p20)
- IBM PowerPC 970MP RISC Microprocessor User's Manual v2.1, page 48
- Amit Singh: "Mac OS X Internals: A Systems Approach" on 970 and 970FX cores:
  He demonstrates mfspr 259 reading TLS data from Mac OS X on G5 on page 588
- NXP documents it in the Core Reference Manuals of: e500, e500mc and e5500
- getcpu() of the 32 & 64-bit Book3S Linux vDSOs use it to read the core number

mfspr 259 does not appear to be implemented in these cores according to:

- 74xx series: MPC7410/MPC7400 and MPC7450 RISC Microprocessor Reference Manuals
- 4xx series:  PPC440 Processor User's Manual, Revision 1.09 by AMCC
- 750 series:  IBM PowerPC 750CL RISC Microprocessor User's Manual
- e200 series: e200z4 Power Architectureâ Core Reference Manual

Implementation: gen_spr_usprg3() is called from init_proc_book3s_common()
(covers the 970 and POWER cores) and init_proc_e500() (covers the e500 family)
to register spr_read_ureg() in the same way which it already provides
the mapped SPR access for SPR_USPRG4-7 in gen_spr_usprgh() for cores
which have the same read-only mapped SPRG register access for SPRG4-7.

Verified using Linux by pinning a thread to a core and checking sched_getcpu()
using qemu-system-ppc64 -M pseries -cpu POWER8 using MTTCG on a x86_64 host.

Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com>
Reviewed-by: Stefan Resch <stefan.resch@thalesgroup.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-04-26 12:41:56 +10:00
..
translate target-ppc: Add xscvqpudz and xscvqpuwz instructions 2017-02-22 11:28:28 +11:00
arch_dump.c target/ppc: Fix size of struct PPCElfPrstatus 2017-04-26 12:41:55 +10:00
compat.c target/ppc: Add POWER9/ISAv3.00 to compat_table 2017-03-03 11:30:59 +11:00
cpu-models.c target/ppc/cpu-models: Fix/remove bad CPU aliases 2017-01-31 13:46:26 +11:00
cpu-models.h powerpc/cpu-models: rename ISAv3.00 logical PVR definition 2017-01-31 10:10:14 +11:00
cpu-qom.h spapr: Add ibm,processor-radix-AP-encodings to the device tree 2017-04-26 12:00:41 +10:00
cpu.c target/ppc: support for 32-bit carry and overflow 2017-03-01 11:23:39 +11:00
cpu.h ppc/xics: introduce an 'intc' backlink under PowerPCCPU 2017-04-26 12:00:42 +10:00
dfp_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
excp_helper.c ppc: Clean up and QOMify hypercall emulation 2017-01-31 10:10:13 +11:00
fpu_helper.c target/ppc: use helper for excp handling 2017-03-06 13:17:28 +11:00
gdbstub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
helper.h target/ppc: Flush TLB on write to PIDR 2017-04-26 12:41:56 +10:00
helper_regs.h cputlb: drop flush_global flag from tlb_flush 2017-01-13 14:24:37 +00:00
int_helper.c target/ppc: introduce helper_update_ov_legacy 2017-03-01 11:23:39 +11:00
internal.h target-ppc: implement load atomic instruction 2017-02-22 11:28:27 +11:00
kvm-stub.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
kvm.c target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce 2017-04-26 12:00:41 +10:00
kvm_ppc.h target-ppc/kvm: Enable in-kernel TCE acceleration for multi-tce 2017-04-26 12:00:41 +10:00
machine.c target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
Makefile.objs target/ppc/POWER9: Add POWER9 mmu fault handler 2017-03-03 11:30:59 +11:00
mem_helper.c target-ppc: implement stxvll instructions 2017-01-31 10:10:13 +11:00
mfrom_table.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
mfrom_table_gen.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
misc_helper.c target/ppc: Flush TLB on write to PIDR 2017-04-26 12:41:56 +10:00
mmu-book3s-v3.c target/ppc/POWER9: Add POWER9 mmu fault handler 2017-03-03 11:30:59 +11:00
mmu-book3s-v3.h target/ppc/POWER9: Add POWER9 mmu fault handler 2017-03-03 11:30:59 +11:00
mmu-hash32.c target/ppc: Eliminate htab_base and htab_mask variables 2017-03-01 11:23:39 +11:00
mmu-hash32.h target/ppc: Manage external HPT via virtual hypervisor 2017-03-01 11:23:39 +11:00
mmu-hash64.c spapr: Small cleanup of PPC MMU enums 2017-03-03 11:30:59 +11:00
mmu-hash64.h target/ppc: Correct SDR1 masking 2017-03-01 11:23:39 +11:00
mmu_helper.c spapr: Small cleanup of PPC MMU enums 2017-03-03 11:30:59 +11:00
monitor.c monitor: Fix crashes when using HMP commands without CPU 2017-02-21 18:29:01 +00:00
STATUS Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
timebase_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
trace-events Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
translate.c target/ppc: fix cpu_ov setting for 32-bit 2017-03-14 11:27:23 +11:00
translate_init.c e500,book3s: mfspr 259: Register mapped/aliased SPRG3 user read 2017-04-26 12:41:56 +10:00
user_only_helper.c Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00