All NICs have a cleanup function that, in most cases, zeroes the pointer to the NICState. In some cases, it frees data belonging to the NIC. However, this function is never called except when exiting from QEMU. It is not necessary to NULL pointers and free data here; the right place to do that would be in the device's unrealize function, after calling qemu_del_nic. Zeroing the NIC multiple times is also wrong for multiqueue devices. This cleanup function gets in the way of making the NetClientStates for the NIC hold an object_ref reference to the object, so get rid of it. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
273 lines
7.7 KiB
C
273 lines
7.7 KiB
C
/*
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* QEMU model of the Xilinx Ethernet Lite MAC.
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*
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* Copyright (c) 2009 Edgar E. Iglesias.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw/sysbus.h"
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#include "hw/hw.h"
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#include "net/net.h"
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#define D(x)
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#define R_TX_BUF0 0
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#define R_TX_LEN0 (0x07f4 / 4)
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#define R_TX_GIE0 (0x07f8 / 4)
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#define R_TX_CTRL0 (0x07fc / 4)
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#define R_TX_BUF1 (0x0800 / 4)
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#define R_TX_LEN1 (0x0ff4 / 4)
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#define R_TX_CTRL1 (0x0ffc / 4)
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#define R_RX_BUF0 (0x1000 / 4)
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#define R_RX_CTRL0 (0x17fc / 4)
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#define R_RX_BUF1 (0x1800 / 4)
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#define R_RX_CTRL1 (0x1ffc / 4)
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#define R_MAX (0x2000 / 4)
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#define GIE_GIE 0x80000000
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#define CTRL_I 0x8
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#define CTRL_P 0x2
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#define CTRL_S 0x1
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#define TYPE_XILINX_ETHLITE "xlnx.xps-ethernetlite"
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#define XILINX_ETHLITE(obj) \
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OBJECT_CHECK(struct xlx_ethlite, (obj), TYPE_XILINX_ETHLITE)
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struct xlx_ethlite
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{
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SysBusDevice parent_obj;
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MemoryRegion mmio;
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qemu_irq irq;
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NICState *nic;
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NICConf conf;
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uint32_t c_tx_pingpong;
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uint32_t c_rx_pingpong;
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unsigned int txbuf;
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unsigned int rxbuf;
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uint32_t regs[R_MAX];
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};
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static inline void eth_pulse_irq(struct xlx_ethlite *s)
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{
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/* Only the first gie reg is active. */
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if (s->regs[R_TX_GIE0] & GIE_GIE) {
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qemu_irq_pulse(s->irq);
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}
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}
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static uint64_t
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eth_read(void *opaque, hwaddr addr, unsigned int size)
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{
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struct xlx_ethlite *s = opaque;
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uint32_t r = 0;
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addr >>= 2;
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switch (addr)
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{
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case R_TX_GIE0:
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case R_TX_LEN0:
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case R_TX_LEN1:
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case R_TX_CTRL1:
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case R_TX_CTRL0:
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case R_RX_CTRL1:
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case R_RX_CTRL0:
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r = s->regs[addr];
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D(qemu_log("%s " TARGET_FMT_plx "=%x\n", __func__, addr * 4, r));
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break;
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default:
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r = tswap32(s->regs[addr]);
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break;
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}
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return r;
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}
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static void
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eth_write(void *opaque, hwaddr addr,
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uint64_t val64, unsigned int size)
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{
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struct xlx_ethlite *s = opaque;
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unsigned int base = 0;
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uint32_t value = val64;
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addr >>= 2;
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switch (addr)
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{
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case R_TX_CTRL0:
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case R_TX_CTRL1:
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if (addr == R_TX_CTRL1)
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base = 0x800 / 4;
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D(qemu_log("%s addr=" TARGET_FMT_plx " val=%x\n",
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__func__, addr * 4, value));
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if ((value & (CTRL_P | CTRL_S)) == CTRL_S) {
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qemu_send_packet(qemu_get_queue(s->nic),
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(void *) &s->regs[base],
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s->regs[base + R_TX_LEN0]);
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D(qemu_log("eth_tx %d\n", s->regs[base + R_TX_LEN0]));
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if (s->regs[base + R_TX_CTRL0] & CTRL_I)
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eth_pulse_irq(s);
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} else if ((value & (CTRL_P | CTRL_S)) == (CTRL_P | CTRL_S)) {
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memcpy(&s->conf.macaddr.a[0], &s->regs[base], 6);
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if (s->regs[base + R_TX_CTRL0] & CTRL_I)
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eth_pulse_irq(s);
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}
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/* We are fast and get ready pretty much immediately so
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we actually never flip the S nor P bits to one. */
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s->regs[addr] = value & ~(CTRL_P | CTRL_S);
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break;
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/* Keep these native. */
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case R_RX_CTRL0:
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case R_RX_CTRL1:
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if (!(value & CTRL_S)) {
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qemu_flush_queued_packets(qemu_get_queue(s->nic));
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}
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case R_TX_LEN0:
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case R_TX_LEN1:
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case R_TX_GIE0:
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D(qemu_log("%s addr=" TARGET_FMT_plx " val=%x\n",
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__func__, addr * 4, value));
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s->regs[addr] = value;
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break;
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default:
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s->regs[addr] = tswap32(value);
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break;
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}
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}
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static const MemoryRegionOps eth_ops = {
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.read = eth_read,
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.write = eth_write,
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.endianness = DEVICE_NATIVE_ENDIAN,
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.valid = {
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.min_access_size = 4,
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.max_access_size = 4
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}
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};
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static int eth_can_rx(NetClientState *nc)
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{
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struct xlx_ethlite *s = qemu_get_nic_opaque(nc);
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unsigned int rxbase = s->rxbuf * (0x800 / 4);
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return !(s->regs[rxbase + R_RX_CTRL0] & CTRL_S);
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}
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static ssize_t eth_rx(NetClientState *nc, const uint8_t *buf, size_t size)
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{
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struct xlx_ethlite *s = qemu_get_nic_opaque(nc);
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unsigned int rxbase = s->rxbuf * (0x800 / 4);
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/* DA filter. */
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if (!(buf[0] & 0x80) && memcmp(&s->conf.macaddr.a[0], buf, 6))
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return size;
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if (s->regs[rxbase + R_RX_CTRL0] & CTRL_S) {
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D(qemu_log("ethlite lost packet %x\n", s->regs[R_RX_CTRL0]));
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return -1;
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}
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D(qemu_log("%s %zd rxbase=%x\n", __func__, size, rxbase));
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memcpy(&s->regs[rxbase + R_RX_BUF0], buf, size);
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s->regs[rxbase + R_RX_CTRL0] |= CTRL_S;
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if (s->regs[R_RX_CTRL0] & CTRL_I) {
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eth_pulse_irq(s);
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}
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/* If c_rx_pingpong was set flip buffers. */
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s->rxbuf ^= s->c_rx_pingpong;
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return size;
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}
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static void xilinx_ethlite_reset(DeviceState *dev)
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{
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struct xlx_ethlite *s = XILINX_ETHLITE(dev);
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s->rxbuf = 0;
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}
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static NetClientInfo net_xilinx_ethlite_info = {
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.type = NET_CLIENT_OPTIONS_KIND_NIC,
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.size = sizeof(NICState),
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.can_receive = eth_can_rx,
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.receive = eth_rx,
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};
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static void xilinx_ethlite_realize(DeviceState *dev, Error **errp)
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{
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struct xlx_ethlite *s = XILINX_ETHLITE(dev);
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qemu_macaddr_default_if_unset(&s->conf.macaddr);
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s->nic = qemu_new_nic(&net_xilinx_ethlite_info, &s->conf,
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object_get_typename(OBJECT(dev)), dev->id, s);
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qemu_format_nic_info_str(qemu_get_queue(s->nic), s->conf.macaddr.a);
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}
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static void xilinx_ethlite_init(Object *obj)
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{
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struct xlx_ethlite *s = XILINX_ETHLITE(obj);
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sysbus_init_irq(SYS_BUS_DEVICE(obj), &s->irq);
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memory_region_init_io(&s->mmio, obj, ð_ops, s,
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"xlnx.xps-ethernetlite", R_MAX * 4);
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sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
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}
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static Property xilinx_ethlite_properties[] = {
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DEFINE_PROP_UINT32("tx-ping-pong", struct xlx_ethlite, c_tx_pingpong, 1),
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DEFINE_PROP_UINT32("rx-ping-pong", struct xlx_ethlite, c_rx_pingpong, 1),
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DEFINE_NIC_PROPERTIES(struct xlx_ethlite, conf),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void xilinx_ethlite_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = xilinx_ethlite_realize;
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dc->reset = xilinx_ethlite_reset;
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dc->props = xilinx_ethlite_properties;
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}
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static const TypeInfo xilinx_ethlite_info = {
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.name = TYPE_XILINX_ETHLITE,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(struct xlx_ethlite),
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.instance_init = xilinx_ethlite_init,
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.class_init = xilinx_ethlite_class_init,
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};
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static void xilinx_ethlite_register_types(void)
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{
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type_register_static(&xilinx_ethlite_info);
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}
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type_init(xilinx_ethlite_register_types)
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