Alistair Francis b55d7d34f6 target/riscv: Allow setting ISA extensions via CPU props ... This patch allows us to enable/disable the RISC-V ISA extensions from the QEMU command line. This works with the rv32 and rv64 machines. The idea is that in the future we can now add extensions and leave them disabled by default until enabled by the user. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>		2019-06-23 23:44:41 -07:00
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insn_trans	target/riscv: Split gen_arith_imm into functional and temp	2019-05-24 12:09:23 -07:00
cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
cpu.c	target/riscv: Allow setting ISA extensions via CPU props	2019-06-23 23:44:41 -07:00
cpu.h	target/riscv: Allow setting ISA extensions via CPU props	2019-06-23 23:44:41 -07:00
cpu_bits.h	Supply missing header guards	2019-06-12 13:20:21 +02:00
cpu_helper.c	target/riscv: Use env_cpu, env_archcpu	2019-06-10 07:03:42 -07:00
cpu_user.h	Supply missing header guards	2019-06-12 13:20:21 +02:00
csr.c	target/riscv: Use env_cpu, env_archcpu	2019-06-10 07:03:42 -07:00
fpu_helper.c	RISC-V: Use riscv prefix consistently on cpu helpers	2019-02-11 15:56:21 -08:00
gdbstub.c	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
helper.h	RISC-V CPU Helpers	2018-03-07 08:30:28 +13:00
insn16-32.decode	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-24 12:09:22 -07:00
insn16-64.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-24 12:09:25 -07:00
insn16.decode	target/riscv: Add checks for several RVC reserved operands	2019-05-24 12:09:25 -07:00
insn32-64.decode	target/riscv: Convert RV64D insns to decodetree	2019-03-13 10:34:06 +01:00
insn32.decode	target/riscv: Name the argument sets for all of insn32 formats	2019-05-24 12:09:22 -07:00
instmap.h	Supply missing header guards	2019-06-12 13:20:21 +02:00
Makefile.objs	target/riscv: Split RVC32 and RVC64 insns into separate files	2019-05-24 12:09:22 -07:00
op_helper.c	target/riscv: Use env_cpu, env_archcpu	2019-06-10 07:03:42 -07:00
pmp.c	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
pmp.h	Clean up ill-advised or unusual header guards	2019-05-13 08:58:55 +02:00
trace-events	RISC-V: Convert trap debugging to trace events	2019-03-19 05:14:40 -07:00
translate.c	target/riscv: Split gen_arith_imm into functional and temp	2019-05-24 12:09:23 -07:00