qemu-patch-raspberry4/target
Peter Maydell b62ceeaf80 target/arm: Don't skip M-profile reset entirely in user mode
Currently all of the M-profile specific code in arm_cpu_reset() is
inside a !defined(CONFIG_USER_ONLY) ifdef block.  This is
unintentional: it happened because originally the only
M-profile-specific handling was the setup of the initial SP and PC
from the vector table, which is system-emulation only.  But then we
added a lot of other M-profile setup to the same "if (ARM_FEATURE_M)"
code block without noticing that it was all inside a not-user-mode
ifdef.  This has generally been harmless, but with the addition of
v8.1M low-overhead-loop support we ran into a problem: the reset of
FPSCR.LTPSIZE to 4 was only being done for system emulation mode, so
if a user-mode guest tried to execute the LE instruction it would
incorrectly take a UsageFault.

Adjust the ifdefs so only the really system-emulation specific parts
are covered.  Because this means we now run some reset code that sets
up initial values in the FPCCR and similar FPU related registers,
explicitly set up the registers controlling FPU context handling in
user-emulation mode so that the FPU works by design and not by
chance.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/613
Cc: qemu-stable@nongnu.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210914120725.24992-2-peter.maydell@linaro.org
2021-09-20 09:54:33 +01:00
..
alpha target/alpha: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
arm target/arm: Don't skip M-profile reset entirely in user mode 2021-09-20 09:54:33 +01:00
avr Trivial patches pull request 20210916 2021-09-16 16:02:31 +01:00
cris target/cris: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
hexagon accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
hppa target/hppa: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
i386 Trivial patches pull request 20210916 2021-09-16 16:02:31 +01:00
m68k Pull request linux-user 20210916 2021-09-16 21:09:18 +01:00
microblaze target/microblaze: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
mips target/mips: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
nios2 Pull request linux-user 20210916 2021-09-16 21:09:18 +01:00
openrisc target/openrisc: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
ppc target/ppc: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
riscv target/riscv: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
rx target/rx: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
s390x accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
sh4 target/sh4: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
sparc Trivial patches pull request 20210916 2021-09-16 16:02:31 +01:00
tricore accel/tcg: Remove TranslatorOps.breakpoint_check 2021-07-21 07:47:05 -10:00
xtensa target/xtensa: Restrict cpu_exec_interrupt() handler to sysemu 2021-09-14 12:00:21 -07:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build Drop the deprecated unicore32 target 2021-05-12 18:20:52 +02:00