We set default boot order "cad" in every single machine definition except "pseries" and "moxiesim", even though very few boards actually care for boot order, and "cad" makes sense for even fewer. Machines that care: * pc and its variants Accept up to three letters 'a', 'b' (undocumented alias for 'a'), 'c', 'd' and 'n'. Reject all others (fatal with -boot). * nseries (n800, n810) Check whether order starts with 'n'. Silently ignored otherwise. * prep, g3beige, mac99 Extract the first character the machine understands (subset of 'a'..'f'). Silently ignored otherwise. * spapr Accept an arbitrary string (vl.c restricts it to contain only 'a'..'p', no duplicates). * sun4[mdc] Use the first character. Silently ignored otherwise. Strip characters these machines ignore from their default boot order. For all other machines, remove the unused default boot order alltogether. Note that my rename of QEMUMachine member boot_order to default_boot_order and QEMUMachineInitArgs member boot_device to boot_order has a welcome side effect: it makes every use of boot orders visible in this patch, for easy review. Signed-off-by: Markus Armbruster <armbru@redhat.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
367 lines
10 KiB
C
367 lines
10 KiB
C
/*
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* Renesas SH7751R R2D-PLUS emulation
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*
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* Copyright (c) 2007 Magnus Damm
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* Copyright (c) 2008 Paul Mundt
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw/sysbus.h"
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#include "hw/hw.h"
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#include "hw/sh4/sh.h"
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#include "hw/devices.h"
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#include "sysemu/sysemu.h"
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#include "hw/boards.h"
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#include "hw/pci/pci.h"
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#include "net/net.h"
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#include "sh7750_regs.h"
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#include "hw/ide.h"
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#include "hw/loader.h"
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#include "hw/usb.h"
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#include "hw/block/flash.h"
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#include "sysemu/blockdev.h"
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#include "exec/address-spaces.h"
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#define FLASH_BASE 0x00000000
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#define FLASH_SIZE 0x02000000
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#define SDRAM_BASE 0x0c000000 /* Physical location of SDRAM: Area 3 */
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#define SDRAM_SIZE 0x04000000
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#define SM501_VRAM_SIZE 0x800000
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#define BOOT_PARAMS_OFFSET 0x0010000
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/* CONFIG_BOOT_LINK_OFFSET of Linux kernel */
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#define LINUX_LOAD_OFFSET 0x0800000
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#define INITRD_LOAD_OFFSET 0x1800000
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#define PA_IRLMSK 0x00
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#define PA_POWOFF 0x30
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#define PA_VERREG 0x32
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#define PA_OUTPORT 0x36
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typedef struct {
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uint16_t bcr;
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uint16_t irlmsk;
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uint16_t irlmon;
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uint16_t cfctl;
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uint16_t cfpow;
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uint16_t dispctl;
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uint16_t sdmpow;
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uint16_t rtcce;
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uint16_t pcicd;
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uint16_t voyagerrts;
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uint16_t cfrst;
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uint16_t admrts;
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uint16_t extrst;
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uint16_t cfcdintclr;
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uint16_t keyctlclr;
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uint16_t pad0;
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uint16_t pad1;
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uint16_t verreg;
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uint16_t inport;
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uint16_t outport;
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uint16_t bverreg;
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/* output pin */
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qemu_irq irl;
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MemoryRegion iomem;
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} r2d_fpga_t;
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enum r2d_fpga_irq {
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PCI_INTD, CF_IDE, CF_CD, PCI_INTC, SM501, KEY, RTC_A, RTC_T,
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SDCARD, PCI_INTA, PCI_INTB, EXT, TP,
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NR_IRQS
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};
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static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = {
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[CF_IDE] = { 1, 1<<9 },
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[CF_CD] = { 2, 1<<8 },
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[PCI_INTA] = { 9, 1<<14 },
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[PCI_INTB] = { 10, 1<<13 },
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[PCI_INTC] = { 3, 1<<12 },
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[PCI_INTD] = { 0, 1<<11 },
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[SM501] = { 4, 1<<10 },
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[KEY] = { 5, 1<<6 },
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[RTC_A] = { 6, 1<<5 },
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[RTC_T] = { 7, 1<<4 },
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[SDCARD] = { 8, 1<<7 },
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[EXT] = { 11, 1<<0 },
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[TP] = { 12, 1<<15 },
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};
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static void update_irl(r2d_fpga_t *fpga)
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{
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int i, irl = 15;
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for (i = 0; i < NR_IRQS; i++)
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if (fpga->irlmon & fpga->irlmsk & irqtab[i].msk)
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if (irqtab[i].irl < irl)
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irl = irqtab[i].irl;
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qemu_set_irq(fpga->irl, irl ^ 15);
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}
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static void r2d_fpga_irq_set(void *opaque, int n, int level)
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{
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r2d_fpga_t *fpga = opaque;
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if (level)
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fpga->irlmon |= irqtab[n].msk;
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else
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fpga->irlmon &= ~irqtab[n].msk;
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update_irl(fpga);
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}
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static uint32_t r2d_fpga_read(void *opaque, hwaddr addr)
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{
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r2d_fpga_t *s = opaque;
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switch (addr) {
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case PA_IRLMSK:
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return s->irlmsk;
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case PA_OUTPORT:
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return s->outport;
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case PA_POWOFF:
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return 0x00;
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case PA_VERREG:
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return 0x10;
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}
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return 0;
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}
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static void
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r2d_fpga_write(void *opaque, hwaddr addr, uint32_t value)
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{
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r2d_fpga_t *s = opaque;
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switch (addr) {
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case PA_IRLMSK:
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s->irlmsk = value;
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update_irl(s);
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break;
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case PA_OUTPORT:
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s->outport = value;
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break;
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case PA_POWOFF:
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if (value & 1) {
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qemu_system_shutdown_request();
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}
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break;
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case PA_VERREG:
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/* Discard writes */
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break;
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}
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}
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static const MemoryRegionOps r2d_fpga_ops = {
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.old_mmio = {
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.read = { r2d_fpga_read, r2d_fpga_read, NULL, },
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.write = { r2d_fpga_write, r2d_fpga_write, NULL, },
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},
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
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hwaddr base, qemu_irq irl)
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{
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r2d_fpga_t *s;
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s = g_malloc0(sizeof(r2d_fpga_t));
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s->irl = irl;
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memory_region_init_io(&s->iomem, NULL, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
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memory_region_add_subregion(sysmem, base, &s->iomem);
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return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
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}
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typedef struct ResetData {
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SuperHCPU *cpu;
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uint32_t vector;
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} ResetData;
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static void main_cpu_reset(void *opaque)
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{
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ResetData *s = (ResetData *)opaque;
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CPUSH4State *env = &s->cpu->env;
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cpu_reset(CPU(s->cpu));
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env->pc = s->vector;
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}
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static struct QEMU_PACKED
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{
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int mount_root_rdonly;
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int ramdisk_flags;
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int orig_root_dev;
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int loader_type;
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int initrd_start;
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int initrd_size;
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char pad[232];
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char kernel_cmdline[256];
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} boot_params;
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static void r2d_init(QEMUMachineInitArgs *args)
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{
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const char *cpu_model = args->cpu_model;
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const char *kernel_filename = args->kernel_filename;
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const char *kernel_cmdline = args->kernel_cmdline;
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const char *initrd_filename = args->initrd_filename;
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SuperHCPU *cpu;
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CPUSH4State *env;
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ResetData *reset_info;
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struct SH7750State *s;
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MemoryRegion *sdram = g_new(MemoryRegion, 1);
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qemu_irq *irq;
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DriveInfo *dinfo;
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int i;
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DeviceState *dev;
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SysBusDevice *busdev;
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MemoryRegion *address_space_mem = get_system_memory();
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PCIBus *pci_bus;
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if (cpu_model == NULL) {
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cpu_model = "SH7751R";
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}
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cpu = cpu_sh4_init(cpu_model);
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if (cpu == NULL) {
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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env = &cpu->env;
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reset_info = g_malloc0(sizeof(ResetData));
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reset_info->cpu = cpu;
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reset_info->vector = env->pc;
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qemu_register_reset(main_cpu_reset, reset_info);
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/* Allocate memory space */
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memory_region_init_ram(sdram, NULL, "r2d.sdram", SDRAM_SIZE);
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vmstate_register_ram_global(sdram);
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memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
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/* Register peripherals */
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s = sh7750_init(cpu, address_space_mem);
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irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));
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dev = qdev_create(NULL, "sh_pci");
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busdev = SYS_BUS_DEVICE(dev);
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qdev_init_nofail(dev);
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pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
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sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000));
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sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000));
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sysbus_connect_irq(busdev, 0, irq[PCI_INTA]);
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sysbus_connect_irq(busdev, 1, irq[PCI_INTB]);
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sysbus_connect_irq(busdev, 2, irq[PCI_INTC]);
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sysbus_connect_irq(busdev, 3, irq[PCI_INTD]);
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sm501_init(address_space_mem, 0x10000000, SM501_VRAM_SIZE,
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irq[SM501], serial_hds[2]);
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/* onboard CF (True IDE mode, Master only). */
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dinfo = drive_get(IF_IDE, 0, 0);
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dev = qdev_create(NULL, "mmio-ide");
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busdev = SYS_BUS_DEVICE(dev);
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sysbus_connect_irq(busdev, 0, irq[CF_IDE]);
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qdev_prop_set_uint32(dev, "shift", 1);
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qdev_init_nofail(dev);
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sysbus_mmio_map(busdev, 0, 0x14001000);
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sysbus_mmio_map(busdev, 1, 0x1400080c);
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mmio_ide_init_drives(dev, dinfo, NULL);
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/* onboard flash memory */
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dinfo = drive_get(IF_PFLASH, 0, 0);
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pflash_cfi02_register(0x0, NULL, "r2d.flash", FLASH_SIZE,
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dinfo ? dinfo->bdrv : NULL, (16 * 1024),
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FLASH_SIZE >> 16,
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1, 4, 0x0000, 0x0000, 0x0000, 0x0000,
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0x555, 0x2aa, 0);
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/* NIC: rtl8139 on-board, and 2 slots. */
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for (i = 0; i < nb_nics; i++)
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pci_nic_init_nofail(&nd_table[i], pci_bus,
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"rtl8139", i==0 ? "2" : NULL);
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/* USB keyboard */
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usbdevice_create("keyboard");
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/* Todo: register on board registers */
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memset(&boot_params, 0, sizeof(boot_params));
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if (kernel_filename) {
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int kernel_size;
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kernel_size = load_image_targphys(kernel_filename,
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SDRAM_BASE + LINUX_LOAD_OFFSET,
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INITRD_LOAD_OFFSET - LINUX_LOAD_OFFSET);
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n", kernel_filename);
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exit(1);
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}
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/* initialization which should be done by firmware */
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stl_phys(SH7750_BCR1, 1<<3); /* cs3 SDRAM */
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stw_phys(SH7750_BCR2, 3<<(3*2)); /* cs3 32bit */
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reset_info->vector = (SDRAM_BASE + LINUX_LOAD_OFFSET) | 0xa0000000; /* Start from P2 area */
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}
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if (initrd_filename) {
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int initrd_size;
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initrd_size = load_image_targphys(initrd_filename,
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SDRAM_BASE + INITRD_LOAD_OFFSET,
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SDRAM_SIZE - INITRD_LOAD_OFFSET);
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if (initrd_size < 0) {
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fprintf(stderr, "qemu: could not load initrd '%s'\n", initrd_filename);
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exit(1);
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}
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/* initialization which should be done by firmware */
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boot_params.loader_type = 1;
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boot_params.initrd_start = INITRD_LOAD_OFFSET;
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boot_params.initrd_size = initrd_size;
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}
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if (kernel_cmdline) {
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/* I see no evidence that this .kernel_cmdline buffer requires
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NUL-termination, so using strncpy should be ok. */
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strncpy(boot_params.kernel_cmdline, kernel_cmdline,
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sizeof(boot_params.kernel_cmdline));
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}
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rom_add_blob_fixed("boot_params", &boot_params, sizeof(boot_params),
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SDRAM_BASE + BOOT_PARAMS_OFFSET);
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}
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static QEMUMachine r2d_machine = {
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.name = "r2d",
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.desc = "r2d-plus board",
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.init = r2d_init,
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};
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static void r2d_machine_init(void)
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{
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qemu_register_machine(&r2d_machine);
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}
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machine_init(r2d_machine_init);
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