bc8c2ecfd0
The i.MX6UL always has a single Cortex-A7 CPU (we set FSL_IMX6UL_NUM_CPUS to 1 in line with this). This means that all the code in fsl-imx6ul.c to handle multiple CPUs is dead code, and Coverity is now complaining that it is unreachable (CID 1403008, 1403011). Remove the unreachable code and the only-executes-once loops, and replace the single-entry cpu[] array in the FSLIMX6ULState with a simple cpu member. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Message-id: 20190712115030.26895-1-peter.maydell@linaro.org
85 lines
2.6 KiB
C
85 lines
2.6 KiB
C
/*
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* Copyright (c) 2018 Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* MCIMX6UL_EVK Board System emulation.
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*
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* This code is licensed under the GPL, version 2 or later.
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* See the file `COPYING' in the top level directory.
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*
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* It (partially) emulates a mcimx6ul_evk board, with a Freescale
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* i.MX6ul SoC
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/fsl-imx6ul.h"
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#include "hw/boards.h"
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#include "sysemu/sysemu.h"
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#include "qemu/error-report.h"
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#include "sysemu/qtest.h"
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typedef struct {
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FslIMX6ULState soc;
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MemoryRegion ram;
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} MCIMX6ULEVK;
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static void mcimx6ul_evk_init(MachineState *machine)
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{
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static struct arm_boot_info boot_info;
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MCIMX6ULEVK *s = g_new0(MCIMX6ULEVK, 1);
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int i;
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if (machine->ram_size > FSL_IMX6UL_MMDC_SIZE) {
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error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
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machine->ram_size, FSL_IMX6UL_MMDC_SIZE);
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exit(1);
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}
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boot_info = (struct arm_boot_info) {
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.loader_start = FSL_IMX6UL_MMDC_ADDR,
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.board_id = -1,
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.ram_size = machine->ram_size,
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.kernel_filename = machine->kernel_filename,
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.kernel_cmdline = machine->kernel_cmdline,
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.initrd_filename = machine->initrd_filename,
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.nb_cpus = machine->smp.cpus,
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};
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object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc),
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TYPE_FSL_IMX6UL, &error_fatal, NULL);
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object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fatal);
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memory_region_allocate_system_memory(&s->ram, NULL, "mcimx6ul-evk.ram",
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machine->ram_size);
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memory_region_add_subregion(get_system_memory(),
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FSL_IMX6UL_MMDC_ADDR, &s->ram);
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for (i = 0; i < FSL_IMX6UL_NUM_USDHCS; i++) {
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BusState *bus;
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DeviceState *carddev;
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DriveInfo *di;
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BlockBackend *blk;
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di = drive_get_next(IF_SD);
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blk = di ? blk_by_legacy_dinfo(di) : NULL;
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bus = qdev_get_child_bus(DEVICE(&s->soc.usdhc[i]), "sd-bus");
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carddev = qdev_create(bus, TYPE_SD_CARD);
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qdev_prop_set_drive(carddev, "drive", blk, &error_fatal);
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object_property_set_bool(OBJECT(carddev), true,
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"realized", &error_fatal);
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}
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if (!qtest_enabled()) {
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arm_load_kernel(&s->soc.cpu, &boot_info);
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}
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}
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static void mcimx6ul_evk_machine_init(MachineClass *mc)
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{
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mc->desc = "Freescale i.MX6UL Evaluation Kit (Cortex A7)";
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mc->init = mcimx6ul_evk_init;
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mc->max_cpus = FSL_IMX6UL_NUM_CPUS;
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}
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DEFINE_MACHINE("mcimx6ul-evk", mcimx6ul_evk_machine_init)
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