When adding a rom_device in I/O mode, we incorrectly masked off the low bits, resulting in a pure RAM map. Fix my masking off the high bits and IO_MEM_ROMD, yielding a pure I/O map. Signed-off-by: Avi Kivity <avi@redhat.com>
1256 lines
36 KiB
C
1256 lines
36 KiB
C
/*
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* Physical memory management
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*
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* Copyright 2011 Red Hat, Inc. and/or its affiliates
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*
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* Authors:
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* Avi Kivity <avi@redhat.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See
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* the COPYING file in the top-level directory.
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*
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*/
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#include "memory.h"
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#include "exec-memory.h"
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#include "ioport.h"
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#include "bitops.h"
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#include "kvm.h"
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#include <assert.h>
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unsigned memory_region_transaction_depth = 0;
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typedef struct AddrRange AddrRange;
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/*
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* Note using signed integers limits us to physical addresses at most
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* 63 bits wide. They are needed for negative offsetting in aliases
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* (large MemoryRegion::alias_offset).
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*/
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struct AddrRange {
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int64_t start;
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int64_t size;
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};
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static AddrRange addrrange_make(int64_t start, int64_t size)
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{
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return (AddrRange) { start, size };
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}
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static bool addrrange_equal(AddrRange r1, AddrRange r2)
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{
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return r1.start == r2.start && r1.size == r2.size;
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}
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static int64_t addrrange_end(AddrRange r)
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{
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return r.start + r.size;
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}
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static AddrRange addrrange_shift(AddrRange range, int64_t delta)
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{
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range.start += delta;
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return range;
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}
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static bool addrrange_intersects(AddrRange r1, AddrRange r2)
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{
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return (r1.start >= r2.start && r1.start < r2.start + r2.size)
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|| (r2.start >= r1.start && r2.start < r1.start + r1.size);
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}
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static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
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{
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int64_t start = MAX(r1.start, r2.start);
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/* off-by-one arithmetic to prevent overflow */
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int64_t end = MIN(addrrange_end(r1) - 1, addrrange_end(r2) - 1);
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return addrrange_make(start, end - start + 1);
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}
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struct CoalescedMemoryRange {
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AddrRange addr;
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QTAILQ_ENTRY(CoalescedMemoryRange) link;
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};
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struct MemoryRegionIoeventfd {
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AddrRange addr;
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bool match_data;
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uint64_t data;
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int fd;
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};
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static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd a,
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MemoryRegionIoeventfd b)
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{
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if (a.addr.start < b.addr.start) {
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return true;
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} else if (a.addr.start > b.addr.start) {
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return false;
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} else if (a.addr.size < b.addr.size) {
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return true;
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} else if (a.addr.size > b.addr.size) {
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return false;
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} else if (a.match_data < b.match_data) {
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return true;
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} else if (a.match_data > b.match_data) {
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return false;
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} else if (a.match_data) {
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if (a.data < b.data) {
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return true;
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} else if (a.data > b.data) {
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return false;
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}
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}
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if (a.fd < b.fd) {
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return true;
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} else if (a.fd > b.fd) {
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return false;
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}
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return false;
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}
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static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd a,
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MemoryRegionIoeventfd b)
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{
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return !memory_region_ioeventfd_before(a, b)
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&& !memory_region_ioeventfd_before(b, a);
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}
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typedef struct FlatRange FlatRange;
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typedef struct FlatView FlatView;
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/* Range of memory in the global map. Addresses are absolute. */
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struct FlatRange {
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MemoryRegion *mr;
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target_phys_addr_t offset_in_region;
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AddrRange addr;
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uint8_t dirty_log_mask;
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bool readable;
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};
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/* Flattened global view of current active memory hierarchy. Kept in sorted
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* order.
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*/
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struct FlatView {
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FlatRange *ranges;
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unsigned nr;
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unsigned nr_allocated;
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};
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typedef struct AddressSpace AddressSpace;
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typedef struct AddressSpaceOps AddressSpaceOps;
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/* A system address space - I/O, memory, etc. */
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struct AddressSpace {
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const AddressSpaceOps *ops;
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MemoryRegion *root;
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FlatView current_map;
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int ioeventfd_nb;
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MemoryRegionIoeventfd *ioeventfds;
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};
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struct AddressSpaceOps {
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void (*range_add)(AddressSpace *as, FlatRange *fr);
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void (*range_del)(AddressSpace *as, FlatRange *fr);
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void (*log_start)(AddressSpace *as, FlatRange *fr);
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void (*log_stop)(AddressSpace *as, FlatRange *fr);
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void (*ioeventfd_add)(AddressSpace *as, MemoryRegionIoeventfd *fd);
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void (*ioeventfd_del)(AddressSpace *as, MemoryRegionIoeventfd *fd);
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};
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#define FOR_EACH_FLAT_RANGE(var, view) \
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for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
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static bool flatrange_equal(FlatRange *a, FlatRange *b)
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{
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return a->mr == b->mr
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&& addrrange_equal(a->addr, b->addr)
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&& a->offset_in_region == b->offset_in_region
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&& a->readable == b->readable;
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}
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static void flatview_init(FlatView *view)
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{
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view->ranges = NULL;
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view->nr = 0;
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view->nr_allocated = 0;
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}
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/* Insert a range into a given position. Caller is responsible for maintaining
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* sorting order.
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*/
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static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
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{
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if (view->nr == view->nr_allocated) {
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view->nr_allocated = MAX(2 * view->nr, 10);
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view->ranges = g_realloc(view->ranges,
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view->nr_allocated * sizeof(*view->ranges));
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}
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memmove(view->ranges + pos + 1, view->ranges + pos,
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(view->nr - pos) * sizeof(FlatRange));
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view->ranges[pos] = *range;
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++view->nr;
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}
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static void flatview_destroy(FlatView *view)
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{
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g_free(view->ranges);
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}
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static bool can_merge(FlatRange *r1, FlatRange *r2)
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{
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return addrrange_end(r1->addr) == r2->addr.start
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&& r1->mr == r2->mr
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&& r1->offset_in_region + r1->addr.size == r2->offset_in_region
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&& r1->dirty_log_mask == r2->dirty_log_mask
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&& r1->readable == r2->readable;
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}
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/* Attempt to simplify a view by merging ajacent ranges */
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static void flatview_simplify(FlatView *view)
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{
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unsigned i, j;
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i = 0;
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while (i < view->nr) {
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j = i + 1;
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while (j < view->nr
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&& can_merge(&view->ranges[j-1], &view->ranges[j])) {
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view->ranges[i].addr.size += view->ranges[j].addr.size;
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++j;
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}
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++i;
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memmove(&view->ranges[i], &view->ranges[j],
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(view->nr - j) * sizeof(view->ranges[j]));
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view->nr -= j - i;
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}
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}
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static void memory_region_read_accessor(void *opaque,
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target_phys_addr_t addr,
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uint64_t *value,
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unsigned size,
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unsigned shift,
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uint64_t mask)
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{
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MemoryRegion *mr = opaque;
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uint64_t tmp;
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tmp = mr->ops->read(mr->opaque, addr, size);
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*value |= (tmp & mask) << shift;
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}
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static void memory_region_write_accessor(void *opaque,
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target_phys_addr_t addr,
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uint64_t *value,
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unsigned size,
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unsigned shift,
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uint64_t mask)
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{
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MemoryRegion *mr = opaque;
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uint64_t tmp;
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tmp = (*value >> shift) & mask;
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mr->ops->write(mr->opaque, addr, tmp, size);
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}
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static void access_with_adjusted_size(target_phys_addr_t addr,
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uint64_t *value,
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unsigned size,
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unsigned access_size_min,
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unsigned access_size_max,
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void (*access)(void *opaque,
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target_phys_addr_t addr,
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uint64_t *value,
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unsigned size,
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unsigned shift,
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uint64_t mask),
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void *opaque)
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{
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uint64_t access_mask;
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unsigned access_size;
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unsigned i;
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if (!access_size_min) {
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access_size_min = 1;
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}
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if (!access_size_max) {
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access_size_max = 4;
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}
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access_size = MAX(MIN(size, access_size_max), access_size_min);
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access_mask = -1ULL >> (64 - access_size * 8);
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for (i = 0; i < size; i += access_size) {
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/* FIXME: big-endian support */
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access(opaque, addr + i, value, access_size, i * 8, access_mask);
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}
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}
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static void memory_region_prepare_ram_addr(MemoryRegion *mr);
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static void as_memory_range_add(AddressSpace *as, FlatRange *fr)
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{
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ram_addr_t phys_offset, region_offset;
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memory_region_prepare_ram_addr(fr->mr);
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phys_offset = fr->mr->ram_addr;
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region_offset = fr->offset_in_region;
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/* cpu_register_physical_memory_log() wants region_offset for
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* mmio, but prefers offseting phys_offset for RAM. Humour it.
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*/
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if ((phys_offset & ~TARGET_PAGE_MASK) <= IO_MEM_ROM) {
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phys_offset += region_offset;
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region_offset = 0;
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}
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if (!fr->readable) {
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phys_offset &= ~TARGET_PAGE_MASK & ~IO_MEM_ROMD;
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}
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cpu_register_physical_memory_log(fr->addr.start,
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fr->addr.size,
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phys_offset,
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region_offset,
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fr->dirty_log_mask);
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}
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static void as_memory_range_del(AddressSpace *as, FlatRange *fr)
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{
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if (fr->dirty_log_mask) {
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cpu_physical_sync_dirty_bitmap(fr->addr.start,
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fr->addr.start + fr->addr.size);
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}
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cpu_register_physical_memory(fr->addr.start, fr->addr.size,
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IO_MEM_UNASSIGNED);
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}
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static void as_memory_log_start(AddressSpace *as, FlatRange *fr)
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{
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cpu_physical_log_start(fr->addr.start, fr->addr.size);
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}
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static void as_memory_log_stop(AddressSpace *as, FlatRange *fr)
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{
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cpu_physical_log_stop(fr->addr.start, fr->addr.size);
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}
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static void as_memory_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
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{
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int r;
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assert(fd->match_data && fd->addr.size == 4);
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r = kvm_set_ioeventfd_mmio_long(fd->fd, fd->addr.start, fd->data, true);
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if (r < 0) {
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abort();
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}
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}
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static void as_memory_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
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{
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int r;
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r = kvm_set_ioeventfd_mmio_long(fd->fd, fd->addr.start, fd->data, false);
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if (r < 0) {
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abort();
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}
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}
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static const AddressSpaceOps address_space_ops_memory = {
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.range_add = as_memory_range_add,
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.range_del = as_memory_range_del,
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.log_start = as_memory_log_start,
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.log_stop = as_memory_log_stop,
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.ioeventfd_add = as_memory_ioeventfd_add,
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.ioeventfd_del = as_memory_ioeventfd_del,
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};
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static AddressSpace address_space_memory = {
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.ops = &address_space_ops_memory,
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};
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static const MemoryRegionPortio *find_portio(MemoryRegion *mr, uint64_t offset,
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unsigned width, bool write)
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{
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const MemoryRegionPortio *mrp;
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for (mrp = mr->ops->old_portio; mrp->size; ++mrp) {
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if (offset >= mrp->offset && offset < mrp->offset + mrp->len
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&& width == mrp->size
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&& (write ? (bool)mrp->write : (bool)mrp->read)) {
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return mrp;
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}
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}
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return NULL;
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}
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static void memory_region_iorange_read(IORange *iorange,
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uint64_t offset,
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unsigned width,
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uint64_t *data)
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{
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MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
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if (mr->ops->old_portio) {
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const MemoryRegionPortio *mrp = find_portio(mr, offset, width, false);
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*data = ((uint64_t)1 << (width * 8)) - 1;
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if (mrp) {
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*data = mrp->read(mr->opaque, offset);
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}
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return;
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}
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*data = 0;
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access_with_adjusted_size(offset, data, width,
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mr->ops->impl.min_access_size,
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mr->ops->impl.max_access_size,
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memory_region_read_accessor, mr);
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}
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static void memory_region_iorange_write(IORange *iorange,
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uint64_t offset,
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unsigned width,
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uint64_t data)
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{
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MemoryRegion *mr = container_of(iorange, MemoryRegion, iorange);
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if (mr->ops->old_portio) {
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const MemoryRegionPortio *mrp = find_portio(mr, offset, width, true);
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if (mrp) {
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mrp->write(mr->opaque, offset, data);
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}
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return;
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}
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access_with_adjusted_size(offset, &data, width,
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mr->ops->impl.min_access_size,
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mr->ops->impl.max_access_size,
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memory_region_write_accessor, mr);
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}
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|
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static const IORangeOps memory_region_iorange_ops = {
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.read = memory_region_iorange_read,
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.write = memory_region_iorange_write,
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};
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|
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static void as_io_range_add(AddressSpace *as, FlatRange *fr)
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{
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iorange_init(&fr->mr->iorange, &memory_region_iorange_ops,
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fr->addr.start,fr->addr.size);
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ioport_register(&fr->mr->iorange);
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}
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static void as_io_range_del(AddressSpace *as, FlatRange *fr)
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{
|
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isa_unassign_ioport(fr->addr.start, fr->addr.size);
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}
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|
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static void as_io_ioeventfd_add(AddressSpace *as, MemoryRegionIoeventfd *fd)
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{
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int r;
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assert(fd->match_data && fd->addr.size == 2);
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r = kvm_set_ioeventfd_pio_word(fd->fd, fd->addr.start, fd->data, true);
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if (r < 0) {
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abort();
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}
|
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}
|
|
|
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static void as_io_ioeventfd_del(AddressSpace *as, MemoryRegionIoeventfd *fd)
|
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{
|
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int r;
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|
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r = kvm_set_ioeventfd_pio_word(fd->fd, fd->addr.start, fd->data, false);
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if (r < 0) {
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abort();
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}
|
|
}
|
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|
|
static const AddressSpaceOps address_space_ops_io = {
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.range_add = as_io_range_add,
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.range_del = as_io_range_del,
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.ioeventfd_add = as_io_ioeventfd_add,
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.ioeventfd_del = as_io_ioeventfd_del,
|
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};
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|
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static AddressSpace address_space_io = {
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.ops = &address_space_ops_io,
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};
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|
|
/* Render a memory region into the global view. Ranges in @view obscure
|
|
* ranges in @mr.
|
|
*/
|
|
static void render_memory_region(FlatView *view,
|
|
MemoryRegion *mr,
|
|
target_phys_addr_t base,
|
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AddrRange clip)
|
|
{
|
|
MemoryRegion *subregion;
|
|
unsigned i;
|
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target_phys_addr_t offset_in_region;
|
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int64_t remain;
|
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int64_t now;
|
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FlatRange fr;
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AddrRange tmp;
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base += mr->addr;
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tmp = addrrange_make(base, mr->size);
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|
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if (!addrrange_intersects(tmp, clip)) {
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return;
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}
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|
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clip = addrrange_intersection(tmp, clip);
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|
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if (mr->alias) {
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base -= mr->alias->addr;
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base -= mr->alias_offset;
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render_memory_region(view, mr->alias, base, clip);
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return;
|
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}
|
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|
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/* Render subregions in priority order. */
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QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
|
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render_memory_region(view, subregion, base, clip);
|
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}
|
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|
|
if (!mr->terminates) {
|
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return;
|
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}
|
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|
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offset_in_region = clip.start - base;
|
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base = clip.start;
|
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remain = clip.size;
|
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|
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/* Render the region itself into any gaps left by the current view. */
|
|
for (i = 0; i < view->nr && remain; ++i) {
|
|
if (base >= addrrange_end(view->ranges[i].addr)) {
|
|
continue;
|
|
}
|
|
if (base < view->ranges[i].addr.start) {
|
|
now = MIN(remain, view->ranges[i].addr.start - base);
|
|
fr.mr = mr;
|
|
fr.offset_in_region = offset_in_region;
|
|
fr.addr = addrrange_make(base, now);
|
|
fr.dirty_log_mask = mr->dirty_log_mask;
|
|
fr.readable = mr->readable;
|
|
flatview_insert(view, i, &fr);
|
|
++i;
|
|
base += now;
|
|
offset_in_region += now;
|
|
remain -= now;
|
|
}
|
|
if (base == view->ranges[i].addr.start) {
|
|
now = MIN(remain, view->ranges[i].addr.size);
|
|
base += now;
|
|
offset_in_region += now;
|
|
remain -= now;
|
|
}
|
|
}
|
|
if (remain) {
|
|
fr.mr = mr;
|
|
fr.offset_in_region = offset_in_region;
|
|
fr.addr = addrrange_make(base, remain);
|
|
fr.dirty_log_mask = mr->dirty_log_mask;
|
|
fr.readable = mr->readable;
|
|
flatview_insert(view, i, &fr);
|
|
}
|
|
}
|
|
|
|
/* Render a memory topology into a list of disjoint absolute ranges. */
|
|
static FlatView generate_memory_topology(MemoryRegion *mr)
|
|
{
|
|
FlatView view;
|
|
|
|
flatview_init(&view);
|
|
|
|
render_memory_region(&view, mr, 0, addrrange_make(0, INT64_MAX));
|
|
flatview_simplify(&view);
|
|
|
|
return view;
|
|
}
|
|
|
|
static void address_space_add_del_ioeventfds(AddressSpace *as,
|
|
MemoryRegionIoeventfd *fds_new,
|
|
unsigned fds_new_nb,
|
|
MemoryRegionIoeventfd *fds_old,
|
|
unsigned fds_old_nb)
|
|
{
|
|
unsigned iold, inew;
|
|
|
|
/* Generate a symmetric difference of the old and new fd sets, adding
|
|
* and deleting as necessary.
|
|
*/
|
|
|
|
iold = inew = 0;
|
|
while (iold < fds_old_nb || inew < fds_new_nb) {
|
|
if (iold < fds_old_nb
|
|
&& (inew == fds_new_nb
|
|
|| memory_region_ioeventfd_before(fds_old[iold],
|
|
fds_new[inew]))) {
|
|
as->ops->ioeventfd_del(as, &fds_old[iold]);
|
|
++iold;
|
|
} else if (inew < fds_new_nb
|
|
&& (iold == fds_old_nb
|
|
|| memory_region_ioeventfd_before(fds_new[inew],
|
|
fds_old[iold]))) {
|
|
as->ops->ioeventfd_add(as, &fds_new[inew]);
|
|
++inew;
|
|
} else {
|
|
++iold;
|
|
++inew;
|
|
}
|
|
}
|
|
}
|
|
|
|
static void address_space_update_ioeventfds(AddressSpace *as)
|
|
{
|
|
FlatRange *fr;
|
|
unsigned ioeventfd_nb = 0;
|
|
MemoryRegionIoeventfd *ioeventfds = NULL;
|
|
AddrRange tmp;
|
|
unsigned i;
|
|
|
|
FOR_EACH_FLAT_RANGE(fr, &as->current_map) {
|
|
for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
|
|
tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
|
|
fr->addr.start - fr->offset_in_region);
|
|
if (addrrange_intersects(fr->addr, tmp)) {
|
|
++ioeventfd_nb;
|
|
ioeventfds = g_realloc(ioeventfds,
|
|
ioeventfd_nb * sizeof(*ioeventfds));
|
|
ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
|
|
ioeventfds[ioeventfd_nb-1].addr = tmp;
|
|
}
|
|
}
|
|
}
|
|
|
|
address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
|
|
as->ioeventfds, as->ioeventfd_nb);
|
|
|
|
g_free(as->ioeventfds);
|
|
as->ioeventfds = ioeventfds;
|
|
as->ioeventfd_nb = ioeventfd_nb;
|
|
}
|
|
|
|
static void address_space_update_topology_pass(AddressSpace *as,
|
|
FlatView old_view,
|
|
FlatView new_view,
|
|
bool adding)
|
|
{
|
|
unsigned iold, inew;
|
|
FlatRange *frold, *frnew;
|
|
|
|
/* Generate a symmetric difference of the old and new memory maps.
|
|
* Kill ranges in the old map, and instantiate ranges in the new map.
|
|
*/
|
|
iold = inew = 0;
|
|
while (iold < old_view.nr || inew < new_view.nr) {
|
|
if (iold < old_view.nr) {
|
|
frold = &old_view.ranges[iold];
|
|
} else {
|
|
frold = NULL;
|
|
}
|
|
if (inew < new_view.nr) {
|
|
frnew = &new_view.ranges[inew];
|
|
} else {
|
|
frnew = NULL;
|
|
}
|
|
|
|
if (frold
|
|
&& (!frnew
|
|
|| frold->addr.start < frnew->addr.start
|
|
|| (frold->addr.start == frnew->addr.start
|
|
&& !flatrange_equal(frold, frnew)))) {
|
|
/* In old, but (not in new, or in new but attributes changed). */
|
|
|
|
if (!adding) {
|
|
as->ops->range_del(as, frold);
|
|
}
|
|
|
|
++iold;
|
|
} else if (frold && frnew && flatrange_equal(frold, frnew)) {
|
|
/* In both (logging may have changed) */
|
|
|
|
if (adding) {
|
|
if (frold->dirty_log_mask && !frnew->dirty_log_mask) {
|
|
as->ops->log_stop(as, frnew);
|
|
} else if (frnew->dirty_log_mask && !frold->dirty_log_mask) {
|
|
as->ops->log_start(as, frnew);
|
|
}
|
|
}
|
|
|
|
++iold;
|
|
++inew;
|
|
} else {
|
|
/* In new */
|
|
|
|
if (adding) {
|
|
as->ops->range_add(as, frnew);
|
|
}
|
|
|
|
++inew;
|
|
}
|
|
}
|
|
}
|
|
|
|
|
|
static void address_space_update_topology(AddressSpace *as)
|
|
{
|
|
FlatView old_view = as->current_map;
|
|
FlatView new_view = generate_memory_topology(as->root);
|
|
|
|
address_space_update_topology_pass(as, old_view, new_view, false);
|
|
address_space_update_topology_pass(as, old_view, new_view, true);
|
|
|
|
as->current_map = new_view;
|
|
flatview_destroy(&old_view);
|
|
address_space_update_ioeventfds(as);
|
|
}
|
|
|
|
static void memory_region_update_topology(void)
|
|
{
|
|
if (memory_region_transaction_depth) {
|
|
return;
|
|
}
|
|
|
|
if (address_space_memory.root) {
|
|
address_space_update_topology(&address_space_memory);
|
|
}
|
|
if (address_space_io.root) {
|
|
address_space_update_topology(&address_space_io);
|
|
}
|
|
}
|
|
|
|
void memory_region_transaction_begin(void)
|
|
{
|
|
++memory_region_transaction_depth;
|
|
}
|
|
|
|
void memory_region_transaction_commit(void)
|
|
{
|
|
assert(memory_region_transaction_depth);
|
|
--memory_region_transaction_depth;
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
static void memory_region_destructor_none(MemoryRegion *mr)
|
|
{
|
|
}
|
|
|
|
static void memory_region_destructor_ram(MemoryRegion *mr)
|
|
{
|
|
qemu_ram_free(mr->ram_addr);
|
|
}
|
|
|
|
static void memory_region_destructor_ram_from_ptr(MemoryRegion *mr)
|
|
{
|
|
qemu_ram_free_from_ptr(mr->ram_addr);
|
|
}
|
|
|
|
static void memory_region_destructor_iomem(MemoryRegion *mr)
|
|
{
|
|
cpu_unregister_io_memory(mr->ram_addr);
|
|
}
|
|
|
|
static void memory_region_destructor_rom_device(MemoryRegion *mr)
|
|
{
|
|
qemu_ram_free(mr->ram_addr & TARGET_PAGE_MASK);
|
|
cpu_unregister_io_memory(mr->ram_addr & ~(TARGET_PAGE_MASK | IO_MEM_ROMD));
|
|
}
|
|
|
|
void memory_region_init(MemoryRegion *mr,
|
|
const char *name,
|
|
uint64_t size)
|
|
{
|
|
mr->ops = NULL;
|
|
mr->parent = NULL;
|
|
mr->size = size;
|
|
mr->addr = 0;
|
|
mr->offset = 0;
|
|
mr->terminates = false;
|
|
mr->readable = true;
|
|
mr->destructor = memory_region_destructor_none;
|
|
mr->priority = 0;
|
|
mr->may_overlap = false;
|
|
mr->alias = NULL;
|
|
QTAILQ_INIT(&mr->subregions);
|
|
memset(&mr->subregions_link, 0, sizeof mr->subregions_link);
|
|
QTAILQ_INIT(&mr->coalesced);
|
|
mr->name = g_strdup(name);
|
|
mr->dirty_log_mask = 0;
|
|
mr->ioeventfd_nb = 0;
|
|
mr->ioeventfds = NULL;
|
|
}
|
|
|
|
static bool memory_region_access_valid(MemoryRegion *mr,
|
|
target_phys_addr_t addr,
|
|
unsigned size)
|
|
{
|
|
if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
|
|
return false;
|
|
}
|
|
|
|
/* Treat zero as compatibility all valid */
|
|
if (!mr->ops->valid.max_access_size) {
|
|
return true;
|
|
}
|
|
|
|
if (size > mr->ops->valid.max_access_size
|
|
|| size < mr->ops->valid.min_access_size) {
|
|
return false;
|
|
}
|
|
return true;
|
|
}
|
|
|
|
static uint32_t memory_region_read_thunk_n(void *_mr,
|
|
target_phys_addr_t addr,
|
|
unsigned size)
|
|
{
|
|
MemoryRegion *mr = _mr;
|
|
uint64_t data = 0;
|
|
|
|
if (!memory_region_access_valid(mr, addr, size)) {
|
|
return -1U; /* FIXME: better signalling */
|
|
}
|
|
|
|
if (!mr->ops->read) {
|
|
return mr->ops->old_mmio.read[bitops_ffsl(size)](mr->opaque, addr);
|
|
}
|
|
|
|
/* FIXME: support unaligned access */
|
|
access_with_adjusted_size(addr + mr->offset, &data, size,
|
|
mr->ops->impl.min_access_size,
|
|
mr->ops->impl.max_access_size,
|
|
memory_region_read_accessor, mr);
|
|
|
|
return data;
|
|
}
|
|
|
|
static void memory_region_write_thunk_n(void *_mr,
|
|
target_phys_addr_t addr,
|
|
unsigned size,
|
|
uint64_t data)
|
|
{
|
|
MemoryRegion *mr = _mr;
|
|
|
|
if (!memory_region_access_valid(mr, addr, size)) {
|
|
return; /* FIXME: better signalling */
|
|
}
|
|
|
|
if (!mr->ops->write) {
|
|
mr->ops->old_mmio.write[bitops_ffsl(size)](mr->opaque, addr, data);
|
|
return;
|
|
}
|
|
|
|
/* FIXME: support unaligned access */
|
|
access_with_adjusted_size(addr + mr->offset, &data, size,
|
|
mr->ops->impl.min_access_size,
|
|
mr->ops->impl.max_access_size,
|
|
memory_region_write_accessor, mr);
|
|
}
|
|
|
|
static uint32_t memory_region_read_thunk_b(void *mr, target_phys_addr_t addr)
|
|
{
|
|
return memory_region_read_thunk_n(mr, addr, 1);
|
|
}
|
|
|
|
static uint32_t memory_region_read_thunk_w(void *mr, target_phys_addr_t addr)
|
|
{
|
|
return memory_region_read_thunk_n(mr, addr, 2);
|
|
}
|
|
|
|
static uint32_t memory_region_read_thunk_l(void *mr, target_phys_addr_t addr)
|
|
{
|
|
return memory_region_read_thunk_n(mr, addr, 4);
|
|
}
|
|
|
|
static void memory_region_write_thunk_b(void *mr, target_phys_addr_t addr,
|
|
uint32_t data)
|
|
{
|
|
memory_region_write_thunk_n(mr, addr, 1, data);
|
|
}
|
|
|
|
static void memory_region_write_thunk_w(void *mr, target_phys_addr_t addr,
|
|
uint32_t data)
|
|
{
|
|
memory_region_write_thunk_n(mr, addr, 2, data);
|
|
}
|
|
|
|
static void memory_region_write_thunk_l(void *mr, target_phys_addr_t addr,
|
|
uint32_t data)
|
|
{
|
|
memory_region_write_thunk_n(mr, addr, 4, data);
|
|
}
|
|
|
|
static CPUReadMemoryFunc * const memory_region_read_thunk[] = {
|
|
memory_region_read_thunk_b,
|
|
memory_region_read_thunk_w,
|
|
memory_region_read_thunk_l,
|
|
};
|
|
|
|
static CPUWriteMemoryFunc * const memory_region_write_thunk[] = {
|
|
memory_region_write_thunk_b,
|
|
memory_region_write_thunk_w,
|
|
memory_region_write_thunk_l,
|
|
};
|
|
|
|
static void memory_region_prepare_ram_addr(MemoryRegion *mr)
|
|
{
|
|
if (mr->backend_registered) {
|
|
return;
|
|
}
|
|
|
|
mr->destructor = memory_region_destructor_iomem;
|
|
mr->ram_addr = cpu_register_io_memory(memory_region_read_thunk,
|
|
memory_region_write_thunk,
|
|
mr,
|
|
mr->ops->endianness);
|
|
mr->backend_registered = true;
|
|
}
|
|
|
|
void memory_region_init_io(MemoryRegion *mr,
|
|
const MemoryRegionOps *ops,
|
|
void *opaque,
|
|
const char *name,
|
|
uint64_t size)
|
|
{
|
|
memory_region_init(mr, name, size);
|
|
mr->ops = ops;
|
|
mr->opaque = opaque;
|
|
mr->terminates = true;
|
|
mr->backend_registered = false;
|
|
}
|
|
|
|
void memory_region_init_ram(MemoryRegion *mr,
|
|
DeviceState *dev,
|
|
const char *name,
|
|
uint64_t size)
|
|
{
|
|
memory_region_init(mr, name, size);
|
|
mr->terminates = true;
|
|
mr->destructor = memory_region_destructor_ram;
|
|
mr->ram_addr = qemu_ram_alloc(dev, name, size);
|
|
mr->backend_registered = true;
|
|
}
|
|
|
|
void memory_region_init_ram_ptr(MemoryRegion *mr,
|
|
DeviceState *dev,
|
|
const char *name,
|
|
uint64_t size,
|
|
void *ptr)
|
|
{
|
|
memory_region_init(mr, name, size);
|
|
mr->terminates = true;
|
|
mr->destructor = memory_region_destructor_ram_from_ptr;
|
|
mr->ram_addr = qemu_ram_alloc_from_ptr(dev, name, size, ptr);
|
|
mr->backend_registered = true;
|
|
}
|
|
|
|
void memory_region_init_alias(MemoryRegion *mr,
|
|
const char *name,
|
|
MemoryRegion *orig,
|
|
target_phys_addr_t offset,
|
|
uint64_t size)
|
|
{
|
|
memory_region_init(mr, name, size);
|
|
mr->alias = orig;
|
|
mr->alias_offset = offset;
|
|
}
|
|
|
|
void memory_region_init_rom_device(MemoryRegion *mr,
|
|
const MemoryRegionOps *ops,
|
|
void *opaque,
|
|
DeviceState *dev,
|
|
const char *name,
|
|
uint64_t size)
|
|
{
|
|
memory_region_init(mr, name, size);
|
|
mr->ops = ops;
|
|
mr->opaque = opaque;
|
|
mr->terminates = true;
|
|
mr->destructor = memory_region_destructor_rom_device;
|
|
mr->ram_addr = qemu_ram_alloc(dev, name, size);
|
|
mr->ram_addr |= cpu_register_io_memory(memory_region_read_thunk,
|
|
memory_region_write_thunk,
|
|
mr,
|
|
mr->ops->endianness);
|
|
mr->ram_addr |= IO_MEM_ROMD;
|
|
mr->backend_registered = true;
|
|
}
|
|
|
|
void memory_region_destroy(MemoryRegion *mr)
|
|
{
|
|
assert(QTAILQ_EMPTY(&mr->subregions));
|
|
mr->destructor(mr);
|
|
memory_region_clear_coalescing(mr);
|
|
g_free((char *)mr->name);
|
|
g_free(mr->ioeventfds);
|
|
}
|
|
|
|
uint64_t memory_region_size(MemoryRegion *mr)
|
|
{
|
|
return mr->size;
|
|
}
|
|
|
|
void memory_region_set_offset(MemoryRegion *mr, target_phys_addr_t offset)
|
|
{
|
|
mr->offset = offset;
|
|
}
|
|
|
|
void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
|
|
{
|
|
uint8_t mask = 1 << client;
|
|
|
|
mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
bool memory_region_get_dirty(MemoryRegion *mr, target_phys_addr_t addr,
|
|
unsigned client)
|
|
{
|
|
assert(mr->terminates);
|
|
return cpu_physical_memory_get_dirty(mr->ram_addr + addr, 1 << client);
|
|
}
|
|
|
|
void memory_region_set_dirty(MemoryRegion *mr, target_phys_addr_t addr)
|
|
{
|
|
assert(mr->terminates);
|
|
return cpu_physical_memory_set_dirty(mr->ram_addr + addr);
|
|
}
|
|
|
|
void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
|
|
{
|
|
FlatRange *fr;
|
|
|
|
FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
|
|
if (fr->mr == mr) {
|
|
cpu_physical_sync_dirty_bitmap(fr->addr.start,
|
|
fr->addr.start + fr->addr.size);
|
|
}
|
|
}
|
|
}
|
|
|
|
void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
|
|
{
|
|
/* FIXME */
|
|
}
|
|
|
|
void memory_region_rom_device_set_readable(MemoryRegion *mr, bool readable)
|
|
{
|
|
if (mr->readable != readable) {
|
|
mr->readable = readable;
|
|
memory_region_update_topology();
|
|
}
|
|
}
|
|
|
|
void memory_region_reset_dirty(MemoryRegion *mr, target_phys_addr_t addr,
|
|
target_phys_addr_t size, unsigned client)
|
|
{
|
|
assert(mr->terminates);
|
|
cpu_physical_memory_reset_dirty(mr->ram_addr + addr,
|
|
mr->ram_addr + addr + size,
|
|
1 << client);
|
|
}
|
|
|
|
void *memory_region_get_ram_ptr(MemoryRegion *mr)
|
|
{
|
|
if (mr->alias) {
|
|
return memory_region_get_ram_ptr(mr->alias) + mr->alias_offset;
|
|
}
|
|
|
|
assert(mr->terminates);
|
|
|
|
return qemu_get_ram_ptr(mr->ram_addr);
|
|
}
|
|
|
|
static void memory_region_update_coalesced_range(MemoryRegion *mr)
|
|
{
|
|
FlatRange *fr;
|
|
CoalescedMemoryRange *cmr;
|
|
AddrRange tmp;
|
|
|
|
FOR_EACH_FLAT_RANGE(fr, &address_space_memory.current_map) {
|
|
if (fr->mr == mr) {
|
|
qemu_unregister_coalesced_mmio(fr->addr.start, fr->addr.size);
|
|
QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
|
|
tmp = addrrange_shift(cmr->addr,
|
|
fr->addr.start - fr->offset_in_region);
|
|
if (!addrrange_intersects(tmp, fr->addr)) {
|
|
continue;
|
|
}
|
|
tmp = addrrange_intersection(tmp, fr->addr);
|
|
qemu_register_coalesced_mmio(tmp.start, tmp.size);
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void memory_region_set_coalescing(MemoryRegion *mr)
|
|
{
|
|
memory_region_clear_coalescing(mr);
|
|
memory_region_add_coalescing(mr, 0, mr->size);
|
|
}
|
|
|
|
void memory_region_add_coalescing(MemoryRegion *mr,
|
|
target_phys_addr_t offset,
|
|
uint64_t size)
|
|
{
|
|
CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
|
|
|
|
cmr->addr = addrrange_make(offset, size);
|
|
QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
|
|
memory_region_update_coalesced_range(mr);
|
|
}
|
|
|
|
void memory_region_clear_coalescing(MemoryRegion *mr)
|
|
{
|
|
CoalescedMemoryRange *cmr;
|
|
|
|
while (!QTAILQ_EMPTY(&mr->coalesced)) {
|
|
cmr = QTAILQ_FIRST(&mr->coalesced);
|
|
QTAILQ_REMOVE(&mr->coalesced, cmr, link);
|
|
g_free(cmr);
|
|
}
|
|
memory_region_update_coalesced_range(mr);
|
|
}
|
|
|
|
void memory_region_add_eventfd(MemoryRegion *mr,
|
|
target_phys_addr_t addr,
|
|
unsigned size,
|
|
bool match_data,
|
|
uint64_t data,
|
|
int fd)
|
|
{
|
|
MemoryRegionIoeventfd mrfd = {
|
|
.addr.start = addr,
|
|
.addr.size = size,
|
|
.match_data = match_data,
|
|
.data = data,
|
|
.fd = fd,
|
|
};
|
|
unsigned i;
|
|
|
|
for (i = 0; i < mr->ioeventfd_nb; ++i) {
|
|
if (memory_region_ioeventfd_before(mrfd, mr->ioeventfds[i])) {
|
|
break;
|
|
}
|
|
}
|
|
++mr->ioeventfd_nb;
|
|
mr->ioeventfds = g_realloc(mr->ioeventfds,
|
|
sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
|
|
memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
|
|
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
|
|
mr->ioeventfds[i] = mrfd;
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
void memory_region_del_eventfd(MemoryRegion *mr,
|
|
target_phys_addr_t addr,
|
|
unsigned size,
|
|
bool match_data,
|
|
uint64_t data,
|
|
int fd)
|
|
{
|
|
MemoryRegionIoeventfd mrfd = {
|
|
.addr.start = addr,
|
|
.addr.size = size,
|
|
.match_data = match_data,
|
|
.data = data,
|
|
.fd = fd,
|
|
};
|
|
unsigned i;
|
|
|
|
for (i = 0; i < mr->ioeventfd_nb; ++i) {
|
|
if (memory_region_ioeventfd_equal(mrfd, mr->ioeventfds[i])) {
|
|
break;
|
|
}
|
|
}
|
|
assert(i != mr->ioeventfd_nb);
|
|
memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
|
|
sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
|
|
--mr->ioeventfd_nb;
|
|
mr->ioeventfds = g_realloc(mr->ioeventfds,
|
|
sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
static void memory_region_add_subregion_common(MemoryRegion *mr,
|
|
target_phys_addr_t offset,
|
|
MemoryRegion *subregion)
|
|
{
|
|
MemoryRegion *other;
|
|
|
|
assert(!subregion->parent);
|
|
subregion->parent = mr;
|
|
subregion->addr = offset;
|
|
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
|
|
if (subregion->may_overlap || other->may_overlap) {
|
|
continue;
|
|
}
|
|
if (offset >= other->offset + other->size
|
|
|| offset + subregion->size <= other->offset) {
|
|
continue;
|
|
}
|
|
#if 0
|
|
printf("warning: subregion collision %llx/%llx vs %llx/%llx\n",
|
|
(unsigned long long)offset,
|
|
(unsigned long long)subregion->size,
|
|
(unsigned long long)other->offset,
|
|
(unsigned long long)other->size);
|
|
#endif
|
|
}
|
|
QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
|
|
if (subregion->priority >= other->priority) {
|
|
QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
|
|
goto done;
|
|
}
|
|
}
|
|
QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
|
|
done:
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
|
|
void memory_region_add_subregion(MemoryRegion *mr,
|
|
target_phys_addr_t offset,
|
|
MemoryRegion *subregion)
|
|
{
|
|
subregion->may_overlap = false;
|
|
subregion->priority = 0;
|
|
memory_region_add_subregion_common(mr, offset, subregion);
|
|
}
|
|
|
|
void memory_region_add_subregion_overlap(MemoryRegion *mr,
|
|
target_phys_addr_t offset,
|
|
MemoryRegion *subregion,
|
|
unsigned priority)
|
|
{
|
|
subregion->may_overlap = true;
|
|
subregion->priority = priority;
|
|
memory_region_add_subregion_common(mr, offset, subregion);
|
|
}
|
|
|
|
void memory_region_del_subregion(MemoryRegion *mr,
|
|
MemoryRegion *subregion)
|
|
{
|
|
assert(subregion->parent == mr);
|
|
subregion->parent = NULL;
|
|
QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
void set_system_memory_map(MemoryRegion *mr)
|
|
{
|
|
address_space_memory.root = mr;
|
|
memory_region_update_topology();
|
|
}
|
|
|
|
void set_system_io_map(MemoryRegion *mr)
|
|
{
|
|
address_space_io.root = mr;
|
|
memory_region_update_topology();
|
|
}
|