David Woodhouse c1bb5418e3 target/i386: Support up to 32768 CPUs without IRQ remapping ... The IOAPIC has an 'Extended Destination ID' field in its RTE, which maps to bits 11-4 of the MSI address. Since those address bits fall within a given 4KiB page they were historically non-trivial to use on real hardware. The Intel IOMMU uses the lowest bit to indicate a remappable format MSI, and then the remaining 7 bits are part of the index. Where the remappable format bit isn't set, we can actually use the other seven to allow external (IOAPIC and MSI) interrupts to reach up to 32768 CPUs instead of just the 255 permitted on bare metal. Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Message-Id: <78097f9218300e63e751e077a0a5ca029b56ba46.camel@infradead.org> [Fix UBSAN warning. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>		2020-12-10 12:15:00 -05:00
..
hvf	hvf: Fix segment selector format	2020-11-18 09:32:17 +01:00
arch_dump.c	dump: add kernel_gs_base to QEMU CPU state	2018-07-16 16:13:34 +02:00
arch_memory_mapping.c	exec,dump,i386,ppc,s390x: don't include exec/cpu-all.h explicitly	2017-09-19 18:21:33 +02:00
bpt_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
cc_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
cc_helper_template.h	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
cpu-param.h	tcg: Split out target/arch/cpu-param.h	2019-06-10 07:03:34 -07:00
cpu-qom.h	qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros	2020-09-18 14:12:32 -04:00
cpu.c	target/i386: Support up to 32768 CPUs without IRQ remapping	2020-12-10 12:15:00 -05:00
cpu.h	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
excp_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
fpu_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
gdbstub.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
hax-all.c	hax: remove hax specific functions from global includes	2020-10-05 16:41:22 +02:00
hax-cpus.c	hax: unbreak accelerator cpu code after cpus.c split	2020-10-17 10:45:53 -04:00
hax-cpus.h	hax: remove hax specific functions from global includes	2020-10-05 16:41:22 +02:00
hax-i386.h	cpus: extract out hax-specific code to target/i386/	2020-10-05 16:41:22 +02:00
hax-interface.h	Clean up ill-advised or unusual header guards	2019-05-13 08:58:55 +02:00
hax-mem.c	hax: remove hax specific functions from global includes	2020-10-05 16:41:22 +02:00
hax-posix.c	hax: remove hax specific functions from global includes	2020-10-05 16:41:22 +02:00
hax-posix.h	Clean up header guards that don't match their file name	2019-05-13 08:58:55 +02:00
hax-windows.c	hax: remove hax specific functions from global includes	2020-10-05 16:41:22 +02:00
hax-windows.h	hax: remove hax specific functions from global includes	2020-10-05 16:41:22 +02:00
helper.c	target/i386: avoid theoretical leak on MCE injection	2020-11-16 13:22:18 -05:00
helper.h	target/i386: fix IEEE SSE floating-point exception raising	2020-07-10 18:02:17 -04:00
hyperv-proto.h	i386/kvm: add NoNonArchitecturalCoreSharing Hyper-V enlightenment	2019-10-22 09:38:42 +02:00
hyperv-stub.c	target/i386: fix feature check in hyperv-stub.c	2019-07-05 22:16:46 +02:00
hyperv.c	i386/kvm: convert hyperv enlightenments properties from bools to bits	2019-06-21 02:29:38 +02:00
hyperv.h	hyperv: qom-ify SynIC	2018-10-19 13:44:14 +02:00
int_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
kvm-stub.c	i386/kvm: Delete kvm_allows_irq0_override()	2020-10-14 15:28:54 -04:00
kvm.c	target/i386: Support up to 32768 CPUs without IRQ remapping	2020-12-10 12:15:00 -05:00
kvm_i386.h	target/i386: Support up to 32768 CPUs without IRQ remapping	2020-12-10 12:15:00 -05:00
machine.c	target/i386: support KVM_FEATURE_ASYNC_PF_INT	2020-09-30 19:09:19 +02:00
mem_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
meson.build	cpus: extract out whpx-specific code to target/i386/	2020-10-05 16:41:22 +02:00
misc_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
monitor.c	hmp: Pass monitor to mon_get_cpu_env()	2020-11-13 12:45:51 +00:00
mpx_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
ops_sse.h	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
ops_sse_header.h	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
seg_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
sev-stub.c	target/i386: sev: provide proper error reporting for query-sev-capabilities	2020-07-10 18:02:22 -04:00
sev.c	Use OBJECT_DECLARE_SIMPLE_TYPE when possible	2020-09-18 14:12:32 -04:00
sev_i386.h	target/i386: sev: provide proper error reporting for query-sev-capabilities	2020-07-10 18:02:22 -04:00
shift_helper_template.h	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
smm_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
svm.h	tcg/svm: use host cr4 during NPT page table walk	2020-07-10 18:02:14 -04:00
svm_helper.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
tcg-stub.c	x86 tcg cpus: Fix Lesser GPL version number	2020-11-15 16:41:42 +01:00
trace-events	trace-events: Shorten file names in comments	2019-03-22 16:18:07 +00:00
trace.h	trace: switch position of headers to what Meson requires	2020-08-21 06:18:24 -04:00
translate.c	target/i386: fix operand order for PDEP and PEXT	2020-12-10 12:14:49 -05:00
whp-dispatch.h	WHPX: vmware cpuid leaf for tsc and apic frequency	2020-09-30 19:09:19 +02:00
whpx-all.c	cpus: add handle_interrupt to the CpusAccel interface	2020-10-05 16:41:22 +02:00
whpx-cpus.c	cpus: extract out whpx-specific code to target/i386/	2020-10-05 16:41:22 +02:00
whpx-cpus.h	whpx: remove whpx specific functions from global includes	2020-10-05 16:41:22 +02:00
xsave_helper.c	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00