qemu-patch-raspberry4/target
David Hildenbrand c23908305b s390x/tcg: Fix RISBHG
RISBHG is broken and currently hinders clang-11 builds of upstream kernels
from booting: the kernel crashes early, while decompressing the image.

  [...]
   Kernel fault: interruption code 0005 ilc:2
   Kernel random base: 0000000000000000
   PSW : 0000200180000000 0000000000017a1e
         R:0 T:0 IO:0 EX:0 Key:0 M:0 W:0 P:0 AS:0 CC:2 PM:0 RI:0 EA:3
   GPRS: 0000000000000001 0000000c00000000 00000003fffffff4 00000000fffffff0
         0000000000000000 00000000fffffff4 000000000000000c 00000000fffffff0
         00000000fffffffc 0000000000000000 00000000fffffff8 00000000008e25a8
         0000000000000009 0000000000000002 0000000000000008 000000000000bce0

One example of a buggy instruction is:

    17dde:       ec 1e 00 9f 20 5d       risbhg  %r1,%r14,0,159,32

With %r14 = 0x9 and %r1 = 0x7 should result in %r1 = 0x900000007, however,
results in %r1 = 0.

Let's interpret values of i3/i4 as documented in the PoP and make
computation of "mask" only based on i3 and i4 and use "pmask" only at the
very end to make sure wrapping is only applied to the high/low doubleword.

With this patch, I can successfully boot a v5.11-rc2 kernel built with
clang-11, and gcc builds keep on working.

Fixes: 2d6a869833 ("target-s390: Implement RISBG")
Reported-by: Nick Desaulniers <ndesaulniers@google.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Signed-off-by: David Hildenbrand <david@redhat.com>
Message-Id: <20210111163845.18148-3-david@redhat.com>
Signed-off-by: Cornelia Huck <cohuck@redhat.com>
2021-01-21 11:19:45 +01:00
..
alpha migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
arm target/arm/m_helper: Silence GCC 10 maybe-uninitialized error 2021-01-19 15:45:14 +00:00
avr tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
cris cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
hppa tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
i386 target/i386: Use X86Seg enum for segment registers 2021-01-12 17:05:10 +01:00
lm32 nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
m68k gdbstub: drop CPUEnv from gdb_exit() 2021-01-18 10:05:06 +00:00
microblaze tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
mips target/mips: Remove vendor specific CPU definitions 2021-01-14 17:13:54 +01:00
moxie qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
nios2 gdbstub: drop CPUEnv from gdb_exit() 2021-01-18 10:05:06 +00:00
openrisc migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
ppc migration: Replace migration's JSON writer by the general one 2020-12-19 10:39:16 +01:00
riscv Testing, gdbstub and semihosting patches: 2021-01-18 12:10:20 +00:00
rx tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
s390x s390x/tcg: Fix RISBHG 2021-01-21 11:19:45 +01:00
sh4 tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
sparc tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
tilegx nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
tricore tcg: Make tb arg to synchronize_from_tb const 2021-01-07 05:09:41 -10:00
unicore32 target/unicore32/translate: Add missing fallthrough annotations 2020-12-18 09:14:22 +01:00
xtensa xtensa tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:15 +01:00
meson.build meson: target 2020-08-21 06:30:35 -04:00