qemu-patch-raspberry4/target
Yifei Jiang c51a3f5d15 target/riscv: Fix bug in getting trap cause name for trace_riscv_trap
When the cause number is equal to or greater than 23, print "(unknown)" in
trace_riscv_trap. The max valid number of riscv_excp_names is 23, so the last
excpetion "guest_store_page_fault" can not be printed.

In addition, the current check of cause is invalid for riscv_intr_names. So
introduce riscv_cpu_get_trap_name to get the trap cause name.

Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20200814035819.1214-1-jiangyifei@huawei.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-09-09 15:54:18 -07:00
..
alpha meson: target 2020-08-21 06:30:35 -04:00
arm target/arm: Move setting of CPU halted state to generic code 2020-09-08 10:08:42 +10:00
avr meson: target 2020-08-21 06:30:35 -04:00
cris target/cris: Remove superfluous breaks 2020-09-01 08:41:15 +02:00
hppa target/hppa: Fix boot with old Linux installation CDs 2020-09-02 23:16:57 +02:00
i386 target/i386/sev: Plug memleak in sev_read_file_base64 2020-09-02 07:30:26 -04:00
lm32 meson: target 2020-08-21 06:30:35 -04:00
m68k meson: target 2020-08-21 06:30:35 -04:00
microblaze target/microblaze: Put MicroBlazeCPUConfig into DisasContext 2020-09-07 12:58:08 -07:00
mips meson: target 2020-08-21 06:30:35 -04:00
moxie meson: target 2020-08-21 06:30:35 -04:00
nios2 meson: target 2020-08-21 06:30:35 -04:00
openrisc meson: target 2020-08-21 06:30:35 -04:00
ppc target/ppc: Remove superfluous breaks 2020-09-01 08:34:08 +02:00
riscv target/riscv: Fix bug in getting trap cause name for trace_riscv_trap 2020-09-09 15:54:18 -07:00
rx rx: Move typedef RXCPU to cpu-qom.h 2020-09-02 07:29:25 -04:00
s390x target/s390x: Use start-powered-off CPUState property 2020-09-08 10:08:43 +10:00
sh4 target/sh4: Remove superfluous breaks 2020-09-01 08:38:41 +02:00
sparc meson: target 2020-08-21 06:30:35 -04:00
tilegx meson: target 2020-08-21 06:30:35 -04:00
tricore meson: target 2020-08-21 06:30:35 -04:00
unicore32 meson: target 2020-08-21 06:30:35 -04:00
xtensa target/xtensa: import DSP3400 core 2020-08-21 12:56:45 -07:00
meson.build meson: target 2020-08-21 06:30:35 -04:00