Richard Henderson c55e3370c3 Trivial patches branch pull request 20211101 v2 ... -----BEGIN PGP SIGNATURE----- iQJGBAABCAAwFiEEzS913cjjpNwuT1Fz8ww4vT8vvjwFAmGByAgSHGxhdXJlbnRA dml2aWVyLmV1AAoJEPMMOL0/L748JyMP/RJmY8WPKvwFvmClyKe+ikgHRwDmTMST 172rBEr4sj/PWSu0A2OfaoJxXVq6KPnKb4ECInC6xCdw6J5O79WQh999wSguiel3 Lx8FScj6IBpWT97l4fKTBC8HeDk19BzwzVMXcw53mi3hRx1Rc9nZAFZ9NCn2UeqL 1KURpnEy85oNKfsX2dLnuTFYL6g24qfQWxjZm76tuPsTii4q0cSAl+MAq5NamFZ5 fR6LbyDIVvejeVtavhn6JNx0QA/Fjjmhploa6c3PrUZs0LG7QeM/00HU92GiMjbi 1z2/TDeSFAqKM5friztgjOhaKssEe3CaYnL0S23cmgMkPzqGICRaXBIxL44tlrG+ 8noyhTSZMBJDSKaGGW4VxKd7uwXI6vFgh8To+AZOFktm4f93N51tCOd7yYSXpgFh y4s5+UbAuaGfypb1WN7aSmuYcADaarpdGI8AXiYI70tiVmVwUeMJs6AXV/a7xLLL LmaXVGFPAMgnTMyBPGLV9nxcJLAV6IqmErVTu2BPnIDWAvMVImVLI4kizPg3OzHC XGDifQmitgDVtKt8WJH2+tlKA9GysoruMGXTESUMKeEY3lqdkm/OgEIhw3yJDySo TrCEdN7WtERA9OrVcoQblOltEOrpvtPohryYmC7XRtvqB21fTa96VQMpOjwyHeNA o5Xt/14GCSkh =qh4o -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/vivier/tags/trivial-branch-for-6.2-pull-request' into staging Trivial patches branch pull request 20211101 v2 # gpg: Signature made Tue 02 Nov 2021 07:21:44 PM EDT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] * remotes/vivier/tags/trivial-branch-for-6.2-pull-request: hw/input/lasips2: Fix typos in function names MAINTAINERS: Split HPPA TCG vs HPPA machines/hardware hw/core/machine: Add the missing delimiter in cpu_slot_to_string() monitor: Trim some trailing space from human-readable output Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2021-11-03 11:24:09 -04:00
..
alpha	target/alpha: Implement alpha_cpu_record_sigbus	2021-11-02 07:00:52 -04:00
arm	Add nuvoton sd module for NPCM7XX	2021-11-03 09:31:25 -04:00
avr	target/avr: Drop checks for singlestep_enabled	2021-10-15 16:39:14 -07:00
cris	target/cris: Make cris_cpu_tlb_fill sysemu only	2021-11-02 07:00:52 -04:00
hexagon	target/hexagon: Remove hexagon_cpu_tlb_fill	2021-11-02 07:00:52 -04:00
hppa	target/hppa: Make hppa_cpu_tlb_fill sysemu only	2021-11-02 07:00:52 -04:00
i386	Trivial patches branch pull request 20211101 v2	2021-11-03 11:24:09 -04:00
m68k	target/m68k: Make m68k_cpu_tlb_fill sysemu only	2021-11-02 07:00:52 -04:00
microblaze	target/microblaze: Do not set MO_ALIGN for user-only	2021-11-02 07:00:52 -04:00
mips	MIPS patches queue	2021-11-02 15:12:11 -04:00
nios2	target/nios2: Implement nios2_cpu_record_sigsegv	2021-11-02 07:00:52 -04:00
openrisc	target/openrisc: Make openrisc_cpu_tlb_fill sysemu only	2021-11-02 07:00:52 -04:00
ppc	Trivial patches branch pull request 20211101 v2	2021-11-03 11:24:09 -04:00
riscv	target/riscv: Make riscv_cpu_tlb_fill sysemu only	2021-11-02 07:00:52 -04:00
rx	target/rx: Drop checks for singlestep_enabled	2021-10-15 16:39:14 -07:00
s390x	Trivial patches branch pull request 20211101 v2	2021-11-03 11:24:09 -04:00
sh4	target/sh4: Set fault address in superh_cpu_do_unaligned_access	2021-11-02 07:00:52 -04:00
sparc	target/sparc: Set fault address in sparc_cpu_do_unaligned_access	2021-11-02 07:00:52 -04:00
tricore	target/tricore: Drop check for singlestep_enabled	2021-10-15 16:39:14 -07:00
xtensa	Trivial patches branch pull request 20211101 v2	2021-11-03 11:24:09 -04:00
Kconfig	meson: Introduce target-specific Kconfig	2021-07-09 18:21:34 +02:00
meson.build	Drop the deprecated unicore32 target	2021-05-12 18:20:52 +02:00