qemu-patch-raspberry4/target
Yifei Jiang c63ca4ff7f target/riscv: Fix the bug of HLVX/HLV/HSV
We found that the hypervisor virtual-machine load and store instructions,
included HLVX/HLV/HSV, couldn't access guest userspace memory.

In the riscv-privileged spec, HLVX/HLV/HSV is defined as follow:
"As usual when V=1, two-stage address translation is applied, and
the HS-level sstatus.SUM is ignored."

But get_physical_address() doesn't ignore sstatus.SUM, when HLVX/HLV/HSV
accesses guest userspace memory. So this patch fixes it.

Signed-off-by: Yifei Jiang <jiangyifei@huawei.com>
Signed-off-by: Yipeng Yin <yinyipeng1@huawei.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20201130012810.899-1-jiangyifei@huawei.com
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-12-17 21:56:43 -08:00
..
alpha overall/alpha tcg cpus|hppa: Fix Lesser GPL version number 2020-11-15 16:43:54 +01:00
arm arm/cpu64: Register "aarch64" as class property 2020-12-15 10:02:07 -05:00
avr qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cris cris tcg cpus: Fix Lesser GPL version number 2020-11-15 16:39:05 +01:00
hppa overall/alpha tcg cpus|hppa: Fix Lesser GPL version number 2020-11-15 16:43:54 +01:00
i386 i386: tcg: remove inline from cpu_load_eflags 2020-12-16 15:50:33 -05:00
lm32 nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
m68k m68k: fix some comment spelling errors 2020-12-12 18:12:43 +01:00
microblaze target/microblaze: Fix possible array out of bounds in mmu_write() 2020-11-17 09:45:24 +01:00
mips target/mips: Use FloatRoundMode enum for FCR31 modes conversion 2020-12-13 20:27:11 +01:00
moxie qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
nios2 target/nios2: Use deposit32() to update ipending register 2020-12-15 12:04:30 +00:00
openrisc target/openrisc: Move pic_cpu code into CPU object proper 2020-12-15 12:04:30 +00:00
ppc target/ppc: Introduce an mmu_is_64bit() helper 2020-12-14 15:54:12 +11:00
riscv target/riscv: Fix the bug of HLVX/HLV/HSV 2020-12-17 21:56:43 -08:00
rx target/rx: Fix Lesser GPL version number 2020-10-27 00:22:56 +01:00
s390x First set of 6.0 patches for s390x: 2020-12-11 22:22:50 +00:00
sh4 hmp: Pass monitor to mon_get_cpu_env() 2020-11-13 12:45:51 +00:00
sparc sparc: Check dev->realized at sparc_set_nwindows() 2020-12-15 10:02:07 -05:00
tilegx nomaintainer: Fix Lesser GPL version number 2020-11-15 17:04:40 +01:00
tricore tricore tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:30 +01:00
unicore32 qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
xtensa xtensa tcg cpus: Fix Lesser GPL version number 2020-11-15 16:40:15 +01:00
meson.build meson: target 2020-08-21 06:30:35 -04:00