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qemu-patch-raspberry4/target-tilegx
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Chen Gang c6876d7e1c target-tilegx: Implement v*add and v*sub instructions 
[rth: Implement everything inline; handle v1addi and v2addi as well.]

Signed-off-by: Chen Gang <gang.chen.5i5j@gmail.com>
Message-Id: <1442873918-3394-1-git-send-email-gang.chen.5i5j@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
2015-10-07 20:03:14 +11:00
..
cpu.c target-tilegx: Generate SEGV properly 2015-09-15 07:45:28 -07:00
cpu.h target-tilegx: Handle atomic instructions 2015-09-15 07:45:34 -07:00
helper.c target-tilegx: Handle most bit manipulation instructions 2015-09-15 07:45:33 -07:00
helper.h target-tilegx: Implement v*shl, v*shru, and v*shrs instructions 2015-10-07 20:03:13 +11:00
Makefile.objs target-tilegx: Handle v1shl, v1shru, v1shrs 2015-09-15 07:45:34 -07:00
opcode_tilegx.h target-tilegx: Fix LDNA_ADD_IMM8_OPCODE_X1 2015-09-15 07:41:35 -07:00
simd_helper.c target-tilegx: Implement v*shl, v*shru, and v*shrs instructions 2015-10-07 20:03:13 +11:00
spr_def_64.h target-tilegx: Add special register information from Tilera Corporation 2015-09-15 07:41:35 -07:00
translate.c target-tilegx: Implement v*add and v*sub instructions 2015-10-07 20:03:14 +11:00