The ROM loader state is global and not part of the MCU, and the BIOS is in machine->firmware. So just like the kernel case, load it in the board. Due to the ordering between CPU reset and ROM reset, the ROM has to be registered before the CPU is realized, otherwise the reset vector is loaded before the ROM is there. Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Tested-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
207 lines
6.7 KiB
C
207 lines
6.7 KiB
C
/*
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* RX QEMU GDB simulator
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*
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* Copyright (c) 2019 Yoshinori Sato
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu/cutils.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "qemu-common.h"
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#include "cpu.h"
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#include "hw/hw.h"
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#include "hw/sysbus.h"
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#include "hw/loader.h"
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#include "hw/rx/rx62n.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/qtest.h"
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#include "sysemu/device_tree.h"
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#include "hw/boards.h"
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#include "qom/object.h"
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/* Same address of GDB integrated simulator */
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#define SDRAM_BASE EXT_CS_BASE
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struct RxGdbSimMachineClass {
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/*< private >*/
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MachineClass parent_class;
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/*< public >*/
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const char *mcu_name;
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uint32_t xtal_freq_hz;
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};
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typedef struct RxGdbSimMachineClass RxGdbSimMachineClass;
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struct RxGdbSimMachineState {
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/*< private >*/
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MachineState parent_obj;
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/*< public >*/
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RX62NState mcu;
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};
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typedef struct RxGdbSimMachineState RxGdbSimMachineState;
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#define TYPE_RX_GDBSIM_MACHINE MACHINE_TYPE_NAME("rx62n-common")
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DECLARE_OBJ_CHECKERS(RxGdbSimMachineState, RxGdbSimMachineClass,
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RX_GDBSIM_MACHINE, TYPE_RX_GDBSIM_MACHINE)
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static void rx_load_image(RXCPU *cpu, const char *filename,
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uint32_t start, uint32_t size)
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{
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static uint32_t extable[32];
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long kernel_size;
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int i;
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kernel_size = load_image_targphys(filename, start, size);
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if (kernel_size < 0) {
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fprintf(stderr, "qemu: could not load kernel '%s'\n", filename);
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exit(1);
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}
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cpu->env.pc = start;
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/* setup exception trap trampoline */
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/* linux kernel only works little-endian mode */
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for (i = 0; i < ARRAY_SIZE(extable); i++) {
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extable[i] = cpu_to_le32(0x10 + i * 4);
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}
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rom_add_blob_fixed("extable", extable, sizeof(extable), VECTOR_TABLE_BASE);
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}
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static void rx_gdbsim_init(MachineState *machine)
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{
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MachineClass *mc = MACHINE_GET_CLASS(machine);
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RxGdbSimMachineState *s = RX_GDBSIM_MACHINE(machine);
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RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_GET_CLASS(machine);
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MemoryRegion *sysmem = get_system_memory();
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const char *kernel_filename = machine->kernel_filename;
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const char *dtb_filename = machine->dtb;
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if (machine->ram_size < mc->default_ram_size) {
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char *sz = size_to_str(mc->default_ram_size);
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error_report("Invalid RAM size, should be more than %s", sz);
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g_free(sz);
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}
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/* Allocate memory space */
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memory_region_add_subregion(sysmem, SDRAM_BASE, machine->ram);
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/* Initialize MCU */
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object_initialize_child(OBJECT(machine), "mcu", &s->mcu, rxc->mcu_name);
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object_property_set_link(OBJECT(&s->mcu), "main-bus", OBJECT(sysmem),
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&error_abort);
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object_property_set_uint(OBJECT(&s->mcu), "xtal-frequency-hz",
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rxc->xtal_freq_hz, &error_abort);
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object_property_set_bool(OBJECT(&s->mcu), "load-kernel",
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kernel_filename != NULL, &error_abort);
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if (!kernel_filename) {
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if (machine->firmware) {
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rom_add_file_fixed(machine->firmware, RX62N_CFLASH_BASE, 0);
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} else if (!qtest_enabled()) {
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error_report("No bios or kernel specified");
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exit(1);
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}
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}
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qdev_realize(DEVICE(&s->mcu), NULL, &error_abort);
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/* Load kernel and dtb */
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if (kernel_filename) {
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ram_addr_t kernel_offset;
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/*
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* The kernel image is loaded into
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* the latter half of the SDRAM space.
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*/
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kernel_offset = machine->ram_size / 2;
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rx_load_image(RX_CPU(first_cpu), kernel_filename,
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SDRAM_BASE + kernel_offset, kernel_offset);
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if (dtb_filename) {
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ram_addr_t dtb_offset;
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int dtb_size;
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g_autofree void *dtb = load_device_tree(dtb_filename, &dtb_size);
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if (dtb == NULL) {
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error_report("Couldn't open dtb file %s", dtb_filename);
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exit(1);
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}
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if (machine->kernel_cmdline &&
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qemu_fdt_setprop_string(dtb, "/chosen", "bootargs",
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machine->kernel_cmdline) < 0) {
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error_report("Couldn't set /chosen/bootargs");
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exit(1);
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}
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/* DTB is located at the end of SDRAM space. */
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dtb_offset = machine->ram_size - dtb_size;
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rom_add_blob_fixed("dtb", dtb, dtb_size,
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SDRAM_BASE + dtb_offset);
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/* Set dtb address to R1 */
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RX_CPU(first_cpu)->env.regs[1] = SDRAM_BASE + dtb_offset;
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}
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}
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}
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static void rx_gdbsim_class_init(ObjectClass *oc, void *data)
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{
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MachineClass *mc = MACHINE_CLASS(oc);
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mc->init = rx_gdbsim_init;
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mc->default_cpu_type = TYPE_RX62N_CPU;
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mc->default_ram_size = 16 * MiB;
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mc->default_ram_id = "ext-sdram";
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}
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static void rx62n7_class_init(ObjectClass *oc, void *data)
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{
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RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
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MachineClass *mc = MACHINE_CLASS(oc);
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rxc->mcu_name = TYPE_R5F562N7_MCU;
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rxc->xtal_freq_hz = 12 * 1000 * 1000;
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mc->desc = "gdb simulator (R5F562N7 MCU and external RAM)";
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};
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static void rx62n8_class_init(ObjectClass *oc, void *data)
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{
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RxGdbSimMachineClass *rxc = RX_GDBSIM_MACHINE_CLASS(oc);
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MachineClass *mc = MACHINE_CLASS(oc);
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rxc->mcu_name = TYPE_R5F562N8_MCU;
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rxc->xtal_freq_hz = 12 * 1000 * 1000;
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mc->desc = "gdb simulator (R5F562N8 MCU and external RAM)";
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};
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static const TypeInfo rx_gdbsim_types[] = {
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{
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.name = MACHINE_TYPE_NAME("gdbsim-r5f562n7"),
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.parent = TYPE_RX_GDBSIM_MACHINE,
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.class_init = rx62n7_class_init,
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}, {
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.name = MACHINE_TYPE_NAME("gdbsim-r5f562n8"),
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.parent = TYPE_RX_GDBSIM_MACHINE,
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.class_init = rx62n8_class_init,
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}, {
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.name = TYPE_RX_GDBSIM_MACHINE,
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.parent = TYPE_MACHINE,
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.instance_size = sizeof(RxGdbSimMachineState),
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.class_size = sizeof(RxGdbSimMachineClass),
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.class_init = rx_gdbsim_class_init,
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.abstract = true,
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}
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};
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DEFINE_TYPES(rx_gdbsim_types)
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