ths c9c1a06457 Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno. ... Note that the F64 flag isn't usable on any of those (and the R4000), so all our 64bit FPU goodness goes out of the window until a shadow capability flag is implemented. :-( git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162		2007-06-01 14:58:56 +00:00
..
cpu.h	Don't kill the registered irqs on reset.	2007-05-31 16:18:58 +00:00
exec.h	More MIPS 64-bit FPU support.	2007-05-19 20:29:41 +00:00
fop_template.c	Don't check the FPU state for each FPU instruction, use hflags to	2007-05-29 16:52:57 +00:00
helper.c	Handle PX/UX status flags correctly, by Aurelien Jarno.	2007-05-28 20:36:48 +00:00
mips-defs.h	MIPS TLB style selection at runtime, by Herve Poussineau.	2007-05-13 13:49:44 +00:00
op.c	Don't check the FPU state for each FPU instruction, use hflags to	2007-05-29 16:52:57 +00:00
op_helper.c	Add proper float*_is_nan prototypes.	2007-05-31 16:17:52 +00:00
op_helper_mem.c	Fix a really stupid bug in the [ls]d[lr] emulation, by Herve Poussineau.	2007-05-05 20:13:13 +00:00
op_mem.c	Do not sign extend lwu, by Aurelien Jarno.	2007-05-28 17:09:41 +00:00
op_template.c	MIPS64 addressing fixes, by Aurelien Jarno.	2007-05-28 17:03:28 +00:00
TODO	MIPS 64-bit FPU support, plus some collateral bugfixes in the	2007-05-07 13:55:33 +00:00
translate.c	Simplify code.	2007-05-31 23:42:46 +00:00
translate_init.c	Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.	2007-06-01 14:58:56 +00:00