a04b68e1d4
With this conversion, we will be able to use the same helpers with sve. In particular, pass 3 vector parameters for the 3-operand operations; for advsimd the destination register is also an input. This also fixes a bug in which we failed to clear the high bits of the SVE register after an AdvSIMD operation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200514212831.31248-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
34 lines
1 KiB
C
34 lines
1 KiB
C
/*
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* ARM AdvSIMD / SVE Vector Helpers
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*
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* Copyright (c) 2020 Linaro
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef TARGET_ARM_VEC_INTERNALS_H
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#define TARGET_ARM_VEC_INTERNALS_H
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static inline void clear_tail(void *vd, uintptr_t opr_sz, uintptr_t max_sz)
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{
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uint64_t *d = vd + opr_sz;
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uintptr_t i;
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for (i = opr_sz; i < max_sz; i += 8) {
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*d++ = 0;
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}
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}
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#endif /* TARGET_ARM_VEC_INTERNALS_H */
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