.. |
a32-uncond.decode
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
a32.decode
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
arch_dump.c
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target/arm: add spaces around operator
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2020-11-10 11:03:47 +00:00 |
arm-powerctl.c
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arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on()
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2019-12-20 14:03:00 +00:00 |
arm-powerctl.h
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target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset()
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2019-02-28 11:03:04 +00:00 |
arm_ldst.h
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
cpu-param.h
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linux-user/aarch64: Implement PR_TAGGED_ADDR_ENABLE
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2021-02-16 13:06:16 +00:00 |
cpu-qom.h
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qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros
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2020-09-18 14:12:32 -04:00 |
cpu.c
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Do not include sysemu/sysemu.h if it's not really necessary
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2021-05-02 17:24:50 +02:00 |
cpu.h
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target/arm: Implement SVE2 bitwise permute
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2021-05-25 16:01:43 +01:00 |
cpu64.c
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target/arm: set ID_AA64ISAR0.TLB to 2 for max AARCH64 CPU type
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2021-05-25 16:01:43 +01:00 |
cpu_tcg.c
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Revert "target/arm: Make number of counters in PMCR follow the CPU"
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2021-04-06 11:49:14 +01:00 |
crypto_helper.c
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
debug_helper.c
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target/arm: Stop assuming DBGDIDR always exists
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2020-02-21 16:07:01 +00:00 |
gdbstub.c
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target/arm: use official org.gnu.gdb.aarch64.sve layout for registers
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2021-01-18 10:05:06 +00:00 |
gdbstub64.c
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
helper-a64.c
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target/arm: Add wrapper macros for accessing tbflags
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2021-04-30 11:16:50 +01:00 |
helper-a64.h
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target/arm: Merge mte_check1, mte_checkN
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2021-04-30 11:16:49 +01:00 |
helper-sve.h
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target/arm: Implement SVE2 XAR
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2021-05-25 16:01:44 +01:00 |
helper.c
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target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2
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2021-05-25 16:01:43 +01:00 |
helper.h
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target/arm: Implement SVE2 XAR
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2021-05-25 16:01:44 +01:00 |
idau.h
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Use DECLARE_*CHECKER* macros
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2020-09-09 09:27:09 -04:00 |
internals.h
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target/arm: Rename mte_probe1 to mte_probe
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2021-04-30 11:16:49 +01:00 |
iwmmxt_helper.c
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
kvm-consts.h
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target/arm: Remove no-longer-reachable 32-bit KVM code
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2020-09-14 14:23:19 +01:00 |
kvm-stub.c
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Include qemu-common.h exactly where needed
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2019-06-12 13:20:20 +02:00 |
kvm.c
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hw/arm/virt: KVM: The IPA lower bound is 32
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2021-03-12 12:47:11 +00:00 |
kvm64.c
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target/arm: Add ID_AA64ZFR0 fields and isar_feature_aa64_sve2
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2021-05-25 16:01:43 +01:00 |
kvm_arm.h
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hw/arm/virt: KVM: The IPA lower bound is 32
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2021-03-12 12:47:11 +00:00 |
m-nocp.decode
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target/arm: Implement new v8.1M VLLDM and VLSTM encodings
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2020-12-10 11:44:56 +00:00 |
m_helper.c
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target/arm: Use correct SP in M-profile exception return
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2021-05-25 16:01:43 +01:00 |
machine.c
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target/arm: Don't migrate CPUARMState.features
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2021-02-11 11:50:13 +00:00 |
meson.build
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target/arm: Make translate-neon.c.inc its own compilation unit
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2021-05-10 13:24:09 +01:00 |
monitor.c
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target/arm: Add cpu properties to control pauth
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2021-01-19 14:38:51 +00:00 |
mte_helper.c
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target/arm: Rename mte_probe1 to mte_probe
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2021-04-30 11:16:49 +01:00 |
neon-dp.decode
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
neon-ls.decode
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target/arm: Fix decode of align in VLDST_single
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2021-04-30 11:16:49 +01:00 |
neon-shared.decode
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
neon_helper.c
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target/arm: Split out saturating/rounding shifts from neon
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2021-05-25 16:01:43 +01:00 |
op_addsub.h
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Move target-* CPU file into a target/ folder
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2016-12-20 21:52:12 +01:00 |
op_helper.c
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target/arm: Make WFI a NOP for userspace emulators
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2021-05-10 13:24:09 +01:00 |
pauth_helper.c
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target/arm: Implement an IMPDEF pauth algorithm
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2021-01-19 14:38:51 +00:00 |
psci.c
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sysemu: Split sysemu/runstate.h off sysemu/sysemu.h
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2019-08-16 13:37:36 +02:00 |
sve.decode
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target/arm: Implement SVE2 gather load insns
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2021-05-25 16:01:44 +01:00 |
sve_helper.c
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target/arm: Implement SVE2 XAR
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2021-05-25 16:01:44 +01:00 |
syndrome.h
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target/arm: Split out syndrome.h from internals.h
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2021-02-16 13:16:18 +00:00 |
t16.decode
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
t32.decode
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target/arm: Implement M-profile "minimal RAS implementation"
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2020-12-10 11:44:56 +00:00 |
tlb_helper.c
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target/arm: Set ARMMMUFaultInfo.level in user-only arm_cpu_tlb_fill
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2021-03-23 14:07:55 +00:00 |
trace-events
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trace-events: Shorten file names in comments
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2019-03-22 16:18:07 +00:00 |
trace.h
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trace: switch position of headers to what Meson requires
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2020-08-21 06:18:24 -04:00 |
translate-a32.h
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target/arm: Make translate-neon.c.inc its own compilation unit
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2021-05-10 13:24:09 +01:00 |
translate-a64.c
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target/arm: Implement SVE2 XAR
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2021-05-25 16:01:44 +01:00 |
translate-a64.h
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target/arm: Implement SVE2 XAR
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2021-05-25 16:01:44 +01:00 |
translate-m-nocp.c
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target/arm: Split m-nocp trans functions into their own file
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2021-05-10 13:24:09 +01:00 |
translate-neon.c
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target/arm: Make translate-neon.c.inc its own compilation unit
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2021-05-10 13:24:09 +01:00 |
translate-sve.c
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target/arm: Implement SVE2 gather load insns
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2021-05-25 16:01:44 +01:00 |
translate-vfp.c
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target/arm: Make translate-vfp.c.inc its own compilation unit
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2021-05-10 13:24:09 +01:00 |
translate.c
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target/arm: Make sure that commpage's tb->size != 0
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2021-05-20 14:19:30 +02:00 |
translate.h
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target/arm: Move NeonGenThreeOpEnvFn typedef to translate.h
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2021-05-10 13:24:09 +01:00 |
vec_helper.c
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target/arm: Implement SVE2 XAR
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2021-05-25 16:01:44 +01:00 |
vec_internal.h
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target/arm: Implement SVE2 complex integer multiply-add
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2021-05-25 16:01:44 +01:00 |
vfp-uncond.decode
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arm tcg cpus: Fix Lesser GPL version number
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2020-11-15 16:42:14 +01:00 |
vfp.decode
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target/arm: Implement VLDR/VSTR system register
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2020-12-10 11:44:55 +00:00 |
vfp_helper.c
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target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension
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2020-10-20 16:12:01 +01:00 |