haraldwolff/qemu-patch-raspberry4
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity
qemu-patch-raspberry4/target/xtensa
History
Max Filippov cfa9f05181 target/xtensa: add DFPU registers and opcodes 
DFPU may be configured with 32-bit or with 64-bit registers. Xtensa ISA
does not specify how single-precision values are stored in 64-bit
registers. Existing implementations store them in the low half of the
registers.
Add value extraction and write back to single-precision opcodes.
Add new double precision opcodes. Add 64-bit register file.
Add 64-bit values dumping to the xtensa_cpu_dump_state.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2020-08-21 12:48:15 -07:00
..
core-dc232b meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-dc233c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-de212 meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-fsf meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-sample_controller meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-test_kc705_be meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-test_mmuhifi_c3 meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-dc232b.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-dc233c.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-de212.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-fsf.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-sample_controller.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-test_kc705_be.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
core-test_mmuhifi_c3.c meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h cpu: Use DeviceClass reset instead of a special CPUClass reset 2020-03-17 19:48:10 -04:00
cpu.c target/xtensa: add DFPU registers and opcodes 2020-08-21 12:48:15 -07:00
cpu.h target/xtensa: add DFPU registers and opcodes 2020-08-21 12:48:15 -07:00
dbg_helper.c target/xtensa: Use env_cpu, env_archcpu 2019-06-10 07:03:42 -07:00
exc_helper.c target/xtensa: implement NMI support 2020-08-21 12:48:14 -07:00
fpu_helper.c target/xtensa: add DFPU registers and opcodes 2020-08-21 12:48:15 -07:00
gdbstub.c gdbstub: Do not use memset() on GByteArray 2020-04-15 11:38:23 +01:00
helper.c target/xtensa: add geometry to xtensa_get_regfile_by_name 2020-08-21 12:48:15 -07:00
helper.h target/xtensa: add DFPU registers and opcodes 2020-08-21 12:48:15 -07:00
import_core.sh meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
mmu_helper.c target/xtensa: Use probe_access for itlb_hit_test 2020-01-15 15:13:09 -10:00
monitor.c hmp: Move hmp.h to include/monitor/ 2019-07-02 07:19:45 +02:00
op_helper.c target/xtensa: implement exclusive access option 2019-05-15 10:31:52 -07:00
overlay_tool.h target/xtensa: add DFPU registers and opcodes 2020-08-21 12:48:15 -07:00
translate.c target/xtensa: add DFPU registers and opcodes 2020-08-21 12:48:15 -07:00
win_helper.c target/xtensa: only rotate window in the retw helper 2019-02-28 04:43:22 -08:00
xtensa-isa-internal.h Clean up decorations and whitespace around header guards 2019-05-13 08:58:55 +02:00
xtensa-isa.c Clean up includes 2018-02-09 05:05:11 +01:00
xtensa-isa.h Use #include "..." for our own headers, <...> for others 2018-02-09 05:05:11 +01:00
xtensa-semi.c Clean up inclusion of sysemu/sysemu.h 2019-08-16 13:31:53 +02:00