We have several callers that were formatting the argument strings themselves; consolidate this effort by adding new convenience functions directly in libqtest, and update some call-sites that can benefit from it. Note that the new functions qtest_startf() and qtest_vstartf() behave more like qtest_init() (the caller must assign global_qtest after the fact, rather than getting it implicitly set). This helps us prepare for future patches that get rid of the global variable, by explicitly highlighting which tests still depend on it now. Signed-off-by: Eric Blake <eblake@redhat.com> [thuth: Dropped the hunks that do not apply cleanly to qemu master yet and added the missing g_free(args) in qtest_vstartf()] Signed-off-by: Thomas Huth <thuth@redhat.com> Message-Id: <1508336428-20511-2-git-send-email-thuth@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Cornelia Huck <cohuck@redhat.com>
136 lines
3.5 KiB
C
136 lines
3.5 KiB
C
/*
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* QTest testcase for PowerNV XSCOM bus
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*
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* Copyright (c) 2016, IBM Corporation.
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or
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* later. See the COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "libqtest.h"
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typedef enum PnvChipType {
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PNV_CHIP_POWER8E, /* AKA Murano (default) */
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PNV_CHIP_POWER8, /* AKA Venice */
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PNV_CHIP_POWER8NVL, /* AKA Naples */
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PNV_CHIP_POWER9, /* AKA Nimbus */
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} PnvChipType;
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typedef struct PnvChip {
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PnvChipType chip_type;
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const char *cpu_model;
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uint64_t xscom_base;
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uint64_t xscom_core_base;
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uint64_t cfam_id;
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uint32_t first_core;
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} PnvChip;
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static const PnvChip pnv_chips[] = {
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{
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.chip_type = PNV_CHIP_POWER8,
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.cpu_model = "POWER8",
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.xscom_base = 0x0003fc0000000000ull,
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.xscom_core_base = 0x10000000ull,
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.cfam_id = 0x220ea04980000000ull,
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.first_core = 0x1,
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}, {
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.chip_type = PNV_CHIP_POWER8NVL,
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.cpu_model = "POWER8NVL",
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.xscom_base = 0x0003fc0000000000ull,
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.xscom_core_base = 0x10000000ull,
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.cfam_id = 0x120d304980000000ull,
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.first_core = 0x1,
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},
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#if 0 /* POWER9 support is not ready yet */
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{
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.chip_type = PNV_CHIP_POWER9,
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.cpu_model = "POWER9",
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.xscom_base = 0x000603fc00000000ull,
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.xscom_core_base = 0x0ull,
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.cfam_id = 0x100d104980000000ull,
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.first_core = 0x20,
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},
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#endif
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};
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static uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
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{
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uint64_t addr = chip->xscom_base;
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if (chip->chip_type == PNV_CHIP_POWER9) {
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addr |= ((uint64_t) pcba << 3);
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} else {
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addr |= (((uint64_t) pcba << 4) & ~0xffull) |
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(((uint64_t) pcba << 3) & 0x78);
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}
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return addr;
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}
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static uint64_t pnv_xscom_read(const PnvChip *chip, uint32_t pcba)
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{
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return readq(pnv_xscom_addr(chip, pcba));
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}
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static void test_xscom_cfam_id(const PnvChip *chip)
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{
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uint64_t f000f = pnv_xscom_read(chip, 0xf000f);
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g_assert_cmphex(f000f, ==, chip->cfam_id);
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}
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static void test_cfam_id(const void *data)
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{
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const PnvChip *chip = data;
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global_qtest = qtest_startf("-M powernv,accel=tcg -cpu %s",
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chip->cpu_model);
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test_xscom_cfam_id(chip);
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qtest_quit(global_qtest);
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}
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#define PNV_XSCOM_EX_CORE_BASE(chip, i) \
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((chip)->xscom_core_base | (((uint64_t)i) << 24))
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#define PNV_XSCOM_EX_DTS_RESULT0 0x50000
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static void test_xscom_core(const PnvChip *chip)
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{
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uint32_t first_core_dts0 =
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PNV_XSCOM_EX_CORE_BASE(chip, chip->first_core) |
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PNV_XSCOM_EX_DTS_RESULT0;
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uint64_t dts0 = pnv_xscom_read(chip, first_core_dts0);
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g_assert_cmphex(dts0, ==, 0x26f024f023f0000ull);
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}
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static void test_core(const void *data)
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{
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const PnvChip *chip = data;
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global_qtest = qtest_startf("-M powernv,accel=tcg -cpu %s",
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chip->cpu_model);
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test_xscom_core(chip);
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qtest_quit(global_qtest);
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}
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static void add_test(const char *name, void (*test)(const void *data))
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{
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int i;
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for (i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
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char *tname = g_strdup_printf("pnv-xscom/%s/%s", name,
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pnv_chips[i].cpu_model);
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qtest_add_data_func(tname, &pnv_chips[i], test);
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g_free(tname);
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}
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}
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int main(int argc, char **argv)
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{
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g_test_init(&argc, &argv, NULL);
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add_test("cfam_id", test_cfam_id);
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add_test("core", test_core);
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return g_test_run();
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}
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