2692802a37
Add instructions of SRR opcode format. Add helper for add/sub_ssov. Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-id: 1409572800-4116-8-git-send-email-kbastian@mail.uni-paderborn.de Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
102 lines
3.7 KiB
C
102 lines
3.7 KiB
C
/*
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* Copyright (c) 2012-2014 Bastian Koppelmann C-Lab/University Paderborn
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include <stdlib.h>
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#include "cpu.h"
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#include "qemu/host-utils.h"
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#include "exec/helper-proto.h"
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#include "exec/cpu_ldst.h"
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#define SSOV(env, ret, arg, len) do { \
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int64_t max_pos = INT##len ##_MAX; \
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int64_t max_neg = INT##len ##_MIN; \
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if (arg > max_pos) { \
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env->PSW_USB_V = (1 << 31); \
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env->PSW_USB_SV = (1 << 31); \
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ret = (target_ulong)max_pos; \
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} else { \
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if (arg < max_neg) { \
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env->PSW_USB_V = (1 << 31); \
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env->PSW_USB_SV = (1 << 31); \
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ret = (target_ulong)max_neg; \
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} else { \
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env->PSW_USB_V = 0; \
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ret = (target_ulong)arg; \
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} \
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} \
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env->PSW_USB_AV = arg ^ arg * 2u; \
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env->PSW_USB_SAV |= env->PSW_USB_AV; \
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} while (0)
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target_ulong helper_add_ssov(CPUTriCoreState *env, target_ulong r1,
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target_ulong r2)
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{
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target_ulong ret;
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int64_t t1 = sextract64(r1, 0, 32);
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int64_t t2 = sextract64(r2, 0, 32);
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int64_t result = t1 + t2;
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SSOV(env, ret, result, 32);
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return ret;
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}
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target_ulong helper_sub_ssov(CPUTriCoreState *env, target_ulong r1,
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target_ulong r2)
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{
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target_ulong ret;
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int64_t t1 = sextract64(r1, 0, 32);
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int64_t t2 = sextract64(r2, 0, 32);
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int64_t result = t1 - t2;
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SSOV(env, ret, result, 32);
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return ret;
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}
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static inline void QEMU_NORETURN do_raise_exception_err(CPUTriCoreState *env,
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uint32_t exception,
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int error_code,
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uintptr_t pc)
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{
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CPUState *cs = CPU(tricore_env_get_cpu(env));
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cs->exception_index = exception;
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env->error_code = error_code;
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if (pc) {
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/* now we have a real cpu fault */
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cpu_restore_state(cs, pc);
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}
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cpu_loop_exit(cs);
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}
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static inline void QEMU_NORETURN do_raise_exception(CPUTriCoreState *env,
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uint32_t exception,
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uintptr_t pc)
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{
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do_raise_exception_err(env, exception, 0, pc);
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}
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void tlb_fill(CPUState *cs, target_ulong addr, int is_write, int mmu_idx,
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uintptr_t retaddr)
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{
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int ret;
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ret = cpu_tricore_handle_mmu_fault(cs, addr, is_write, mmu_idx);
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if (ret) {
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TriCoreCPU *cpu = TRICORE_CPU(cs);
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CPUTriCoreState *env = &cpu->env;
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do_raise_exception_err(env, cs->exception_index,
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env->error_code, retaddr);
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}
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}
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