b308c82cbd
Calling memory_region_destroy() in a transaction is illegal (and aborts), as until the transaction is committed, the region remains live. Fix by moving destruction until after the transaction commits. This requires having an extra set of regions, so the new and old regions can coexist. Signed-off-by: Avi Kivity <avi@redhat.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
79 lines
2.3 KiB
C
79 lines
2.3 KiB
C
#ifndef QEMU_PCI_INTERNALS_H
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#define QEMU_PCI_INTERNALS_H
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/*
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* This header files is private to pci.c and pci_bridge.c
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* So following structures are opaque to others and shouldn't be
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* accessed.
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*
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* For pci-to-pci bridge needs to include this header file to embed
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* PCIBridge in its structure or to get sizeof(PCIBridge),
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* However, they shouldn't access those following members directly.
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* Use accessor function in pci.h, pci_bridge.h
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*/
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#define TYPE_PCI_BUS "PCI"
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#define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS)
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struct PCIBus {
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BusState qbus;
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PCIDMAContextFunc dma_context_fn;
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void *dma_context_opaque;
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uint8_t devfn_min;
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pci_set_irq_fn set_irq;
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pci_map_irq_fn map_irq;
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pci_route_irq_fn route_intx_to_irq;
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pci_hotplug_fn hotplug;
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DeviceState *hotplug_qdev;
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void *irq_opaque;
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PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX];
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PCIDevice *parent_dev;
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MemoryRegion *address_space_mem;
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MemoryRegion *address_space_io;
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QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */
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QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */
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/* The bus IRQ state is the logical OR of the connected devices.
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Keep a count of the number of devices with raised IRQs. */
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int nirq;
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int *irq_count;
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};
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typedef struct PCIBridgeWindows PCIBridgeWindows;
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/*
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* Aliases for each of the address space windows that the bridge
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* can forward. Mapped into the bridge's parent's address space,
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* as subregions.
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*/
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struct PCIBridgeWindows {
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MemoryRegion alias_pref_mem;
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MemoryRegion alias_mem;
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MemoryRegion alias_io;
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};
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struct PCIBridge {
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PCIDevice dev;
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/* private member */
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PCIBus sec_bus;
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/*
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* Memory regions for the bridge's address spaces. These regions are not
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* directly added to system_memory/system_io or its descendants.
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* Bridge's secondary bus points to these, so that devices
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* under the bridge see these regions as its address spaces.
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* The regions are as large as the entire address space -
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* they don't take into account any windows.
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*/
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MemoryRegion address_space_mem;
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MemoryRegion address_space_io;
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PCIBridgeWindows *windows;
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pci_map_irq_fn map_irq;
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const char *bus_name;
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};
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#endif /* QEMU_PCI_INTERNALS_H */
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