-----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJZSBP2AAoJEK0ScMxN0CebnyMH/1ZiDhYiqCD7PYfk4/Y7Db+h MNKNozrWKyChWQp1RzwWqcBaIzbuMZkDYn8dfS419PNtFRNoYtHjhYvjSTfcrxS0 U8dGOoqQUHCr/jlyIDUE4y5+aFA9R/1Ih5IQv+QCi5QNXcfeST8zcYF+ImuikP6C 7heIc7dE9kXdA8ycWJ39kYErHK9qEJbvDx6dxMPmb4cM36U239Zb9so985TXULlQ LoHrDpOCBzCbsICBE8iP2RKDvcwENIx21Dwv+9gW/NqR+nRdKcxhTjKEodkS8gl/ UxMxM/TjIPQOLLUhdck5DFgIgBgQWHRqPMJKqt466I0JlXvSpifmWxckWzslXLc= =R+em -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20170619' into staging Queued TCG patches # gpg: Signature made Mon 19 Jun 2017 19:12:06 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" # Primary key fingerprint: 9CB1 8DDA F8E8 49AD 2AFC 16A4 AD12 70CC 4DD0 279B * remotes/rth/tags/pull-tcg-20170619: target/arm: Exit after clearing aarch64 interrupt mask target/s390x: Exit after changing PSW mask target/alpha: Use tcg_gen_lookup_and_goto_ptr tcg: Increase hit rate of lookup_tb_ptr tcg/arm: Use ldr (literal) for goto_tb tcg/arm: Try pc-relative addresses for movi tcg/arm: Remove limit on code buffer size tcg/arm: Use indirect branch for goto_tb tcg/aarch64: Use ADR in tcg_out_movi translate-all: consolidate tb init in tb_gen_code tcg: allocate TB structs before the corresponding translated code util: add cacheinfo Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
234 lines
5.7 KiB
C
234 lines
5.7 KiB
C
/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "qemu/osdep.h"
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#include "qemu/host-utils.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exec/cpu_ldst.h"
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#include "exec/exec-all.h"
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#include "exec/tb-hash.h"
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#include "disas/disas.h"
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#include "exec/log.h"
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/* 32-bit helpers */
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int32_t HELPER(div_i32)(int32_t arg1, int32_t arg2)
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{
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return arg1 / arg2;
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}
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int32_t HELPER(rem_i32)(int32_t arg1, int32_t arg2)
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{
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return arg1 % arg2;
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}
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uint32_t HELPER(divu_i32)(uint32_t arg1, uint32_t arg2)
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{
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return arg1 / arg2;
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}
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uint32_t HELPER(remu_i32)(uint32_t arg1, uint32_t arg2)
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{
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return arg1 % arg2;
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}
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/* 64-bit helpers */
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uint64_t HELPER(shl_i64)(uint64_t arg1, uint64_t arg2)
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{
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return arg1 << arg2;
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}
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uint64_t HELPER(shr_i64)(uint64_t arg1, uint64_t arg2)
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{
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return arg1 >> arg2;
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}
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int64_t HELPER(sar_i64)(int64_t arg1, int64_t arg2)
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{
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return arg1 >> arg2;
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}
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int64_t HELPER(div_i64)(int64_t arg1, int64_t arg2)
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{
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return arg1 / arg2;
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}
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int64_t HELPER(rem_i64)(int64_t arg1, int64_t arg2)
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{
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return arg1 % arg2;
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}
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uint64_t HELPER(divu_i64)(uint64_t arg1, uint64_t arg2)
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{
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return arg1 / arg2;
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}
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uint64_t HELPER(remu_i64)(uint64_t arg1, uint64_t arg2)
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{
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return arg1 % arg2;
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}
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uint64_t HELPER(muluh_i64)(uint64_t arg1, uint64_t arg2)
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{
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uint64_t l, h;
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mulu64(&l, &h, arg1, arg2);
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return h;
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}
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int64_t HELPER(mulsh_i64)(int64_t arg1, int64_t arg2)
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{
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uint64_t l, h;
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muls64(&l, &h, arg1, arg2);
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return h;
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}
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uint32_t HELPER(clz_i32)(uint32_t arg, uint32_t zero_val)
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{
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return arg ? clz32(arg) : zero_val;
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}
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uint32_t HELPER(ctz_i32)(uint32_t arg, uint32_t zero_val)
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{
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return arg ? ctz32(arg) : zero_val;
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}
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uint64_t HELPER(clz_i64)(uint64_t arg, uint64_t zero_val)
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{
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return arg ? clz64(arg) : zero_val;
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}
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uint64_t HELPER(ctz_i64)(uint64_t arg, uint64_t zero_val)
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{
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return arg ? ctz64(arg) : zero_val;
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}
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uint32_t HELPER(clrsb_i32)(uint32_t arg)
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{
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return clrsb32(arg);
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}
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uint64_t HELPER(clrsb_i64)(uint64_t arg)
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{
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return clrsb64(arg);
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}
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uint32_t HELPER(ctpop_i32)(uint32_t arg)
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{
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return ctpop32(arg);
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}
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uint64_t HELPER(ctpop_i64)(uint64_t arg)
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{
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return ctpop64(arg);
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}
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void *HELPER(lookup_tb_ptr)(CPUArchState *env, target_ulong addr)
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{
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CPUState *cpu = ENV_GET_CPU(env);
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TranslationBlock *tb;
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target_ulong cs_base, pc;
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uint32_t flags, addr_hash;
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addr_hash = tb_jmp_cache_hash_func(addr);
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tb = atomic_rcu_read(&cpu->tb_jmp_cache[addr_hash]);
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cpu_get_tb_cpu_state(env, &pc, &cs_base, &flags);
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if (unlikely(!(tb
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&& tb->pc == addr
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&& tb->cs_base == cs_base
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&& tb->flags == flags))) {
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tb = tb_htable_lookup(cpu, addr, cs_base, flags);
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if (!tb) {
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return tcg_ctx.code_gen_epilogue;
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}
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atomic_set(&cpu->tb_jmp_cache[addr_hash], tb);
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}
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qemu_log_mask_and_addr(CPU_LOG_EXEC, addr,
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"Chain %p [%d: " TARGET_FMT_lx "] %s\n",
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tb->tc_ptr, cpu->cpu_index, addr,
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lookup_symbol(addr));
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return tb->tc_ptr;
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}
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void HELPER(exit_atomic)(CPUArchState *env)
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{
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cpu_loop_exit_atomic(ENV_GET_CPU(env), GETPC());
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}
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#ifndef CONFIG_SOFTMMU
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/* The softmmu versions of these helpers are in cputlb.c. */
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/* Do not allow unaligned operations to proceed. Return the host address. */
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static void *atomic_mmu_lookup(CPUArchState *env, target_ulong addr,
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int size, uintptr_t retaddr)
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{
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/* Enforce qemu required alignment. */
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if (unlikely(addr & (size - 1))) {
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cpu_loop_exit_atomic(ENV_GET_CPU(env), retaddr);
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}
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return g2h(addr);
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}
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/* Macro to call the above, with local variables from the use context. */
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#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, DATA_SIZE, GETPC())
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#define ATOMIC_NAME(X) HELPER(glue(glue(atomic_ ## X, SUFFIX), END))
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#define EXTRA_ARGS
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#define DATA_SIZE 1
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#include "atomic_template.h"
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#define DATA_SIZE 2
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#include "atomic_template.h"
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#define DATA_SIZE 4
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#include "atomic_template.h"
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#ifdef CONFIG_ATOMIC64
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#define DATA_SIZE 8
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#include "atomic_template.h"
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#endif
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/* The following is only callable from other helpers, and matches up
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with the softmmu version. */
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#ifdef CONFIG_ATOMIC128
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#undef EXTRA_ARGS
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#undef ATOMIC_NAME
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#undef ATOMIC_MMU_LOOKUP
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#define EXTRA_ARGS , TCGMemOpIdx oi, uintptr_t retaddr
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#define ATOMIC_NAME(X) \
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HELPER(glue(glue(glue(atomic_ ## X, SUFFIX), END), _mmu))
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#define ATOMIC_MMU_LOOKUP atomic_mmu_lookup(env, addr, DATA_SIZE, retaddr)
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#define DATA_SIZE 16
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#include "atomic_template.h"
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#endif /* CONFIG_ATOMIC128 */
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#endif /* !CONFIG_SOFTMMU */
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