d96e173769
The master PIC is connected to the LINTIN0 of the APICs. As the APIC currently does not track the state of that line, we have to ask the PIC to reinject its IRQ after the CPU picked up an event from the APIC. This introduces pic_get_output to read the master PIC IRQ line state without changing it. The APIC uses this function to decide if a PIC IRQ should be reinjected on apic_update_irq. This reflects better how the real hardware works. The patch fixes some failures of the kvm unit tests apic and eventinj by allowing to enable the proper CPU IRQ deassertion when the guest masks some pending IRQs at PIC level. Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
259 lines
7.1 KiB
C
259 lines
7.1 KiB
C
#ifndef HW_PC_H
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#define HW_PC_H
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#include "qemu-common.h"
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#include "memory.h"
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#include "ioport.h"
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#include "isa.h"
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#include "fdc.h"
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#include "net.h"
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#include "memory.h"
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#include "ioapic.h"
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/* PC-style peripherals (also used by other machines). */
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/* serial.c */
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SerialState *serial_init(int base, qemu_irq irq, int baudbase,
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CharDriverState *chr);
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SerialState *serial_mm_init(MemoryRegion *address_space,
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target_phys_addr_t base, int it_shift,
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qemu_irq irq, int baudbase,
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CharDriverState *chr, enum device_endian);
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static inline bool serial_isa_init(int index, CharDriverState *chr)
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{
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ISADevice *dev;
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dev = isa_try_create("isa-serial");
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if (!dev) {
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return false;
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}
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qdev_prop_set_uint32(&dev->qdev, "index", index);
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qdev_prop_set_chr(&dev->qdev, "chardev", chr);
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if (qdev_init(&dev->qdev) < 0) {
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return false;
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}
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return true;
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}
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void serial_set_frequency(SerialState *s, uint32_t frequency);
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/* parallel.c */
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static inline bool parallel_init(int index, CharDriverState *chr)
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{
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ISADevice *dev;
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dev = isa_try_create("isa-parallel");
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if (!dev) {
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return false;
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}
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qdev_prop_set_uint32(&dev->qdev, "index", index);
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qdev_prop_set_chr(&dev->qdev, "chardev", chr);
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if (qdev_init(&dev->qdev) < 0) {
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return false;
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}
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return true;
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}
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bool parallel_mm_init(target_phys_addr_t base, int it_shift, qemu_irq irq,
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CharDriverState *chr);
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/* i8259.c */
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typedef struct PicState2 PicState2;
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extern PicState2 *isa_pic;
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void pic_set_irq(int irq, int level);
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void pic_set_irq_new(void *opaque, int irq, int level);
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qemu_irq *i8259_init(qemu_irq parent_irq);
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int pic_read_irq(PicState2 *s);
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int pic_get_output(PicState2 *s);
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uint32_t pic_intack_read(PicState2 *s);
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void pic_info(Monitor *mon);
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void irq_info(Monitor *mon);
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/* Global System Interrupts */
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#define GSI_NUM_PINS IOAPIC_NUM_PINS
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typedef struct GSIState {
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qemu_irq i8259_irq[ISA_NUM_IRQS];
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qemu_irq ioapic_irq[IOAPIC_NUM_PINS];
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} GSIState;
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void gsi_handler(void *opaque, int n, int level);
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/* i8254.c */
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#define PIT_FREQ 1193182
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static inline ISADevice *pit_init(int base, int irq)
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{
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ISADevice *dev;
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dev = isa_create("isa-pit");
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qdev_prop_set_uint32(&dev->qdev, "iobase", base);
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qdev_prop_set_uint32(&dev->qdev, "irq", irq);
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qdev_init_nofail(&dev->qdev);
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return dev;
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}
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void pit_set_gate(ISADevice *dev, int channel, int val);
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int pit_get_gate(ISADevice *dev, int channel);
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int pit_get_initial_count(ISADevice *dev, int channel);
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int pit_get_mode(ISADevice *dev, int channel);
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int pit_get_out(ISADevice *dev, int channel, int64_t current_time);
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void hpet_pit_disable(void);
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void hpet_pit_enable(void);
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/* vmport.c */
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static inline void vmport_init(void)
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{
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isa_create_simple("vmport");
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}
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void vmport_register(unsigned char command, IOPortReadFunc *func, void *opaque);
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void vmmouse_get_data(uint32_t *data);
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void vmmouse_set_data(const uint32_t *data);
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/* pckbd.c */
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void i8042_init(qemu_irq kbd_irq, qemu_irq mouse_irq, uint32_t io_base);
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void i8042_mm_init(qemu_irq kbd_irq, qemu_irq mouse_irq,
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MemoryRegion *region, ram_addr_t size,
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target_phys_addr_t mask);
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void i8042_isa_mouse_fake_event(void *opaque);
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void i8042_setup_a20_line(ISADevice *dev, qemu_irq *a20_out);
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/* pc.c */
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extern int fd_bootchk;
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void pc_register_ferr_irq(qemu_irq irq);
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void pc_cmos_set_s3_resume(void *opaque, int irq, int level);
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void pc_acpi_smi_interrupt(void *opaque, int irq, int level);
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void pc_cpus_init(const char *cpu_model);
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void pc_memory_init(MemoryRegion *system_memory,
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const char *kernel_filename,
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const char *kernel_cmdline,
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const char *initrd_filename,
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ram_addr_t below_4g_mem_size,
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ram_addr_t above_4g_mem_size,
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MemoryRegion *rom_memory,
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MemoryRegion **ram_memory);
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qemu_irq *pc_allocate_cpu_irq(void);
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void pc_vga_init(PCIBus *pci_bus);
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void pc_basic_device_init(qemu_irq *gsi,
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ISADevice **rtc_state,
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bool no_vmport);
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void pc_init_ne2k_isa(NICInfo *nd);
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void pc_cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
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const char *boot_device,
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BusState *ide0, BusState *ide1,
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ISADevice *s);
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void pc_pci_device_init(PCIBus *pci_bus);
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typedef void (*cpu_set_smm_t)(int smm, void *arg);
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void cpu_smm_register(cpu_set_smm_t callback, void *arg);
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/* acpi.c */
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extern int acpi_enabled;
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extern char *acpi_tables;
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extern size_t acpi_tables_len;
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void acpi_bios_init(void);
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int acpi_table_add(const char *table_desc);
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/* acpi_piix.c */
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i2c_bus *piix4_pm_init(PCIBus *bus, int devfn, uint32_t smb_io_base,
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qemu_irq sci_irq, qemu_irq cmos_s3, qemu_irq smi_irq,
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int kvm_enabled);
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void piix4_smbus_register_device(SMBusDevice *dev, uint8_t addr);
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/* hpet.c */
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extern int no_hpet;
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/* pcspk.c */
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void pcspk_init(ISADevice *pit);
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int pcspk_audio_init(qemu_irq *pic);
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/* piix_pci.c */
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struct PCII440FXState;
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typedef struct PCII440FXState PCII440FXState;
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PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix_devfn,
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qemu_irq *pic,
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MemoryRegion *address_space_mem,
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MemoryRegion *address_space_io,
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ram_addr_t ram_size,
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target_phys_addr_t pci_hole_start,
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target_phys_addr_t pci_hole_size,
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target_phys_addr_t pci_hole64_start,
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target_phys_addr_t pci_hole64_size,
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MemoryRegion *pci_memory,
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MemoryRegion *ram_memory);
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/* piix4.c */
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extern PCIDevice *piix4_dev;
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int piix4_init(PCIBus *bus, int devfn);
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/* vga.c */
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enum vga_retrace_method {
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VGA_RETRACE_DUMB,
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VGA_RETRACE_PRECISE
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};
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extern enum vga_retrace_method vga_retrace_method;
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static inline int isa_vga_init(void)
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{
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ISADevice *dev;
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dev = isa_try_create("isa-vga");
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if (!dev) {
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fprintf(stderr, "Warning: isa-vga not available\n");
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return 0;
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}
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qdev_init_nofail(&dev->qdev);
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return 1;
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}
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int pci_vga_init(PCIBus *bus);
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int isa_vga_mm_init(target_phys_addr_t vram_base,
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target_phys_addr_t ctrl_base, int it_shift,
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MemoryRegion *address_space);
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/* cirrus_vga.c */
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void pci_cirrus_vga_init(PCIBus *bus);
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void isa_cirrus_vga_init(MemoryRegion *address_space);
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/* ne2000.c */
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static inline bool isa_ne2000_init(int base, int irq, NICInfo *nd)
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{
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ISADevice *dev;
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qemu_check_nic_model(nd, "ne2k_isa");
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dev = isa_try_create("ne2k_isa");
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if (!dev) {
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return false;
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}
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qdev_prop_set_uint32(&dev->qdev, "iobase", base);
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qdev_prop_set_uint32(&dev->qdev, "irq", irq);
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qdev_set_nic_properties(&dev->qdev, nd);
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qdev_init_nofail(&dev->qdev);
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return true;
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}
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/* e820 types */
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#define E820_RAM 1
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#define E820_RESERVED 2
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#define E820_ACPI 3
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#define E820_NVS 4
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#define E820_UNUSABLE 5
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int e820_add_entry(uint64_t, uint64_t, uint32_t);
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#endif
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