In icount mode, instructions that access io memory spaces in the middle of the translation block invoke TB recompilation. After recompilation, such instructions become last in the TB and are allowed to access io memory spaces. When the code includes instruction like i386 'xchg eax, 0xffffd080' which accesses APIC, QEMU goes into an infinite loop of the recompilation. This instruction includes two memory accesses - one read and one write. After the first access, APIC calls cpu_report_tpr_access, which restores the CPU state to get the current eip. But cpu_restore_state_from_tb resets the cpu->can_do_io flag which makes the second memory access invalid. Therefore the second memory access causes a recompilation of the block. Then these operations repeat again and again. This patch moves resetting cpu->can_do_io flag from cpu_restore_state_from_tb to cpu_loop_exit* functions. It also adds a parameter for cpu_restore_state which controls restoring icount. There is no need to restore icount when we only query CPU state without breaking the TB. Restoring it in such cases leads to the incorrect flow of the virtual time. In most cases new parameter is true (icount should be recalculated). But there are two cases in i386 and openrisc when the CPU state is only queried without the need to break the TB. This patch fixes both of these cases. Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Message-Id: <20180409091320.12504.35329.stgit@pasha-VirtualBox> [rth: Make can_do_io setting unconditional; move from cpu_exec; make cpu_loop_exit_{noexc,restore} call cpu_loop_exit.] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
160 lines
4 KiB
C
160 lines
4 KiB
C
/*
|
|
* Moxie helper routines.
|
|
*
|
|
* Copyright (c) 2008, 2009, 2010, 2013 Anthony Green
|
|
*
|
|
* This library is free software; you can redistribute it and/or
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
* License as published by the Free Software Foundation; either
|
|
* version 2 of the License, or (at your option) any later version.
|
|
*
|
|
* This library is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
* Lesser General Public License for more details.
|
|
*
|
|
* You should have received a copy of the GNU General Public License
|
|
* along with this program. If not, see <http://www.gnu.org/licenses/>.
|
|
*/
|
|
|
|
#include "qemu/osdep.h"
|
|
|
|
#include "cpu.h"
|
|
#include "mmu.h"
|
|
#include "exec/exec-all.h"
|
|
#include "exec/cpu_ldst.h"
|
|
#include "qemu/host-utils.h"
|
|
#include "exec/helper-proto.h"
|
|
|
|
/* Try to fill the TLB and return an exception if error. If retaddr is
|
|
NULL, it means that the function was called in C code (i.e. not
|
|
from generated code or from helper.c) */
|
|
void tlb_fill(CPUState *cs, target_ulong addr, int size,
|
|
MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
|
|
{
|
|
int ret;
|
|
|
|
ret = moxie_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
|
|
if (unlikely(ret)) {
|
|
cpu_loop_exit_restore(cs, retaddr);
|
|
}
|
|
}
|
|
|
|
void helper_raise_exception(CPUMoxieState *env, int ex)
|
|
{
|
|
CPUState *cs = CPU(moxie_env_get_cpu(env));
|
|
|
|
cs->exception_index = ex;
|
|
/* Stash the exception type. */
|
|
env->sregs[2] = ex;
|
|
/* Stash the address where the exception occurred. */
|
|
cpu_restore_state(cs, GETPC(), true);
|
|
env->sregs[5] = env->pc;
|
|
/* Jump to the exception handline routine. */
|
|
env->pc = env->sregs[1];
|
|
cpu_loop_exit(cs);
|
|
}
|
|
|
|
uint32_t helper_div(CPUMoxieState *env, uint32_t a, uint32_t b)
|
|
{
|
|
if (unlikely(b == 0)) {
|
|
helper_raise_exception(env, MOXIE_EX_DIV0);
|
|
return 0;
|
|
}
|
|
if (unlikely(a == INT_MIN && b == -1)) {
|
|
return INT_MIN;
|
|
}
|
|
|
|
return (int32_t)a / (int32_t)b;
|
|
}
|
|
|
|
uint32_t helper_udiv(CPUMoxieState *env, uint32_t a, uint32_t b)
|
|
{
|
|
if (unlikely(b == 0)) {
|
|
helper_raise_exception(env, MOXIE_EX_DIV0);
|
|
return 0;
|
|
}
|
|
return a / b;
|
|
}
|
|
|
|
void helper_debug(CPUMoxieState *env)
|
|
{
|
|
CPUState *cs = CPU(moxie_env_get_cpu(env));
|
|
|
|
cs->exception_index = EXCP_DEBUG;
|
|
cpu_loop_exit(cs);
|
|
}
|
|
|
|
#if defined(CONFIG_USER_ONLY)
|
|
|
|
void moxie_cpu_do_interrupt(CPUState *cs)
|
|
{
|
|
CPUState *cs = CPU(moxie_env_get_cpu(env));
|
|
|
|
cs->exception_index = -1;
|
|
}
|
|
|
|
int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
|
|
int rw, int mmu_idx)
|
|
{
|
|
MoxieCPU *cpu = MOXIE_CPU(cs);
|
|
|
|
cs->exception_index = 0xaa;
|
|
cpu->env.debug1 = address;
|
|
cpu_dump_state(cs, stderr, fprintf, 0);
|
|
return 1;
|
|
}
|
|
|
|
#else /* !CONFIG_USER_ONLY */
|
|
|
|
int moxie_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size,
|
|
int rw, int mmu_idx)
|
|
{
|
|
MoxieCPU *cpu = MOXIE_CPU(cs);
|
|
CPUMoxieState *env = &cpu->env;
|
|
MoxieMMUResult res;
|
|
int prot, miss;
|
|
target_ulong phy;
|
|
int r = 1;
|
|
|
|
address &= TARGET_PAGE_MASK;
|
|
prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
|
|
miss = moxie_mmu_translate(&res, env, address, rw, mmu_idx);
|
|
if (miss) {
|
|
/* handle the miss. */
|
|
phy = 0;
|
|
cs->exception_index = MOXIE_EX_MMU_MISS;
|
|
} else {
|
|
phy = res.phy;
|
|
r = 0;
|
|
}
|
|
tlb_set_page(cs, address, phy, prot, mmu_idx, TARGET_PAGE_SIZE);
|
|
return r;
|
|
}
|
|
|
|
|
|
void moxie_cpu_do_interrupt(CPUState *cs)
|
|
{
|
|
switch (cs->exception_index) {
|
|
case MOXIE_EX_BREAK:
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
hwaddr moxie_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
|
|
{
|
|
MoxieCPU *cpu = MOXIE_CPU(cs);
|
|
uint32_t phy = addr;
|
|
MoxieMMUResult res;
|
|
int miss;
|
|
|
|
miss = moxie_mmu_translate(&res, &cpu->env, addr, 0, 0);
|
|
if (!miss) {
|
|
phy = res.phy;
|
|
}
|
|
return phy;
|
|
}
|
|
#endif
|