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qemu-patch-raspberry4/target/mips
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Philippe Mathieu-Daudé df44e81703 target/mips: Migrate missing CPU fields 
Add various missing fields to the CPU migration vmstate:

- CP0_VPControl & CP0_GlobalNumber      (01bc435b44 2016-02-03)
- CMGCRBase                             (c870e3f52c 2016-03-15)
- CP0_ErrCtl                            (0d74a222c2 2016-03-25)
- MXU GPR[] & CR                        (eb5559f67d 2018-10-18)
- R5900 128-bit upper half              (a168a796e1 2019-01-17)

This is a migration break.

Fixes: 01bc435b44 ("target-mips: implement R6 multi-threading")
Fixes: c870e3f52c ("target-mips: add CMGCRBase register")
Fixes: 0d74a222c2 ("target-mips: make ITC Configuration Tags accessible to the CPU")
Fixes: eb5559f67d ("target/mips: Introduce MXU registers")
Fixes: a168a796e1 ("target/mips: Introduce 32 R5900 multimedia registers")
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Acked-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210423220044.3004195-1-f4bug@amsat.org>
2021-05-02 16:49:34 +02:00
..
addr.c target/mips/addr: Add translation helpers for KSEG1 2021-01-14 17:13:53 +01:00
cp0_helper.c target/mips/mips-defs: Rename ISA_MIPS32R6 as ISA_MIPS_R6 2021-01-14 17:13:53 +01:00
cp0_timer.c target/mips/mips-defs: Rename ISA_MIPS32R2 as ISA_MIPS_R2 2021-01-14 17:13:53 +01:00
cpu-defs.c.inc target/mips: Remove vendor specific CPU definitions 2021-01-14 17:13:54 +01:00
cpu-param.h target/mips: Support variable page size 2020-06-01 13:28:21 +02:00
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu.c Testing, guest-loader and other misc tweaks 2021-03-11 16:20:58 +00:00
cpu.h target/mips: Promote 128-bit multimedia registers as global ones 2021-02-21 19:42:34 +01:00
dsp_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
fpu_helper.c target/mips: Extract FPU helpers to 'fpu_helper.h' 2021-01-14 17:13:53 +01:00
fpu_helper.h target/mips: Extract FPU helpers to 'fpu_helper.h' 2021-01-14 17:13:53 +01:00
gdbstub.c target/mips: Extract FPU helpers to 'fpu_helper.h' 2021-01-14 17:13:53 +01:00
helper.h target/mips: Extract MSA helper definitions 2021-01-14 17:13:53 +01:00
internal.h target/mips: Let CPUMIPSTLBContext::map_address() take MMUAccessType 2021-02-21 19:42:34 +01:00
kvm.c sysemu: Let VMChangeStateHandler take boolean 'running' argument 2021-03-09 23:13:57 +01:00
kvm_mips.h hw/mips: Implement the kvm_type() hook in MachineClass 2020-06-27 19:35:39 +02:00
lmmi_helper.c target/mips: Fix Lesser GPL version number 2020-11-03 16:51:13 +01:00
machine.c target/mips: Migrate missing CPU fields 2021-05-02 16:49:34 +02:00
meson.build target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree 2021-03-13 23:43:07 +01:00
mips-defs.h target/mips: Remove vendor specific CPU definitions 2021-01-14 17:13:54 +01:00
mips-semi.c semihosting: Move include/hw/semihosting/ -> include/semihosting/ 2021-03-10 15:34:12 +00:00
mips32r6.decode target/mips: Convert Rel6 LL/SC opcodes to decodetree 2021-01-14 17:13:53 +01:00
mips64r6.decode target/mips: Convert Rel6 LLD/SCD opcodes to decodetree 2021-01-14 17:13:53 +01:00
msa32.decode target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes 2021-01-14 17:13:53 +01:00
msa64.decode target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes 2021-01-14 17:13:53 +01:00
msa_helper.c target/mips: Include missing "tcg/tcg.h" header 2021-02-21 19:42:34 +01:00
msa_helper.h.inc target/mips: Extract MSA helper definitions 2021-01-14 17:13:53 +01:00
msa_translate.c target/mips: Introduce decodetree helpers for MSA LSA/DLSA opcodes 2021-01-14 17:13:53 +01:00
mxu_translate.c target/mips/mxu_translate.c: Fix array overrun for D16MIN/D16MAX 2021-03-22 15:05:41 +01:00
op_helper.c target/mips: Let do_translate_address() take MMUAccessType argument 2021-02-21 19:42:34 +01:00
rel6_translate.c target/mips/rel6_translate: Change license to GNU LGPL v2.1 (or later) 2021-04-20 12:52:04 +01:00
tlb_helper.c target/mips: Remove unused 'rw' argument from page_table_walk_refill() 2021-02-21 19:42:34 +01:00
TODO Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
trace-events trace-events: Shorten file names in comments 2019-03-22 16:18:07 +00:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/mips: Remove spurious LOG_UNIMP of MTHC0 opcode 2021-05-02 16:49:34 +02:00
translate.h target/mips/translate: Make gen_rdhwr() public 2021-03-13 23:43:14 +01:00
translate_addr_const.c target/mips: Extract LSA/DLSA translation generators 2021-01-14 17:13:53 +01:00
tx79.decode target/mips/tx79: Move PCPYLD / PCPYUD opcodes to decodetree 2021-03-13 23:43:24 +01:00
tx79_translate.c target/mips/tx79: Salvage instructions description comment 2021-03-13 23:43:30 +01:00
txx9_translate.c target/mips/tx79: Move MFHI1 / MFLO1 opcodes to decodetree 2021-03-13 23:43:07 +01:00