git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
1256 lines
23 KiB
C
1256 lines
23 KiB
C
/*
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* Alpha emulation cpu micro-operations helpers for qemu.
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*
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* Copyright (c) 2007 Jocelyn Mayer
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include "exec.h"
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#include "softfloat.h"
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#include "op_helper.h"
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#define MEMSUFFIX _raw
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#include "op_helper_mem.h"
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#if !defined(CONFIG_USER_ONLY)
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#define MEMSUFFIX _user
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#include "op_helper_mem.h"
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#define MEMSUFFIX _kernel
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#include "op_helper_mem.h"
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/* Those are used for supervisor and executive modes */
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#define MEMSUFFIX _data
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#include "op_helper_mem.h"
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#endif
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void helper_tb_flush (void)
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{
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tlb_flush(env, 1);
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}
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void cpu_dump_EA (target_ulong EA);
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void helper_print_mem_EA (target_ulong EA)
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{
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cpu_dump_EA(EA);
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}
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/*****************************************************************************/
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/* Exceptions processing helpers */
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void helper_excp (uint32_t excp, uint32_t error)
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{
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env->exception_index = excp;
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env->error_code = error;
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cpu_loop_exit();
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}
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void helper_amask (void)
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{
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switch (env->implver) {
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case IMPLVER_2106x:
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/* EV4, EV45, LCA, LCA45 & EV5 */
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break;
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case IMPLVER_21164:
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case IMPLVER_21264:
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case IMPLVER_21364:
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T0 &= ~env->amask;
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break;
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}
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}
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void helper_load_pcc (void)
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{
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/* XXX: TODO */
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T0 = 0;
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}
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void helper_load_implver (void)
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{
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T0 = env->implver;
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}
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void helper_load_fpcr (void)
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{
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T0 = 0;
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#ifdef CONFIG_SOFTFLOAT
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T0 |= env->fp_status.float_exception_flags << 52;
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if (env->fp_status.float_exception_flags)
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T0 |= 1ULL << 63;
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env->ipr[IPR_EXC_SUM] &= ~0x3E:
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env->ipr[IPR_EXC_SUM] |= env->fp_status.float_exception_flags << 1;
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#endif
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switch (env->fp_status.float_rounding_mode) {
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case float_round_nearest_even:
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T0 |= 2ULL << 58;
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break;
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case float_round_down:
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T0 |= 1ULL << 58;
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break;
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case float_round_up:
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T0 |= 3ULL << 58;
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break;
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case float_round_to_zero:
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break;
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}
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}
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void helper_store_fpcr (void)
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{
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#ifdef CONFIG_SOFTFLOAT
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set_float_exception_flags((T0 >> 52) & 0x3F, &FP_STATUS);
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#endif
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switch ((T0 >> 58) & 3) {
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case 0:
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set_float_rounding_mode(float_round_to_zero, &FP_STATUS);
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break;
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case 1:
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set_float_rounding_mode(float_round_down, &FP_STATUS);
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break;
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case 2:
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set_float_rounding_mode(float_round_nearest_even, &FP_STATUS);
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break;
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case 3:
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set_float_rounding_mode(float_round_up, &FP_STATUS);
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break;
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}
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}
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void helper_load_irf (void)
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{
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/* XXX: TODO */
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T0 = 0;
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}
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void helper_set_irf (void)
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{
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/* XXX: TODO */
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}
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void helper_clear_irf (void)
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{
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/* XXX: TODO */
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}
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void helper_addqv (void)
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{
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T2 = T0;
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T0 += T1;
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if (unlikely((T2 ^ T1 ^ (-1ULL)) & (T2 ^ T0) & (1ULL << 63))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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}
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void helper_addlv (void)
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{
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T2 = T0;
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T0 = (uint32_t)(T0 + T1);
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if (unlikely((T2 ^ T1 ^ (-1UL)) & (T2 ^ T0) & (1UL << 31))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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}
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void helper_subqv (void)
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{
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T2 = T0;
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T0 -= T1;
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if (unlikely(((~T2) ^ T0 ^ (-1ULL)) & ((~T2) ^ T1) & (1ULL << 63))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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}
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void helper_sublv (void)
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{
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T2 = T0;
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T0 = (uint32_t)(T0 - T1);
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if (unlikely(((~T2) ^ T0 ^ (-1UL)) & ((~T2) ^ T1) & (1UL << 31))) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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}
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void helper_mullv (void)
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{
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int64_t res = (int64_t)T0 * (int64_t)T1;
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if (unlikely((int32_t)res != res)) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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T0 = (int64_t)((int32_t)res);
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}
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void helper_mulqv ()
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{
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uint64_t res, tmp0, tmp1;
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res = (T0 >> 32) * (T1 >> 32);
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tmp0 = ((T0 & 0xFFFFFFFF) * (T1 >> 32)) +
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((T0 >> 32) * (T1 & 0xFFFFFFFF));
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tmp1 = (T0 & 0xFFFFFFFF) * (T1 & 0xFFFFFFFF);
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tmp0 += tmp1 >> 32;
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res += tmp0 >> 32;
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T0 *= T1;
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if (unlikely(res != 0)) {
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helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
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}
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}
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void helper_umulh (void)
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{
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uint64_t tmp0, tmp1;
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tmp0 = ((T0 & 0xFFFFFFFF) * (T1 >> 32)) +
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((T0 >> 32) * (T1 & 0xFFFFFFFF));
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tmp1 = (T0 & 0xFFFFFFFF) * (T1 & 0xFFFFFFFF);
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tmp0 += tmp1 >> 32;
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T0 = (T0 >> 32) * (T0 >> 32);
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T0 += tmp0 >> 32;
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}
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void helper_ctpop (void)
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{
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int n;
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for (n = 0; T0 != 0; n++)
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T0 = T0 ^ (T0 - 1);
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T0 = n;
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}
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void helper_ctlz (void)
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{
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uint32_t op32;
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int n;
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n = 0;
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if (!(T0 & 0xFFFFFFFF00000000ULL)) {
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n += 32;
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T0 <<= 32;
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}
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/* Make it easier for 32 bits hosts */
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op32 = T0 >> 32;
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if (!(op32 & 0xFFFF0000UL)) {
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n += 16;
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op32 <<= 16;
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}
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if (!(op32 & 0xFF000000UL)) {
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n += 8;
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op32 <<= 8;
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}
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if (!(op32 & 0xF0000000UL)) {
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n += 4;
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op32 <<= 4;
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}
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if (!(op32 & 0xC0000000UL)) {
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n += 2;
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op32 <<= 2;
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}
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if (!(op32 & 0x80000000UL)) {
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n++;
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op32 <<= 1;
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}
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if (!(op32 & 0x80000000UL)) {
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n++;
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}
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T0 = n;
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}
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void helper_cttz (void)
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{
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uint32_t op32;
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int n;
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n = 0;
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if (!(T0 & 0x00000000FFFFFFFFULL)) {
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n += 32;
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T0 >>= 32;
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}
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/* Make it easier for 32 bits hosts */
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op32 = T0;
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if (!(op32 & 0x0000FFFFUL)) {
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n += 16;
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op32 >>= 16;
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}
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if (!(op32 & 0x000000FFUL)) {
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n += 8;
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op32 >>= 8;
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}
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if (!(op32 & 0x0000000FUL)) {
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n += 4;
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op32 >>= 4;
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}
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if (!(op32 & 0x00000003UL)) {
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n += 2;
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op32 >>= 2;
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}
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if (!(op32 & 0x00000001UL)) {
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n++;
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op32 >>= 1;
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}
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if (!(op32 & 0x00000001UL)) {
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n++;
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}
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T0 = n;
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}
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static inline uint64_t byte_zap (uint64_t op, uint8_t mskb)
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{
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uint64_t mask;
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mask = 0;
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mask |= ((mskb >> 0) & 1) * 0x00000000000000FFULL;
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mask |= ((mskb >> 1) & 1) * 0x000000000000FF00ULL;
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mask |= ((mskb >> 2) & 1) * 0x0000000000FF0000ULL;
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mask |= ((mskb >> 3) & 1) * 0x00000000FF000000ULL;
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mask |= ((mskb >> 4) & 1) * 0x000000FF00000000ULL;
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mask |= ((mskb >> 5) & 1) * 0x0000FF0000000000ULL;
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mask |= ((mskb >> 6) & 1) * 0x00FF000000000000ULL;
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mask |= ((mskb >> 7) & 1) * 0xFF00000000000000ULL;
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return op & ~mask;
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}
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void helper_mskbl (void)
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{
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T0 = byte_zap(T0, 0x01 << (T1 & 7));
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}
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void helper_extbl (void)
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{
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T0 >>= (T1 & 7) * 8;
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T0 = byte_zap(T0, 0xFE);
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}
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void helper_insbl (void)
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{
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T0 <<= (T1 & 7) * 8;
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T0 = byte_zap(T0, ~(0x01 << (T1 & 7)));
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}
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void helper_mskwl (void)
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{
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T0 = byte_zap(T0, 0x03 << (T1 & 7));
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}
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void helper_extwl (void)
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{
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T0 >>= (T1 & 7) * 8;
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T0 = byte_zap(T0, 0xFC);
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}
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void helper_inswl (void)
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{
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T0 <<= (T1 & 7) * 8;
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T0 = byte_zap(T0, ~(0x03 << (T1 & 7)));
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}
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void helper_mskll (void)
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{
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T0 = byte_zap(T0, 0x0F << (T1 & 7));
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}
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void helper_extll (void)
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{
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T0 >>= (T1 & 7) * 8;
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T0 = byte_zap(T0, 0xF0);
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}
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void helper_insll (void)
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{
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T0 <<= (T1 & 7) * 8;
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T0 = byte_zap(T0, ~(0x0F << (T1 & 7)));
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}
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void helper_zap (void)
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{
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T0 = byte_zap(T0, T1);
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}
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void helper_zapnot (void)
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{
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T0 = byte_zap(T0, ~T1);
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}
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void helper_mskql (void)
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{
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T0 = byte_zap(T0, 0xFF << (T1 & 7));
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}
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void helper_extql (void)
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{
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T0 >>= (T1 & 7) * 8;
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T0 = byte_zap(T0, 0x00);
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}
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void helper_insql (void)
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{
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T0 <<= (T1 & 7) * 8;
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T0 = byte_zap(T0, ~(0xFF << (T1 & 7)));
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}
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void helper_mskwh (void)
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{
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T0 = byte_zap(T0, (0x03 << (T1 & 7)) >> 8);
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}
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void helper_inswh (void)
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{
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T0 >>= 64 - ((T1 & 7) * 8);
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T0 = byte_zap(T0, ~((0x03 << (T1 & 7)) >> 8));
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}
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void helper_extwh (void)
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{
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T0 <<= 64 - ((T1 & 7) * 8);
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T0 = byte_zap(T0, ~0x07);
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}
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void helper_msklh (void)
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{
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T0 = byte_zap(T0, (0x0F << (T1 & 7)) >> 8);
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}
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void helper_inslh (void)
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{
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T0 >>= 64 - ((T1 & 7) * 8);
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T0 = byte_zap(T0, ~((0x0F << (T1 & 7)) >> 8));
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}
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void helper_extlh (void)
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{
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T0 <<= 64 - ((T1 & 7) * 8);
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T0 = byte_zap(T0, ~0x0F);
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}
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void helper_mskqh (void)
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{
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T0 = byte_zap(T0, (0xFF << (T1 & 7)) >> 8);
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}
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void helper_insqh (void)
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{
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T0 >>= 64 - ((T1 & 7) * 8);
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T0 = byte_zap(T0, ~((0xFF << (T1 & 7)) >> 8));
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}
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void helper_extqh (void)
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{
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T0 <<= 64 - ((T1 & 7) * 8);
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T0 = byte_zap(T0, 0x00);
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}
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void helper_cmpbge (void)
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{
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uint8_t opa, opb, res;
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int i;
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res = 0;
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for (i = 0; i < 7; i++) {
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opa = T0 >> (i * 8);
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opb = T1 >> (i * 8);
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if (opa >= opb)
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res |= 1 << i;
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}
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T0 = res;
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}
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void helper_cmov_fir (int freg)
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{
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if (FT0 != 0)
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env->fir[freg] = FT1;
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}
|
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void helper_sqrts (void)
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{
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FT0 = float32_sqrt(FT0, &FP_STATUS);
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}
|
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|
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void helper_cpys (void)
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{
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union {
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double d;
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uint64_t i;
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} p, q, r;
|
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|
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p.d = FT0;
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q.d = FT1;
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r.i = p.i & 0x8000000000000000ULL;
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r.i |= q.i & ~0x8000000000000000ULL;
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FT0 = r.d;
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}
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|
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void helper_cpysn (void)
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{
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union {
|
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double d;
|
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uint64_t i;
|
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} p, q, r;
|
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|
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p.d = FT0;
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q.d = FT1;
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r.i = (~p.i) & 0x8000000000000000ULL;
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r.i |= q.i & ~0x8000000000000000ULL;
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FT0 = r.d;
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}
|
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|
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void helper_cpyse (void)
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{
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union {
|
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double d;
|
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uint64_t i;
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} p, q, r;
|
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|
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p.d = FT0;
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q.d = FT1;
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r.i = p.i & 0xFFF0000000000000ULL;
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r.i |= q.i & ~0xFFF0000000000000ULL;
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FT0 = r.d;
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}
|
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|
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void helper_itofs (void)
|
|
{
|
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union {
|
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double d;
|
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uint64_t i;
|
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} p;
|
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|
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p.d = FT0;
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FT0 = int64_to_float32(p.i, &FP_STATUS);
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}
|
|
|
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void helper_ftois (void)
|
|
{
|
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union {
|
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double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
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p.i = float32_to_int64(FT0, &FP_STATUS);
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FT0 = p.d;
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}
|
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|
|
void helper_sqrtt (void)
|
|
{
|
|
FT0 = float64_sqrt(FT0, &FP_STATUS);
|
|
}
|
|
|
|
void helper_cmptun (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
|
p.i = 0;
|
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if (float64_is_nan(FT0) || float64_is_nan(FT1))
|
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p.i = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cmpteq (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
|
p.i = 0;
|
|
if (float64_eq(FT0, FT1, &FP_STATUS))
|
|
p.i = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cmptle (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
|
p.i = 0;
|
|
if (float64_le(FT0, FT1, &FP_STATUS))
|
|
p.i = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cmptlt (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
|
p.i = 0;
|
|
if (float64_lt(FT0, FT1, &FP_STATUS))
|
|
p.i = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_itoft (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
|
p.d = FT0;
|
|
FT0 = int64_to_float64(p.i, &FP_STATUS);
|
|
}
|
|
|
|
void helper_ftoit (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t i;
|
|
} p;
|
|
|
|
p.i = float64_to_int64(FT0, &FP_STATUS);
|
|
FT0 = p.d;
|
|
}
|
|
|
|
static int vaxf_is_valid (float ff)
|
|
{
|
|
union {
|
|
float f;
|
|
uint32_t i;
|
|
} p;
|
|
uint32_t exp, mant;
|
|
|
|
p.f = ff;
|
|
exp = (p.i >> 23) & 0xFF;
|
|
mant = p.i & 0x007FFFFF;
|
|
if (exp == 0 && ((p.i & 0x80000000) || mant != 0)) {
|
|
/* Reserved operands / Dirty zero */
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static float vaxf_to_ieee32 (float ff)
|
|
{
|
|
union {
|
|
float f;
|
|
uint32_t i;
|
|
} p;
|
|
uint32_t exp;
|
|
|
|
p.f = ff;
|
|
exp = (p.i >> 23) & 0xFF;
|
|
if (exp < 3) {
|
|
/* Underflow */
|
|
p.f = 0.0;
|
|
} else {
|
|
p.f *= 0.25;
|
|
}
|
|
|
|
return p.f;
|
|
}
|
|
|
|
static float ieee32_to_vaxf (float fi)
|
|
{
|
|
union {
|
|
float f;
|
|
uint32_t i;
|
|
} p;
|
|
uint32_t exp, mant;
|
|
|
|
p.f = fi;
|
|
exp = (p.i >> 23) & 0xFF;
|
|
mant = p.i & 0x007FFFFF;
|
|
if (exp == 255) {
|
|
/* NaN or infinity */
|
|
p.i = 1;
|
|
} else if (exp == 0) {
|
|
if (mant == 0) {
|
|
/* Zero */
|
|
p.i = 0;
|
|
} else {
|
|
/* Denormalized */
|
|
p.f *= 2.0;
|
|
}
|
|
} else {
|
|
if (exp >= 253) {
|
|
/* Overflow */
|
|
p.i = 1;
|
|
} else {
|
|
p.f *= 4.0;
|
|
}
|
|
}
|
|
|
|
return p.f;
|
|
}
|
|
|
|
void helper_addf (void)
|
|
{
|
|
float ft0, ft1, ft2;
|
|
|
|
if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxf_to_ieee32(FT0);
|
|
ft1 = vaxf_to_ieee32(FT1);
|
|
ft2 = float32_add(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee32_to_vaxf(ft2);
|
|
}
|
|
|
|
void helper_subf (void)
|
|
{
|
|
float ft0, ft1, ft2;
|
|
|
|
if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxf_to_ieee32(FT0);
|
|
ft1 = vaxf_to_ieee32(FT1);
|
|
ft2 = float32_sub(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee32_to_vaxf(ft2);
|
|
}
|
|
|
|
void helper_mulf (void)
|
|
{
|
|
float ft0, ft1, ft2;
|
|
|
|
if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxf_to_ieee32(FT0);
|
|
ft1 = vaxf_to_ieee32(FT1);
|
|
ft2 = float32_mul(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee32_to_vaxf(ft2);
|
|
}
|
|
|
|
void helper_divf (void)
|
|
{
|
|
float ft0, ft1, ft2;
|
|
|
|
if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxf_to_ieee32(FT0);
|
|
ft1 = vaxf_to_ieee32(FT1);
|
|
ft2 = float32_div(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee32_to_vaxf(ft2);
|
|
}
|
|
|
|
void helper_sqrtf (void)
|
|
{
|
|
float ft0, ft1;
|
|
|
|
if (!vaxf_is_valid(FT0) || !vaxf_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxf_to_ieee32(FT0);
|
|
ft1 = float32_sqrt(ft0, &FP_STATUS);
|
|
FT0 = ieee32_to_vaxf(ft1);
|
|
}
|
|
|
|
void helper_itoff (void)
|
|
{
|
|
/* XXX: TODO */
|
|
}
|
|
|
|
static int vaxg_is_valid (double ff)
|
|
{
|
|
union {
|
|
double f;
|
|
uint64_t i;
|
|
} p;
|
|
uint64_t exp, mant;
|
|
|
|
p.f = ff;
|
|
exp = (p.i >> 52) & 0x7FF;
|
|
mant = p.i & 0x000FFFFFFFFFFFFFULL;
|
|
if (exp == 0 && ((p.i & 0x8000000000000000ULL) || mant != 0)) {
|
|
/* Reserved operands / Dirty zero */
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static double vaxg_to_ieee64 (double fg)
|
|
{
|
|
union {
|
|
double f;
|
|
uint64_t i;
|
|
} p;
|
|
uint32_t exp;
|
|
|
|
p.f = fg;
|
|
exp = (p.i >> 52) & 0x7FF;
|
|
if (exp < 3) {
|
|
/* Underflow */
|
|
p.f = 0.0;
|
|
} else {
|
|
p.f *= 0.25;
|
|
}
|
|
|
|
return p.f;
|
|
}
|
|
|
|
static double ieee64_to_vaxg (double fi)
|
|
{
|
|
union {
|
|
double f;
|
|
uint64_t i;
|
|
} p;
|
|
uint64_t mant;
|
|
uint32_t exp;
|
|
|
|
p.f = fi;
|
|
exp = (p.i >> 52) & 0x7FF;
|
|
mant = p.i & 0x000FFFFFFFFFFFFFULL;
|
|
if (exp == 255) {
|
|
/* NaN or infinity */
|
|
p.i = 1; /* VAX dirty zero */
|
|
} else if (exp == 0) {
|
|
if (mant == 0) {
|
|
/* Zero */
|
|
p.i = 0;
|
|
} else {
|
|
/* Denormalized */
|
|
p.f *= 2.0;
|
|
}
|
|
} else {
|
|
if (exp >= 2045) {
|
|
/* Overflow */
|
|
p.i = 1; /* VAX dirty zero */
|
|
} else {
|
|
p.f *= 4.0;
|
|
}
|
|
}
|
|
|
|
return p.f;
|
|
}
|
|
|
|
void helper_addg (void)
|
|
{
|
|
double ft0, ft1, ft2;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
ft2 = float64_add(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee64_to_vaxg(ft2);
|
|
}
|
|
|
|
void helper_subg (void)
|
|
{
|
|
double ft0, ft1, ft2;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
ft2 = float64_sub(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee64_to_vaxg(ft2);
|
|
}
|
|
|
|
void helper_mulg (void)
|
|
{
|
|
double ft0, ft1, ft2;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
ft2 = float64_mul(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee64_to_vaxg(ft2);
|
|
}
|
|
|
|
void helper_divg (void)
|
|
{
|
|
double ft0, ft1, ft2;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
ft2 = float64_div(ft0, ft1, &FP_STATUS);
|
|
FT0 = ieee64_to_vaxg(ft2);
|
|
}
|
|
|
|
void helper_sqrtg (void)
|
|
{
|
|
double ft0, ft1;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = float64_sqrt(ft0, &FP_STATUS);
|
|
FT0 = ieee64_to_vaxg(ft1);
|
|
}
|
|
|
|
void helper_cmpgeq (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
double ft0, ft1;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
p.u = 0;
|
|
if (float64_eq(ft0, ft1, &FP_STATUS))
|
|
p.u = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cmpglt (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
double ft0, ft1;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
p.u = 0;
|
|
if (float64_lt(ft0, ft1, &FP_STATUS))
|
|
p.u = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cmpgle (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
double ft0, ft1;
|
|
|
|
if (!vaxg_is_valid(FT0) || !vaxg_is_valid(FT1)) {
|
|
/* XXX: TODO */
|
|
}
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
ft1 = vaxg_to_ieee64(FT1);
|
|
p.u = 0;
|
|
if (float64_le(ft0, ft1, &FP_STATUS))
|
|
p.u = 0x4000000000000000ULL;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cvtqs (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
|
|
p.d = FT0;
|
|
FT0 = (float)p.u;
|
|
}
|
|
|
|
void helper_cvttq (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
|
|
p.u = FT0;
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cvtqt (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
|
|
p.d = FT0;
|
|
FT0 = p.u;
|
|
}
|
|
|
|
void helper_cvtqf (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
|
|
p.d = FT0;
|
|
FT0 = ieee32_to_vaxf(p.u);
|
|
}
|
|
|
|
void helper_cvtgf (void)
|
|
{
|
|
double ft0;
|
|
|
|
ft0 = vaxg_to_ieee64(FT0);
|
|
FT0 = ieee32_to_vaxf(ft0);
|
|
}
|
|
|
|
void helper_cvtgd (void)
|
|
{
|
|
/* XXX: TODO */
|
|
}
|
|
|
|
void helper_cvtgq (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
|
|
p.u = vaxg_to_ieee64(FT0);
|
|
FT0 = p.d;
|
|
}
|
|
|
|
void helper_cvtqg (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p;
|
|
|
|
p.d = FT0;
|
|
FT0 = ieee64_to_vaxg(p.u);
|
|
}
|
|
|
|
void helper_cvtdg (void)
|
|
{
|
|
/* XXX: TODO */
|
|
}
|
|
|
|
void helper_cvtlq (void)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p, q;
|
|
|
|
p.d = FT0;
|
|
q.u = (p.u >> 29) & 0x3FFFFFFF;
|
|
q.u |= (p.u >> 32);
|
|
q.u = (int64_t)((int32_t)q.u);
|
|
FT0 = q.d;
|
|
}
|
|
|
|
static inline void __helper_cvtql (int s, int v)
|
|
{
|
|
union {
|
|
double d;
|
|
uint64_t u;
|
|
} p, q;
|
|
|
|
p.d = FT0;
|
|
q.u = ((uint64_t)(p.u & 0xC0000000)) << 32;
|
|
q.u |= ((uint64_t)(p.u & 0x7FFFFFFF)) << 29;
|
|
FT0 = q.d;
|
|
if (v && (int64_t)((int32_t)p.u) != (int64_t)p.u) {
|
|
helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW);
|
|
}
|
|
if (s) {
|
|
/* TODO */
|
|
}
|
|
}
|
|
|
|
void helper_cvtql (void)
|
|
{
|
|
__helper_cvtql(0, 0);
|
|
}
|
|
|
|
void helper_cvtqlv (void)
|
|
{
|
|
__helper_cvtql(0, 1);
|
|
}
|
|
|
|
void helper_cvtqlsv (void)
|
|
{
|
|
__helper_cvtql(1, 1);
|
|
}
|
|
|
|
void helper_cmpfeq (void)
|
|
{
|
|
if (float64_eq(FT0, FT1, &FP_STATUS))
|
|
T0 = 1;
|
|
else
|
|
T0 = 0;
|
|
}
|
|
|
|
void helper_cmpfne (void)
|
|
{
|
|
if (float64_eq(FT0, FT1, &FP_STATUS))
|
|
T0 = 0;
|
|
else
|
|
T0 = 1;
|
|
}
|
|
|
|
void helper_cmpflt (void)
|
|
{
|
|
if (float64_lt(FT0, FT1, &FP_STATUS))
|
|
T0 = 1;
|
|
else
|
|
T0 = 0;
|
|
}
|
|
|
|
void helper_cmpfle (void)
|
|
{
|
|
if (float64_lt(FT0, FT1, &FP_STATUS))
|
|
T0 = 1;
|
|
else
|
|
T0 = 0;
|
|
}
|
|
|
|
void helper_cmpfgt (void)
|
|
{
|
|
if (float64_le(FT0, FT1, &FP_STATUS))
|
|
T0 = 0;
|
|
else
|
|
T0 = 1;
|
|
}
|
|
|
|
void helper_cmpfge (void)
|
|
{
|
|
if (float64_lt(FT0, FT1, &FP_STATUS))
|
|
T0 = 0;
|
|
else
|
|
T0 = 1;
|
|
}
|
|
|
|
#if !defined (CONFIG_USER_ONLY)
|
|
void helper_mfpr (int iprn)
|
|
{
|
|
uint64_t val;
|
|
|
|
if (cpu_alpha_mfpr(env, iprn, &val) == 0)
|
|
T0 = val;
|
|
}
|
|
|
|
void helper_mtpr (int iprn)
|
|
{
|
|
cpu_alpha_mtpr(env, iprn, T0, NULL);
|
|
}
|
|
#endif
|
|
|
|
/*****************************************************************************/
|
|
/* Softmmu support */
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#if !defined (CONFIG_USER_ONLY)
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#define GETPC() (__builtin_return_address(0))
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/* XXX: the two following helpers are pure hacks.
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* Hopefully, we emulate the PALcode, then we should never see
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* HW_LD / HW_ST instructions.
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*/
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void helper_ld_phys_to_virt (void)
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{
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uint64_t tlb_addr, physaddr;
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int index, is_user;
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void *retaddr;
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is_user = (env->ps >> 3) & 3;
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index = (T0 >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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redo:
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tlb_addr = env->tlb_table[is_user][index].addr_read;
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if ((T0 & TARGET_PAGE_MASK) ==
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(tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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physaddr = T0 + env->tlb_table[is_user][index].addend;
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} else {
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/* the page is not in the TLB : fill it */
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retaddr = GETPC();
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tlb_fill(T0, 0, is_user, retaddr);
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goto redo;
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}
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T0 = physaddr;
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}
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void helper_st_phys_to_virt (void)
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{
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uint64_t tlb_addr, physaddr;
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int index, is_user;
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void *retaddr;
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is_user = (env->ps >> 3) & 3;
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index = (T0 >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
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redo:
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tlb_addr = env->tlb_table[is_user][index].addr_write;
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if ((T0 & TARGET_PAGE_MASK) ==
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(tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) {
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physaddr = T0 + env->tlb_table[is_user][index].addend;
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} else {
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/* the page is not in the TLB : fill it */
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retaddr = GETPC();
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tlb_fill(T0, 1, is_user, retaddr);
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goto redo;
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}
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T0 = physaddr;
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}
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#define MMUSUFFIX _mmu
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#define SHIFT 0
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#include "softmmu_template.h"
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#define SHIFT 1
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#include "softmmu_template.h"
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#define SHIFT 2
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#include "softmmu_template.h"
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#define SHIFT 3
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#include "softmmu_template.h"
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/* try to fill the TLB and return an exception if error. If retaddr is
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NULL, it means that the function was called in C code (i.e. not
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from generated code or from helper.c) */
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/* XXX: fix it to restore all registers */
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void tlb_fill (target_ulong addr, int is_write, int is_user, void *retaddr)
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{
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TranslationBlock *tb;
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CPUState *saved_env;
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target_phys_addr_t pc;
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int ret;
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/* XXX: hack to restore env in all cases, even if not called from
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generated code */
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saved_env = env;
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env = cpu_single_env;
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ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, is_user, 1);
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if (!likely(ret == 0)) {
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if (likely(retaddr)) {
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/* now we have a real cpu fault */
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pc = (target_phys_addr_t)retaddr;
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tb = tb_find_pc(pc);
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if (likely(tb)) {
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/* the PC is inside the translated code. It means that we have
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a virtual CPU fault */
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cpu_restore_state(tb, env, pc, NULL);
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}
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}
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/* Exception index and error code are already set */
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cpu_loop_exit();
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}
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env = saved_env;
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}
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#endif
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