Update the OpenTitan interrupt layout to match the latest OpenTitan bitstreams. This involves changing the Ibex PLIC memory layout and the UART interrupts. Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Message-id: e92b696f1809c9fa4410da2e9f23c414db5a6960.1617202791.git.alistair.francis@wdc.com |
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boot.h | ||
boot_opensbi.h | ||
microchip_pfsoc.h | ||
numa.h | ||
opentitan.h | ||
riscv_hart.h | ||
shakti_c.h | ||
sifive_cpu.h | ||
sifive_e.h | ||
sifive_u.h | ||
spike.h | ||
virt.h |