e855761ca8
These are various small stylistic changes which help make things more consistent such that the automated conversion script can be simpler. It's not necessary to agree or disagree with these style changes because all of this code is going to be rewritten by the patch monkey script anyway. Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
124 lines
3.6 KiB
C
124 lines
3.6 KiB
C
/*
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* QEMU PIIX4 PCI Bridge Emulation
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*
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* Copyright (c) 2006 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "hw.h"
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#include "pc.h"
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#include "pci.h"
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#include "isa.h"
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#include "sysbus.h"
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PCIDevice *piix4_dev;
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typedef struct PIIX4State {
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PCIDevice dev;
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} PIIX4State;
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static void piix4_reset(void *opaque)
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{
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PIIX4State *d = opaque;
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uint8_t *pci_conf = d->dev.config;
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pci_conf[0x04] = 0x07; // master, memory and I/O
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pci_conf[0x05] = 0x00;
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pci_conf[0x06] = 0x00;
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pci_conf[0x07] = 0x02; // PCI_status_devsel_medium
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pci_conf[0x4c] = 0x4d;
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pci_conf[0x4e] = 0x03;
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pci_conf[0x4f] = 0x00;
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pci_conf[0x60] = 0x0a; // PCI A -> IRQ 10
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pci_conf[0x61] = 0x0a; // PCI B -> IRQ 10
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pci_conf[0x62] = 0x0b; // PCI C -> IRQ 11
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pci_conf[0x63] = 0x0b; // PCI D -> IRQ 11
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pci_conf[0x69] = 0x02;
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pci_conf[0x70] = 0x80;
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pci_conf[0x76] = 0x0c;
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pci_conf[0x77] = 0x0c;
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pci_conf[0x78] = 0x02;
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pci_conf[0x79] = 0x00;
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pci_conf[0x80] = 0x00;
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pci_conf[0x82] = 0x00;
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pci_conf[0xa0] = 0x08;
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pci_conf[0xa2] = 0x00;
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pci_conf[0xa3] = 0x00;
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pci_conf[0xa4] = 0x00;
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pci_conf[0xa5] = 0x00;
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pci_conf[0xa6] = 0x00;
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pci_conf[0xa7] = 0x00;
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pci_conf[0xa8] = 0x0f;
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pci_conf[0xaa] = 0x00;
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pci_conf[0xab] = 0x00;
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pci_conf[0xac] = 0x00;
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pci_conf[0xae] = 0x00;
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}
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static const VMStateDescription vmstate_piix4 = {
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.name = "PIIX4",
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.version_id = 2,
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.minimum_version_id = 2,
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.minimum_version_id_old = 2,
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.fields = (VMStateField[]) {
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VMSTATE_PCI_DEVICE(dev, PIIX4State),
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VMSTATE_END_OF_LIST()
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}
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};
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static int piix4_initfn(PCIDevice *dev)
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{
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PIIX4State *d = DO_UPCAST(PIIX4State, dev, dev);
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isa_bus_new(&d->dev.qdev, pci_address_space_io(dev));
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piix4_dev = &d->dev;
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qemu_register_reset(piix4_reset, d);
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return 0;
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}
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int piix4_init(PCIBus *bus, ISABus **isa_bus, int devfn)
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{
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PCIDevice *d;
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d = pci_create_simple_multifunction(bus, devfn, true, "PIIX4");
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*isa_bus = DO_UPCAST(ISABus, qbus, qdev_get_child_bus(&d->qdev, "isa.0"));
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return d->devfn;
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}
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static PCIDeviceInfo piix4_info = {
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.qdev.name = "PIIX4",
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.qdev.desc = "ISA bridge",
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.qdev.size = sizeof(PIIX4State),
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.qdev.vmsd = &vmstate_piix4,
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.qdev.no_user = 1,
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.no_hotplug = 1,
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.init = piix4_initfn,
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.vendor_id = PCI_VENDOR_ID_INTEL,
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/* 82371AB/EB/MB PIIX4 PCI-to-ISA bridge */
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.device_id = PCI_DEVICE_ID_INTEL_82371AB_0,
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.class_id = PCI_CLASS_BRIDGE_ISA,
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};
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static void piix4_register(void)
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{
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pci_qdev_register(&piix4_info);
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}
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device_init(piix4_register);
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