Bit 0 is the enable bit, which we not only don't want to set, but it will stick and make us think it's an I/O port resource. Signed-off-by: Alex Williamson <alex.williamson@hp.com> Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
34 lines
1.1 KiB
Diff
34 lines
1.1 KiB
Diff
Subject: [PATCH] bios: Use the correct mask to size the PCI option ROM BAR
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From: Alex Williamson <alex.williamson@hp.com>
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Bit 0 is the enable bit, which we not only don't want to set, but
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it will stick and make us think it's an I/O port resource.
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Signed-off-by: Alex Williamson <alex.williamson@hp.com>
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Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
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---
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diff --git a/bios/rombios32.c b/bios/rombios32.c
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index d7e18e9..f861f81 100644
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--- a/bios/rombios32.c
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+++ b/bios/rombios32.c
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@@ -985,11 +985,13 @@ static void pci_bios_init_device(PCIDevice *d)
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int ofs;
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uint32_t val, size ;
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- if (i == PCI_ROM_SLOT)
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+ if (i == PCI_ROM_SLOT) {
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ofs = 0x30;
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- else
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+ pci_config_writel(d, ofs, 0xfffffffe);
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+ } else {
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ofs = 0x10 + i * 4;
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- pci_config_writel(d, ofs, 0xffffffff);
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+ pci_config_writel(d, ofs, 0xffffffff);
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+ }
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val = pci_config_readl(d, ofs);
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if (val != 0) {
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size = (~(val & ~0xf)) + 1;
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