8063396bf3
This converts existing DECLARE_INSTANCE_CHECKER usage to OBJECT_DECLARE_SIMPLE_TYPE when possible. $ ./scripts/codeconverter/converter.py -i \ --pattern=AddObjectDeclareSimpleType $(git grep -l '' -- '*.[ch]') Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> Acked-by: Paul Durrant <paul@xen.org> Message-Id: <20200916182519.415636-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
46 lines
1.1 KiB
C
46 lines
1.1 KiB
C
/*
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* ARM SSE-200 Message Handling Unit (MHU)
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*
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* Copyright (c) 2019 Linaro Limited
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* Written by Peter Maydell
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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/*
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* This is a model of the Message Handling Unit (MHU) which is part of the
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* Arm SSE-200 and documented in
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* http://infocenter.arm.com/help/topic/com.arm.doc.101104_0100_00_en/corelink_sse200_subsystem_for_embedded_technical_reference_manual_101104_0100_00_en.pdf
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*
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* QEMU interface:
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* + sysbus MMIO region 0: the system information register bank
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* + sysbus IRQ 0: interrupt for CPU 0
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* + sysbus IRQ 1: interrupt for CPU 1
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*/
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#ifndef HW_MISC_ARMSSE_MHU_H
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#define HW_MISC_ARMSSE_MHU_H
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_ARMSSE_MHU "armsse-mhu"
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OBJECT_DECLARE_SIMPLE_TYPE(ARMSSEMHU, ARMSSE_MHU)
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struct ARMSSEMHU {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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MemoryRegion iomem;
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qemu_irq cpu0irq;
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qemu_irq cpu1irq;
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uint32_t cpu0intr;
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uint32_t cpu1intr;
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};
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#endif
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