qemu-patch-raspberry4/hw/shix.c
aliguori 492c30af25 Make DMA bottom-half driven (v2)
The current DMA routines are driven by a call in main_loop_wait() after every
select.

This patch converts the DMA code to be driven by a constantly rescheduled
bottom half.  The advantage of using a scheduled bottom half is that we can
stop scheduling the bottom half when there no DMA channels are runnable.  This
means we can potentially detect this case and sleep longer in the main loop.

The only two architectures implementing DMA_run() are cris and i386.  For cris,
I converted it to a simple repeating bottom half.  I've only compile tested
this as cris does not seem to work on a 64-bit host.  It should be functionally
identical to the previous implementation so I expect it to work.

For x86, I've made sure to only fire the DMA bottom half if there is a DMA
channel that is runnable.  The effect of this is that unless you're using sb16
or a floppy disk, the DMA bottom half never fires.

You probably should test this malc.  My own benchmarks actually show slight
improvement by it's possible the change in timing could affect your demos.

Since v1, I've changed the code to use a BH instead of a timer.  cris at least
seems to depend on faster than 10ms polling.

Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5573 c046a42c-6fe2-441c-8c8c-71466251a162
2008-10-31 17:25:56 +00:00

111 lines
3.2 KiB
C

/*
* SHIX 2.0 board description
*
* Copyright (c) 2005 Samuel Tardieu
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
/*
Shix 2.0 board by Alexis Polti, described at
http://perso.enst.fr/~polti/realisations/shix20/
More information in target-sh4/README.sh4
*/
#include "hw.h"
#include "sh.h"
#include "sysemu.h"
#include "boards.h"
#define BIOS_FILENAME "shix_bios.bin"
#define BIOS_ADDRESS 0xA0000000
void irq_info(void)
{
/* XXXXX */
}
void pic_info(void)
{
/* XXXXX */
}
void vga_update_display(void)
{
/* XXXXX */
}
void vga_invalidate_display(void)
{
/* XXXXX */
}
void vga_screen_dump(const char *filename)
{
/* XXXXX */
}
static void shix_init(ram_addr_t ram_size, int vga_ram_size,
const char *boot_device, DisplayState * ds,
const char *kernel_filename, const char *kernel_cmdline,
const char *initrd_filename, const char *cpu_model)
{
int ret;
CPUState *env;
struct SH7750State *s;
if (!cpu_model)
cpu_model = "any";
printf("Initializing CPU\n");
env = cpu_init(cpu_model);
/* Allocate memory space */
printf("Allocating ROM\n");
cpu_register_physical_memory(0x00000000, 0x00004000, IO_MEM_ROM);
printf("Allocating SDRAM 1\n");
cpu_register_physical_memory(0x08000000, 0x01000000, 0x00004000);
printf("Allocating SDRAM 2\n");
cpu_register_physical_memory(0x0c000000, 0x01000000, 0x01004000);
/* Load BIOS in 0 (and access it through P2, 0xA0000000) */
if (bios_name == NULL)
bios_name = BIOS_FILENAME;
printf("%s: load BIOS '%s'\n", __func__, bios_name);
ret = load_image(bios_name, phys_ram_base);
if (ret < 0) { /* Check bios size */
fprintf(stderr, "ret=%d\n", ret);
fprintf(stderr, "qemu: could not load SHIX bios '%s'\n",
bios_name);
exit(1);
}
/* Register peripherals */
s = sh7750_init(env);
/* XXXXX Check success */
tc58128_init(s, "shix_linux_nand.bin", NULL);
fprintf(stderr, "initialization terminated\n");
}
QEMUMachine shix_machine = {
.name = "shix",
.desc = "shix card",
.init = shix_init,
.ram_require = (0x00004000 + 0x01000000 + 0x01000000) | RAMSIZE_FIXED,
};