qemu-patch-raspberry4/target/riscv/insn_trans
Richard Henderson ffe70e4dfc target/riscv: Check nanboxed inputs in trans_rvf.inc.c
If a 32-bit input is not properly nanboxed, then the input is replaced
with the default qnan.  The only inline expansion is for the sign-changing
set of instructions: FSGNJ.S, FSGNJX.S, FSGNJN.S.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: LIU Zhiwei <zhiwei_liu@c-sky.com>
Message-Id: <20200724002807.441147-6-richard.henderson@linaro.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2020-08-21 22:37:55 -07:00
..
trans_privileged.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
trans_rva.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
trans_rvd.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
trans_rvf.c.inc target/riscv: Check nanboxed inputs in trans_rvf.inc.c 2020-08-21 22:37:55 -07:00
trans_rvh.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
trans_rvi.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
trans_rvm.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00
trans_rvv.c.inc meson: rename included C source files to .c.inc 2020-08-21 06:18:30 -04:00