Initial push of rtl8822bu driver

.gitignore

@@ -0,0 +1,3 @@
+sftp-config.json
+*.o
+*.ko

Kconfig

@@ -0,0 +1,6 @@
+config RTL8822BU
+	tristate "Realtek 8822B USB WiFi"
+	depends on USB
+	---help---
+	  Help message of RTL8822BU
+

README.md

@@ -0,0 +1,44 @@
+<u>**8822BU for Linux**</u>
+
+Driver for 802.11ac USB Adapter with  
+RTL8822BU chipset  
+Only STA/Monitor Mode is supported, no AP.  
+
+A few known wireless cards that use this driver include 
+* [Edimax EW-7822ULC](http://us.edimax.com/edimax/merchandise/merchandise_detail/data/edimax/us/wireless_adapters_ac1200_dual-band/ew-7822ulc/)
+* [ASUS AC-53 NANO](https://www.asus.com/Networking/USB-AC53-Nano/)
+
+
+<u>At least v4.0 is needed to compile this module</u>  
+sorry people with older kernels, the code is removed.
+
+Currently tested on X86_64 and ARM platform(s) **only**,  
+cross compile possible.
+
+For compiling type  
+`make`  
+in source dir  
+
+To install the firmware files  
+`sudo make install`
+
+
+To Unload driver you may need to disconnect the device  
+
+If the driver fails building consult your distro how to  
+install the kernel sources and build an <u>external</u> module.
+
+
+**NOTES**  
+This driver allows use of wpa_supplicant by using the nl80211 driver
+`wpa_supplicant -Dnl80211`
+
+
+**STATUS**  
+Driver works fine (some sort of)  
+Most of the work is done is cleaning the driver and make this mess **readable**   for conversion.
+Updates for wireless-ext/cfg80211  are not accepted.  
+
+  
+**BUGS**  
+ 

clean

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+#!/bin/bash
+rmmod 8192cu
+rmmod 8192ce
+rmmod 8192du
+rmmod 8192de

core/rtw_eeprom.c

@@ -0,0 +1,415 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_EEPROM_C_
+
+#include <drv_conf.h>
+#include <osdep_service.h>
+#include <drv_types.h>
+
+void up_clk(_adapter	*padapter,	 u16 *x)
+{
+	_func_enter_;
+	*x = *x | _EESK;
+	rtw_write8(padapter, EE_9346CR, (u8)*x);
+	rtw_udelay_os(CLOCK_RATE);
+
+	_func_exit_;
+
+}
+
+void down_clk(_adapter	*padapter, u16 *x)
+{
+	_func_enter_;
+	*x = *x & ~_EESK;
+	rtw_write8(padapter, EE_9346CR, (u8)*x);
+	rtw_udelay_os(CLOCK_RATE);
+	_func_exit_;
+}
+
+void shift_out_bits(_adapter *padapter, u16 data, u16 count)
+{
+	u16 x, mask;
+	_func_enter_;
+
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	mask = 0x01 << (count - 1);
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EEDO | _EEDI);
+
+	do {
+		x &= ~_EEDI;
+		if (data & mask)
+			x |= _EEDI;
+		if (rtw_is_surprise_removed(padapter)) {
+			RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+			goto out;
+		}
+		rtw_write8(padapter, EE_9346CR, (u8)x);
+		rtw_udelay_os(CLOCK_RATE);
+		up_clk(padapter, &x);
+		down_clk(padapter, &x);
+		mask = mask >> 1;
+	} while (mask);
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x &= ~_EEDI;
+	rtw_write8(padapter, EE_9346CR, (u8)x);
+out:
+	_func_exit_;
+}
+
+u16 shift_in_bits(_adapter *padapter)
+{
+	u16 x, d = 0, i;
+	_func_enter_;
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EEDO | _EEDI);
+	d = 0;
+
+	for (i = 0; i < 16; i++) {
+		d = d << 1;
+		up_clk(padapter, &x);
+		if (rtw_is_surprise_removed(padapter)) {
+			RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+			goto out;
+		}
+		x = rtw_read8(padapter, EE_9346CR);
+
+		x &= ~(_EEDI);
+		if (x & _EEDO)
+			d |= 1;
+
+		down_clk(padapter, &x);
+	}
+out:
+	_func_exit_;
+
+	return d;
+}
+
+void standby(_adapter	*padapter)
+{
+	u8   x;
+	_func_enter_;
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EECS | _EESK);
+	rtw_write8(padapter, EE_9346CR, x);
+
+	rtw_udelay_os(CLOCK_RATE);
+	x |= _EECS;
+	rtw_write8(padapter, EE_9346CR, x);
+	rtw_udelay_os(CLOCK_RATE);
+	_func_exit_;
+}
+
+u16 wait_eeprom_cmd_done(_adapter *padapter)
+{
+	u8	x;
+	u16	i, res = _FALSE;
+	_func_enter_;
+	standby(padapter);
+	for (i = 0; i < 200; i++) {
+		x = rtw_read8(padapter, EE_9346CR);
+		if (x & _EEDO) {
+			res = _TRUE;
+			goto exit;
+		}
+		rtw_udelay_os(CLOCK_RATE);
+	}
+exit:
+	_func_exit_;
+	return res;
+}
+
+void eeprom_clean(_adapter *padapter)
+{
+	u16 x;
+	_func_enter_;
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x = rtw_read8(padapter, EE_9346CR);
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	x &= ~(_EECS | _EEDI);
+	rtw_write8(padapter, EE_9346CR, (u8)x);
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	up_clk(padapter, &x);
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	down_clk(padapter, &x);
+out:
+	_func_exit_;
+}
+
+void eeprom_write16(_adapter *padapter, u16 reg, u16 data)
+{
+	u8 x;
+#ifdef CONFIG_RTL8712
+	u8	tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new;
+	tmp8_ori = rtw_read8(padapter, 0x102502f1);
+	tmp8_new = tmp8_ori & 0xf7;
+	if (tmp8_ori != tmp8_new) {
+		rtw_write8(padapter, 0x102502f1, tmp8_new);
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_, _drv_err_, ("====write 0x102502f1=====\n"));
+	}
+	tmp8_clk_ori = rtw_read8(padapter, 0x10250003);
+	tmp8_clk_new = tmp8_clk_ori | 0x20;
+	if (tmp8_clk_new != tmp8_clk_ori) {
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_, _drv_err_, ("====write 0x10250003=====\n"));
+		rtw_write8(padapter, 0x10250003, tmp8_clk_new);
+	}
+#endif
+	_func_enter_;
+
+	x = rtw_read8(padapter, EE_9346CR);
+
+	x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
+	x |= _EEM1 | _EECS;
+	rtw_write8(padapter, EE_9346CR, x);
+
+	shift_out_bits(padapter, EEPROM_EWEN_OPCODE, 5);
+
+	if (padapter->EepromAddressSize == 8)	/* CF+ and SDIO */
+		shift_out_bits(padapter, 0, 6);
+	else									/* USB */
+		shift_out_bits(padapter, 0, 4);
+
+	standby(padapter);
+
+	/* Commented out by rcnjko, 2004.0
+	 * 	  Erase this particular word.  Write the erase opcode and register
+	 *    number in that order. The opcode is 3bits in length; reg is 6 bits long. */
+/*	shift_out_bits(Adapter, EEPROM_ERASE_OPCODE, 3);
+ *	shift_out_bits(Adapter, reg, Adapter->EepromAddressSize);
+ *
+ *	if (wait_eeprom_cmd_done(Adapter ) == FALSE)
+ *	{
+ *		return;
+ *	} */
+
+
+	standby(padapter);
+
+	/* write the new word to the EEPROM */
+
+	/* send the write opcode the EEPORM */
+	shift_out_bits(padapter, EEPROM_WRITE_OPCODE, 3);
+
+	/* select which word in the EEPROM that we are writing to. */
+	shift_out_bits(padapter, reg, padapter->EepromAddressSize);
+
+	/* write the data to the selected EEPROM word. */
+	shift_out_bits(padapter, data, 16);
+
+	if (wait_eeprom_cmd_done(padapter) == _FALSE)
+
+		goto exit;
+
+	standby(padapter);
+
+	shift_out_bits(padapter, EEPROM_EWDS_OPCODE, 5);
+	shift_out_bits(padapter, reg, 4);
+
+	eeprom_clean(padapter);
+exit:
+#ifdef CONFIG_RTL8712
+	if (tmp8_clk_new != tmp8_clk_ori)
+		rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
+	if (tmp8_new != tmp8_ori)
+		rtw_write8(padapter, 0x102502f1, tmp8_ori);
+
+#endif
+	_func_exit_;
+	return;
+}
+
+u16 eeprom_read16(_adapter *padapter, u16 reg)  /* ReadEEprom */
+{
+
+	u16 x;
+	u16 data = 0;
+#ifdef CONFIG_RTL8712
+	u8	tmp8_ori, tmp8_new, tmp8_clk_ori, tmp8_clk_new;
+	tmp8_ori = rtw_read8(padapter, 0x102502f1);
+	tmp8_new = tmp8_ori & 0xf7;
+	if (tmp8_ori != tmp8_new) {
+		rtw_write8(padapter, 0x102502f1, tmp8_new);
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_, _drv_err_, ("====write 0x102502f1=====\n"));
+	}
+	tmp8_clk_ori = rtw_read8(padapter, 0x10250003);
+	tmp8_clk_new = tmp8_clk_ori | 0x20;
+	if (tmp8_clk_new != tmp8_clk_ori) {
+		RT_TRACE(_module_rtl871x_mp_ioctl_c_, _drv_err_, ("====write 0x10250003=====\n"));
+		rtw_write8(padapter, 0x10250003, tmp8_clk_new);
+	}
+#endif
+	_func_enter_;
+
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	/* select EEPROM, reset bits, set _EECS */
+	x = rtw_read8(padapter, EE_9346CR);
+
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+
+	x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
+	x |= _EEM1 | _EECS;
+	rtw_write8(padapter, EE_9346CR, (unsigned char)x);
+
+	/* write the read opcode and register number in that order */
+	/* The opcode is 3bits in length, reg is 6 bits long */
+	shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
+	shift_out_bits(padapter, reg, padapter->EepromAddressSize);
+
+	/* Now read the data (16 bits) in from the selected EEPROM word */
+	data = shift_in_bits(padapter);
+
+	eeprom_clean(padapter);
+out:
+#ifdef CONFIG_RTL8712
+	if (tmp8_clk_new != tmp8_clk_ori)
+		rtw_write8(padapter, 0x10250003, tmp8_clk_ori);
+	if (tmp8_new != tmp8_ori)
+		rtw_write8(padapter, 0x102502f1, tmp8_ori);
+
+#endif
+	_func_exit_;
+	return data;
+
+
+}
+
+
+
+
+/* From even offset */
+void eeprom_read_sz(_adapter *padapter, u16 reg, u8 *data, u32 sz)
+{
+
+	u16 x, data16;
+	u32 i;
+	_func_enter_;
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+	/* select EEPROM, reset bits, set _EECS */
+	x = rtw_read8(padapter, EE_9346CR);
+
+	if (rtw_is_surprise_removed(padapter)) {
+		RT_TRACE(_module_rtl871x_eeprom_c_, _drv_err_, ("padapter->bSurpriseRemoved==_TRUE"));
+		goto out;
+	}
+
+	x &= ~(_EEDI | _EEDO | _EESK | _EEM0);
+	x |= _EEM1 | _EECS;
+	rtw_write8(padapter, EE_9346CR, (unsigned char)x);
+
+	/* write the read opcode and register number in that order */
+	/* The opcode is 3bits in length, reg is 6 bits long */
+	shift_out_bits(padapter, EEPROM_READ_OPCODE, 3);
+	shift_out_bits(padapter, reg, padapter->EepromAddressSize);
+
+
+	for (i = 0; i < sz; i += 2) {
+		data16 = shift_in_bits(padapter);
+		data[i] = data16 & 0xff;
+		data[i + 1] = data16 >> 8;
+	}
+
+	eeprom_clean(padapter);
+out:
+	_func_exit_;
+
+
+
+}
+
+
+/* addr_off : address offset of the entry in eeprom (not the tuple number of eeprom (reg); that is addr_off !=reg) */
+u8 eeprom_read(_adapter *padapter, u32 addr_off, u8 sz, u8 *rbuf)
+{
+	u8 quotient, remainder, addr_2align_odd;
+	u16 reg, stmp , i = 0, idx = 0;
+	_func_enter_;
+	reg = (u16)(addr_off >> 1);
+	addr_2align_odd = (u8)(addr_off & 0x1);
+
+	if (addr_2align_odd) { /* read that start at high part: e.g  1,3,5,7,9,... */
+		stmp = eeprom_read16(padapter, reg);
+		rbuf[idx++] = (u8)((stmp >> 8) & 0xff); /* return hogh-part of the short */
+		reg++;
+		sz--;
+	}
+
+	quotient = sz >> 1;
+	remainder = sz & 0x1;
+
+	for (i = 0 ; i < quotient; i++) {
+		stmp = eeprom_read16(padapter, reg + i);
+		rbuf[idx++] = (u8)(stmp & 0xff);
+		rbuf[idx++] = (u8)((stmp >> 8) & 0xff);
+	}
+
+	reg = reg + i;
+	if (remainder) { /* end of read at lower part of short : 0,2,4,6,... */
+		stmp = eeprom_read16(padapter, reg);
+		rbuf[idx] = (u8)(stmp & 0xff);
+	}
+	_func_exit_;
+	return _TRUE;
+}
+
+
+
+VOID read_eeprom_content(_adapter	*padapter)
+{
+
+	_func_enter_;
+
+
+	_func_exit_;
+}

core/rtw_io.c

@@ -0,0 +1,737 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*
+
+The purpose of rtw_io.c
+
+a. provides the API
+
+b. provides the protocol engine
+
+c. provides the software interface between caller and the hardware interface
+
+
+Compiler Flag Option:
+
+1. CONFIG_SDIO_HCI:
+    a. USE_SYNC_IRP:  Only sync operations are provided.
+    b. USE_ASYNC_IRP:Both sync/async operations are provided.
+
+2. CONFIG_USB_HCI:
+   a. USE_ASYNC_IRP: Both sync/async operations are provided.
+
+3. CONFIG_CFIO_HCI:
+   b. USE_SYNC_IRP: Only sync operations are provided.
+
+
+Only sync read/rtw_write_mem operations are provided.
+
+jackson@realtek.com.tw
+
+*/
+
+#define _RTW_IO_C_
+
+#include <drv_types.h>
+#include <hal_data.h>
+
+#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+	#error "Shall be Linux or Windows, but not both!\n"
+#endif
+
+#ifdef CONFIG_SDIO_HCI
+	#define rtw_le16_to_cpu(val)		val
+	#define rtw_le32_to_cpu(val)		val
+	#define rtw_cpu_to_le16(val)		val
+	#define rtw_cpu_to_le32(val)		val
+#else
+	#define rtw_le16_to_cpu(val)		le16_to_cpu(val)
+	#define rtw_le32_to_cpu(val)		le32_to_cpu(val)
+	#define rtw_cpu_to_le16(val)		cpu_to_le16(val)
+	#define rtw_cpu_to_le32(val)		cpu_to_le32(val)
+#endif
+
+
+u8 _rtw_read8(_adapter *adapter, u32 addr)
+{
+	u8 r_val;
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u8(*_read8)(struct intf_hdl *pintfhdl, u32 addr);
+	_func_enter_;
+	_read8 = pintfhdl->io_ops._read8;
+
+	r_val = _read8(pintfhdl, addr);
+	_func_exit_;
+	return r_val;
+}
+
+u16 _rtw_read16(_adapter *adapter, u32 addr)
+{
+	u16 r_val;
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u16(*_read16)(struct intf_hdl *pintfhdl, u32 addr);
+	_func_enter_;
+	_read16 = pintfhdl->io_ops._read16;
+
+	r_val = _read16(pintfhdl, addr);
+	_func_exit_;
+	return rtw_le16_to_cpu(r_val);
+}
+
+u32 _rtw_read32(_adapter *adapter, u32 addr)
+{
+	u32 r_val;
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u32(*_read32)(struct intf_hdl *pintfhdl, u32 addr);
+	_func_enter_;
+	_read32 = pintfhdl->io_ops._read32;
+
+	r_val = _read32(pintfhdl, addr);
+	_func_exit_;
+	return rtw_le32_to_cpu(r_val);
+
+}
+
+int _rtw_write8(_adapter *adapter, u32 addr, u8 val)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+	int ret;
+	_func_enter_;
+	_write8 = pintfhdl->io_ops._write8;
+
+	ret = _write8(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write16(_adapter *adapter, u32 addr, u16 val)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+	int ret;
+	_func_enter_;
+	_write16 = pintfhdl->io_ops._write16;
+
+	val = rtw_cpu_to_le16(val);
+	ret = _write16(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write32(_adapter *adapter, u32 addr, u32 val)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+	int ret;
+	_func_enter_;
+	_write32 = pintfhdl->io_ops._write32;
+
+	val = rtw_cpu_to_le32(val);
+	ret = _write32(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+
+int _rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *pdata)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl	*pintfhdl = (struct intf_hdl *)(&(pio_priv->intf));
+	int (*_writeN)(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata);
+	int ret;
+	_func_enter_;
+	_writeN = pintfhdl->io_ops._writeN;
+
+	ret = _writeN(pintfhdl, addr, length, pdata);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+
+#ifdef CONFIG_SDIO_HCI
+u8 _rtw_sd_f0_read8(_adapter *adapter, u32 addr)
+{
+	u8 r_val = 0x00;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	u8(*_sd_f0_read8)(struct intf_hdl *pintfhdl, u32 addr);
+
+	_func_enter_;
+	_sd_f0_read8 = pintfhdl->io_ops._sd_f0_read8;
+
+	if (_sd_f0_read8)
+		r_val = _sd_f0_read8(pintfhdl, addr);
+	else
+		RTW_WARN(FUNC_ADPT_FMT" _sd_f0_read8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	_func_exit_;
+	return r_val;
+}
+
+#ifdef CONFIG_SDIO_INDIRECT_ACCESS
+u8 _rtw_sd_iread8(_adapter *adapter, u32 addr)
+{
+	u8 r_val = 0x00;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	u8(*_sd_iread8)(struct intf_hdl *pintfhdl, u32 addr);
+
+	_sd_iread8 = pintfhdl->io_ops._sd_iread8;
+
+	if (_sd_iread8)
+		r_val = _sd_iread8(pintfhdl, addr);
+	else
+		RTW_ERR(FUNC_ADPT_FMT" _sd_iread8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	return r_val;
+}
+
+u16 _rtw_sd_iread16(_adapter *adapter, u32 addr)
+{
+	u16 r_val = 0x00;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	u16(*_sd_iread16)(struct intf_hdl *pintfhdl, u32 addr);
+
+	_sd_iread16 = pintfhdl->io_ops._sd_iread16;
+
+	if (_sd_iread16)
+		r_val = _sd_iread16(pintfhdl, addr);
+	else
+		RTW_ERR(FUNC_ADPT_FMT" _sd_iread16 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	return r_val;
+}
+
+u32 _rtw_sd_iread32(_adapter *adapter, u32 addr)
+{
+	u32 r_val = 0x00;
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	u32(*_sd_iread32)(struct intf_hdl *pintfhdl, u32 addr);
+
+	_sd_iread32 = pintfhdl->io_ops._sd_iread32;
+
+	if (_sd_iread32)
+		r_val = _sd_iread32(pintfhdl, addr);
+	else
+		RTW_ERR(FUNC_ADPT_FMT" _sd_iread32 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	return r_val;
+}
+
+int _rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val)
+{
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	int (*_sd_iwrite8)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+	int ret = -1;
+
+	_sd_iwrite8 = pintfhdl->io_ops._sd_iwrite8;
+
+	if (_sd_iwrite8)
+		ret = _sd_iwrite8(pintfhdl, addr, val);
+	else
+		RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite8 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	return RTW_STATUS_CODE(ret);
+}
+
+int _rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val)
+{
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	int (*_sd_iwrite16)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+	int ret = -1;
+
+	_sd_iwrite16 = pintfhdl->io_ops._sd_iwrite16;
+
+	if (_sd_iwrite16)
+		ret = _sd_iwrite16(pintfhdl, addr, val);
+	else
+		RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite16 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val)
+{
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+	int (*_sd_iwrite32)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+	int ret = -1;
+
+	_sd_iwrite32 = pintfhdl->io_ops._sd_iwrite32;
+
+	if (_sd_iwrite32)
+		ret = _sd_iwrite32(pintfhdl, addr, val);
+	else
+		RTW_ERR(FUNC_ADPT_FMT" _sd_iwrite32 callback is NULL\n", FUNC_ADPT_ARG(adapter));
+
+	return RTW_STATUS_CODE(ret);
+}
+
+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
+
+#endif /* CONFIG_SDIO_HCI */
+
+int _rtw_write8_async(_adapter *adapter, u32 addr, u8 val)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write8_async)(struct intf_hdl *pintfhdl, u32 addr, u8 val);
+	int ret;
+	_func_enter_;
+	_write8_async = pintfhdl->io_ops._write8_async;
+
+	ret = _write8_async(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write16_async(_adapter *adapter, u32 addr, u16 val)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write16_async)(struct intf_hdl *pintfhdl, u32 addr, u16 val);
+	int ret;
+	_func_enter_;
+	_write16_async = pintfhdl->io_ops._write16_async;
+	val = rtw_cpu_to_le16(val);
+	ret = _write16_async(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+int _rtw_write32_async(_adapter *adapter, u32 addr, u32 val)
+{
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	int (*_write32_async)(struct intf_hdl *pintfhdl, u32 addr, u32 val);
+	int ret;
+	_func_enter_;
+	_write32_async = pintfhdl->io_ops._write32_async;
+	val = rtw_cpu_to_le32(val);
+	ret = _write32_async(pintfhdl, addr, val);
+	_func_exit_;
+
+	return RTW_STATUS_CODE(ret);
+}
+
+void _rtw_read_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{
+	void (*_read_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+
+	_func_enter_;
+
+	if (RTW_CANNOT_RUN(adapter)) {
+		RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_mem:bDriverStopped(%s) OR bSurpriseRemoved(%s)"
+				, rtw_is_drv_stopped(adapter) ? "True" : "False"
+			, rtw_is_surprise_removed(adapter) ? "True" : "False"));
+		return;
+	}
+
+	_read_mem = pintfhdl->io_ops._read_mem;
+
+	_read_mem(pintfhdl, addr, cnt, pmem);
+
+	_func_exit_;
+
+}
+
+void _rtw_write_mem(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{
+	void (*_write_mem)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+
+	_func_enter_;
+
+	_write_mem = pintfhdl->io_ops._write_mem;
+
+	_write_mem(pintfhdl, addr, cnt, pmem);
+
+	_func_exit_;
+
+}
+
+void _rtw_read_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{
+	u32(*_read_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+
+	_func_enter_;
+
+	if (RTW_CANNOT_RUN(adapter)) {
+		RT_TRACE(_module_rtl871x_io_c_, _drv_info_, ("rtw_read_port:bDriverStopped(%s) OR bSurpriseRemoved(%s)"
+				, rtw_is_drv_stopped(adapter) ? "True" : "False"
+			, rtw_is_surprise_removed(adapter) ? "True" : "False"));
+		return;
+	}
+
+	_read_port = pintfhdl->io_ops._read_port;
+
+	_read_port(pintfhdl, addr, cnt, pmem);
+
+	_func_exit_;
+
+}
+
+void _rtw_read_port_cancel(_adapter *adapter)
+{
+	void (*_read_port_cancel)(struct intf_hdl *pintfhdl);
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+
+	_read_port_cancel = pintfhdl->io_ops._read_port_cancel;
+
+	RTW_DISABLE_FUNC(adapter, DF_RX_BIT);
+
+	if (_read_port_cancel)
+		_read_port_cancel(pintfhdl);
+}
+
+u32 _rtw_write_port(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem)
+{
+	u32(*_write_port)(struct intf_hdl *pintfhdl, u32 addr, u32 cnt, u8 *pmem);
+	/* struct	io_queue  	*pio_queue = (struct io_queue *)adapter->pio_queue; */
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct	intf_hdl		*pintfhdl = &(pio_priv->intf);
+	u32 ret = _SUCCESS;
+
+	_func_enter_;
+
+	_write_port = pintfhdl->io_ops._write_port;
+
+	ret = _write_port(pintfhdl, addr, cnt, pmem);
+
+	_func_exit_;
+
+	return ret;
+}
+
+u32 _rtw_write_port_and_wait(_adapter *adapter, u32 addr, u32 cnt, u8 *pmem, int timeout_ms)
+{
+	int ret = _SUCCESS;
+	struct xmit_buf *pxmitbuf = (struct xmit_buf *)pmem;
+	struct submit_ctx sctx;
+
+	rtw_sctx_init(&sctx, timeout_ms);
+	pxmitbuf->sctx = &sctx;
+
+	ret = _rtw_write_port(adapter, addr, cnt, pmem);
+
+	if (ret == _SUCCESS)
+		ret = rtw_sctx_wait(&sctx, __func__);
+
+	return ret;
+}
+
+void _rtw_write_port_cancel(_adapter *adapter)
+{
+	void (*_write_port_cancel)(struct intf_hdl *pintfhdl);
+	struct io_priv *pio_priv = &adapter->iopriv;
+	struct intf_hdl *pintfhdl = &(pio_priv->intf);
+
+	_write_port_cancel = pintfhdl->io_ops._write_port_cancel;
+
+	RTW_DISABLE_FUNC(adapter, DF_TX_BIT);
+
+	if (_write_port_cancel)
+		_write_port_cancel(pintfhdl);
+}
+int rtw_init_io_priv(_adapter *padapter, void (*set_intf_ops)(_adapter *padapter, struct _io_ops *pops))
+{
+	struct io_priv	*piopriv = &padapter->iopriv;
+	struct intf_hdl *pintf = &piopriv->intf;
+
+	if (set_intf_ops == NULL)
+		return _FAIL;
+
+	piopriv->padapter = padapter;
+	pintf->padapter = padapter;
+	pintf->pintf_dev = adapter_to_dvobj(padapter);
+
+	set_intf_ops(padapter, &pintf->io_ops);
+
+	return _SUCCESS;
+}
+
+/*
+* Increase and check if the continual_io_error of this @param dvobjprive is larger than MAX_CONTINUAL_IO_ERR
+* @return _TRUE:
+* @return _FALSE:
+*/
+int rtw_inc_and_chk_continual_io_error(struct dvobj_priv *dvobj)
+{
+	int ret = _FALSE;
+	int value;
+
+	value = ATOMIC_INC_RETURN(&dvobj->continual_io_error);
+	if (value > MAX_CONTINUAL_IO_ERR) {
+		RTW_INFO("[dvobj:%p][ERROR] continual_io_error:%d > %d\n", dvobj, value, MAX_CONTINUAL_IO_ERR);
+		ret = _TRUE;
+	} else {
+		/* RTW_INFO("[dvobj:%p] continual_io_error:%d\n", dvobj, value); */
+	}
+	return ret;
+}
+
+/*
+* Set the continual_io_error of this @param dvobjprive to 0
+*/
+void rtw_reset_continual_io_error(struct dvobj_priv *dvobj)
+{
+	ATOMIC_SET(&dvobj->continual_io_error, 0);
+}
+
+#ifdef DBG_IO
+
+u32 read_sniff_ranges[][2] = {
+	/* {0x520, 0x523}, */
+};
+
+u32 write_sniff_ranges[][2] = {
+	/* {0x520, 0x523}, */
+	/* {0x4c, 0x4c}, */
+};
+
+int read_sniff_num = sizeof(read_sniff_ranges) / sizeof(u32) / 2;
+int write_sniff_num = sizeof(write_sniff_ranges) / sizeof(u32) / 2;
+
+bool match_read_sniff_ranges(u32 addr, u16 len)
+{
+	int i;
+	for (i = 0; i < read_sniff_num; i++) {
+		if (addr + len > read_sniff_ranges[i][0] && addr <= read_sniff_ranges[i][1])
+			return _TRUE;
+	}
+
+	return _FALSE;
+}
+
+bool match_write_sniff_ranges(u32 addr, u16 len)
+{
+	int i;
+	for (i = 0; i < write_sniff_num; i++) {
+		if (addr + len > write_sniff_ranges[i][0] && addr <= write_sniff_ranges[i][1])
+			return _TRUE;
+	}
+
+	return _FALSE;
+}
+
+struct rf_sniff_ent {
+	u8 path;
+	u16 reg;
+	u32 mask;
+};
+
+struct rf_sniff_ent rf_read_sniff_ranges[] = {
+	/* example for all path addr 0x55 with all RF Reg mask */
+	/* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
+};
+
+struct rf_sniff_ent rf_write_sniff_ranges[] = {
+	/* example for all path addr 0x55 with all RF Reg mask */
+	/* {MAX_RF_PATH, 0x55, bRFRegOffsetMask}, */
+};
+
+int rf_read_sniff_num = sizeof(rf_read_sniff_ranges) / sizeof(struct rf_sniff_ent);
+int rf_write_sniff_num = sizeof(rf_write_sniff_ranges) / sizeof(struct rf_sniff_ent);
+
+bool match_rf_read_sniff_ranges(u8 path, u32 addr, u32 mask)
+{
+	int i;
+
+	for (i = 0; i < rf_read_sniff_num; i++) {
+		if (rf_read_sniff_ranges[i].path == MAX_RF_PATH || rf_read_sniff_ranges[i].path == path)
+			if (addr == rf_read_sniff_ranges[i].reg && (mask & rf_read_sniff_ranges[i].mask))
+				return _TRUE;
+	}
+
+	return _FALSE;
+}
+
+bool match_rf_write_sniff_ranges(u8 path, u32 addr, u32 mask)
+{
+	int i;
+
+	for (i = 0; i < rf_write_sniff_num; i++) {
+		if (rf_write_sniff_ranges[i].path == MAX_RF_PATH || rf_write_sniff_ranges[i].path == path)
+			if (addr == rf_write_sniff_ranges[i].reg && (mask & rf_write_sniff_ranges[i].mask))
+				return _TRUE;
+	}
+
+	return _FALSE;
+}
+
+u8 dbg_rtw_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u8 val = _rtw_read8(adapter, addr);
+
+	if (match_read_sniff_ranges(addr, 1))
+		RTW_INFO("DBG_IO %s:%d rtw_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
+
+	return val;
+}
+
+u16 dbg_rtw_read16(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u16 val = _rtw_read16(adapter, addr);
+
+	if (match_read_sniff_ranges(addr, 2))
+		RTW_INFO("DBG_IO %s:%d rtw_read16(0x%04x) return 0x%04x\n", caller, line, addr, val);
+
+	return val;
+}
+
+u32 dbg_rtw_read32(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u32 val = _rtw_read32(adapter, addr);
+
+	if (match_read_sniff_ranges(addr, 4))
+		RTW_INFO("DBG_IO %s:%d rtw_read32(0x%04x) return 0x%08x\n", caller, line, addr, val);
+
+	return val;
+}
+
+int dbg_rtw_write8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 1))
+		RTW_INFO("DBG_IO %s:%d rtw_write8(0x%04x, 0x%02x)\n", caller, line, addr, val);
+
+	return _rtw_write8(adapter, addr, val);
+}
+int dbg_rtw_write16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 2))
+		RTW_INFO("DBG_IO %s:%d rtw_write16(0x%04x, 0x%04x)\n", caller, line, addr, val);
+
+	return _rtw_write16(adapter, addr, val);
+}
+int dbg_rtw_write32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 4))
+		RTW_INFO("DBG_IO %s:%d rtw_write32(0x%04x, 0x%08x)\n", caller, line, addr, val);
+
+	return _rtw_write32(adapter, addr, val);
+}
+int dbg_rtw_writeN(_adapter *adapter, u32 addr , u32 length , u8 *data, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, length))
+		RTW_INFO("DBG_IO %s:%d rtw_writeN(0x%04x, %u)\n", caller, line, addr, length);
+
+	return _rtw_writeN(adapter, addr, length, data);
+}
+
+#ifdef CONFIG_SDIO_HCI
+u8 dbg_rtw_sd_f0_read8(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u8 val = _rtw_sd_f0_read8(adapter, addr);
+
+#if 0
+	if (match_read_sniff_ranges(addr, 1))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_f0_read8(0x%04x) return 0x%02x\n", caller, line, addr, val);
+#endif
+
+	return val;
+}
+
+#ifdef CONFIG_SDIO_INDIRECT_ACCESS
+u8 dbg_rtw_sd_iread8(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u8 val = rtw_sd_iread8(adapter, addr);
+
+	if (match_read_sniff_ranges(addr, 1))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iread8(0x%04x) return 0x%02x\n", caller, line, addr, val);
+
+	return val;
+}
+
+u16 dbg_rtw_sd_iread16(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u16 val = _rtw_sd_iread16(adapter, addr);
+
+	if (match_read_sniff_ranges(addr, 2))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iread16(0x%04x) return 0x%04x\n", caller, line, addr, val);
+
+	return val;
+}
+
+u32 dbg_rtw_sd_iread32(_adapter *adapter, u32 addr, const char *caller, const int line)
+{
+	u32 val = _rtw_sd_iread32(adapter, addr);
+
+	if (match_read_sniff_ranges(addr, 4))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iread32(0x%04x) return 0x%08x\n", caller, line, addr, val);
+
+	return val;
+}
+
+int dbg_rtw_sd_iwrite8(_adapter *adapter, u32 addr, u8 val, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 1))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite8(0x%04x, 0x%02x)\n", caller, line, addr, val);
+
+	return _rtw_sd_iwrite8(adapter, addr, val);
+}
+int dbg_rtw_sd_iwrite16(_adapter *adapter, u32 addr, u16 val, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 2))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite16(0x%04x, 0x%04x)\n", caller, line, addr, val);
+
+	return _rtw_sd_iwrite16(adapter, addr, val);
+}
+int dbg_rtw_sd_iwrite32(_adapter *adapter, u32 addr, u32 val, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 4))
+		RTW_INFO("DBG_IO %s:%d rtw_sd_iwrite32(0x%04x, 0x%08x)\n", caller, line, addr, val);
+
+	return _rtw_sd_iwrite32(adapter, addr, val);
+}
+
+#endif /* CONFIG_SDIO_INDIRECT_ACCESS */
+
+#endif /* CONFIG_SDIO_HCI */
+
+#endif

core/rtw_ioctl_query.c

@@ -0,0 +1,183 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_IOCTL_QUERY_C_
+
+#include <drv_types.h>
+
+
+#ifdef PLATFORM_WINDOWS
+/*
+ * Added for WPA2-PSK, by Annie, 2005-09-20.
+ *   */
+u8
+query_802_11_capability(
+	_adapter		*Adapter,
+	u8			*pucBuf,
+	u32		*pulOutLen
+)
+{
+	static NDIS_802_11_AUTHENTICATION_ENCRYPTION szAuthEnc[] = {
+		{Ndis802_11AuthModeOpen, Ndis802_11EncryptionDisabled},
+		{Ndis802_11AuthModeOpen, Ndis802_11Encryption1Enabled},
+		{Ndis802_11AuthModeShared, Ndis802_11EncryptionDisabled},
+		{Ndis802_11AuthModeShared, Ndis802_11Encryption1Enabled},
+		{Ndis802_11AuthModeWPA, Ndis802_11Encryption2Enabled},
+		{Ndis802_11AuthModeWPA, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption2Enabled},
+		{Ndis802_11AuthModeWPAPSK, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPANone, Ndis802_11Encryption2Enabled},
+		{Ndis802_11AuthModeWPANone, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPA2, Ndis802_11Encryption2Enabled},
+		{Ndis802_11AuthModeWPA2, Ndis802_11Encryption3Enabled},
+		{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption2Enabled},
+		{Ndis802_11AuthModeWPA2PSK, Ndis802_11Encryption3Enabled}
+	};
+	static ULONG	ulNumOfPairSupported = sizeof(szAuthEnc) / sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
+	NDIS_802_11_CAPABILITY *pCap = (NDIS_802_11_CAPABILITY *)pucBuf;
+	u8	*pucAuthEncryptionSupported = (u8 *) pCap->AuthenticationEncryptionSupported;
+
+
+	pCap->Length = sizeof(NDIS_802_11_CAPABILITY);
+	if (ulNumOfPairSupported > 1)
+		pCap->Length +=	(ulNumOfPairSupported - 1) * sizeof(NDIS_802_11_AUTHENTICATION_ENCRYPTION);
+
+	pCap->Version = 2;
+	pCap->NoOfPMKIDs = NUM_PMKID_CACHE;
+	pCap->NoOfAuthEncryptPairsSupported = ulNumOfPairSupported;
+
+	if (sizeof(szAuthEnc) <= 240)		/* 240 = 256 - 4*4	 */ { /* SecurityInfo.szCapability: only 256 bytes in size. */
+		_rtw_memcpy(pucAuthEncryptionSupported, (u8 *)szAuthEnc,  sizeof(szAuthEnc));
+		*pulOutLen = pCap->Length;
+		return _TRUE;
+	} else {
+		*pulOutLen = 0;
+		RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("_query_802_11_capability(): szAuthEnc size is too large.\n"));
+		return _FALSE;
+	}
+}
+
+u8 query_802_11_association_information(_adapter *padapter, PNDIS_802_11_ASSOCIATION_INFORMATION	pAssocInfo)
+{
+	struct wlan_network *tgt_network;
+	struct	mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct	security_priv  *psecuritypriv = &(padapter->securitypriv);
+	WLAN_BSSID_EX	*psecnetwork = (WLAN_BSSID_EX *)&pmlmepriv->cur_network.network;
+	u8	*pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
+	unsigned char i, *auth_ie, *supp_ie;
+
+	/* NdisZeroMemory(pAssocInfo, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION)); */
+	_rtw_memset(pAssocInfo, 0, sizeof(NDIS_802_11_ASSOCIATION_INFORMATION));
+	/* pAssocInfo->Length = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION); */
+
+	/* ------------------------------------------------------ */
+	/* Association Request related information */
+	/* ------------------------------------------------------ */
+	/* Req_1. AvailableRequestFixedIEs */
+	if (psecnetwork != NULL) {
+
+		pAssocInfo->AvailableRequestFixedIEs |= NDIS_802_11_AI_REQFI_CAPABILITIES | NDIS_802_11_AI_REQFI_CURRENTAPADDRESS;
+		pAssocInfo->RequestFixedIEs.Capabilities = (unsigned short) *&psecnetwork->IEs[10];
+		_rtw_memcpy(pAssocInfo->RequestFixedIEs.CurrentAPAddress,
+			    &psecnetwork->MacAddress, 6);
+
+		pAssocInfo->OffsetRequestIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION);
+
+		if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING | _FW_LINKED) == _TRUE) {
+
+			if (psecuritypriv->ndisauthtype >= Ndis802_11AuthModeWPA2)
+				pDest[0] = 48;		/* RSN Information Element */
+			else
+				pDest[0] = 221;	/* WPA(SSN) Information Element */
+
+			RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("\n Adapter->ndisauthtype==Ndis802_11AuthModeWPA)?0xdd:0x30 [%d]", pDest[0]));
+			supp_ie = &psecuritypriv->supplicant_ie[0];
+			for (i = 0; i < supp_ie[0]; i++)
+				RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("IEs [%d] = 0x%x \n\n", i, supp_ie[i]));
+
+			i = 13;	/* 0~11 is fixed information element		 */
+			RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("i= %d tgt_network->network.IELength=%d\n\n", i, (int)psecnetwork->IELength));
+			while ((i < supp_ie[0]) && (i < 256)) {
+				if ((unsigned char)supp_ie[i] == pDest[0]) {
+					_rtw_memcpy((u8 *)(pDest),
+						    &supp_ie[i],
+						    supp_ie[1 + i] + 2);
+
+					break;
+				}
+
+				i = i + supp_ie[i + 1] + 2;
+				if (supp_ie[1 + i] == 0)
+					i = i + 1;
+				RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("iteration i=%d IEs [%d] = 0x%x \n\n", i, i, supp_ie[i + 1]));
+
+			}
+
+
+			pAssocInfo->RequestIELength += (2 + supp_ie[1 + i]); /* (2 + psecnetwork->IEs[1+i]+4); */
+
+		}
+
+
+		RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("\n psecnetwork != NULL,fwstate==_FW_UNDER_LINKING\n"));
+
+	}
+
+
+	/* ------------------------------------------------------ */
+	/* Association Response related information */
+	/* ------------------------------------------------------ */
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) {
+		tgt_network = &(pmlmepriv->cur_network);
+		if (tgt_network != NULL) {
+			pAssocInfo->AvailableResponseFixedIEs =
+				NDIS_802_11_AI_RESFI_CAPABILITIES
+				| NDIS_802_11_AI_RESFI_ASSOCIATIONID
+				;
+
+			pAssocInfo->ResponseFixedIEs.Capabilities = (unsigned short) *&tgt_network->network.IEs[10];
+			pAssocInfo->ResponseFixedIEs.StatusCode = 0;
+			pAssocInfo->ResponseFixedIEs.AssociationId = (unsigned short) tgt_network->aid;
+
+			pDest = (u8 *)pAssocInfo + sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength;
+			auth_ie = &psecuritypriv->authenticator_ie[0];
+
+			for (i = 0; i < auth_ie[0]; i++)
+				RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("IEs [%d] = 0x%x \n\n", i, auth_ie[i]));
+
+			i = auth_ie[0] - 12;
+			if (i > 0) {
+				_rtw_memcpy((u8 *)&pDest[0], &auth_ie[1], i);
+				pAssocInfo->ResponseIELength = i;
+			}
+
+
+			pAssocInfo->OffsetResponseIEs = sizeof(NDIS_802_11_ASSOCIATION_INFORMATION) + pAssocInfo->RequestIELength;
+
+
+			RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("\n tgt_network != NULL,fwstate==_FW_LINKED\n"));
+		}
+	}
+	RT_TRACE(_module_rtl871x_ioctl_query_c_, _drv_info_, ("\n exit query_802_11_association_information\n"));
+	_func_exit_;
+
+	return _TRUE;
+}
+#endif

core/rtw_ioctl_rtl.c

@@ -0,0 +1,916 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define  _RTW_IOCTL_RTL_C_
+
+#include <drv_types.h>
+
+#ifdef CONFIG_MP_INCLUDED
+	#include <rtw_mp_ioctl.h>
+#endif
+
+struct oid_obj_priv oid_rtl_seg_01_01[] = {
+	{1, &oid_null_function},										/* 0x80 */
+	{1, &oid_null_function},										/* 0x81 */
+	{1, &oid_null_function},										/* 0x82 */
+	{1, &oid_null_function},										/* 0x83 */ /* OID_RT_SET_SNIFFER_MODE */
+	{1, &oid_rt_get_signal_quality_hdl},							/* 0x84 */
+	{1, &oid_rt_get_small_packet_crc_hdl},						/* 0x85 */
+	{1, &oid_rt_get_middle_packet_crc_hdl},						/* 0x86 */
+	{1, &oid_rt_get_large_packet_crc_hdl},						/* 0x87 */
+	{1, &oid_rt_get_tx_retry_hdl},								/* 0x88 */
+	{1, &oid_rt_get_rx_retry_hdl},								/* 0x89 */
+	{1, &oid_rt_pro_set_fw_dig_state_hdl},						/* 0x8A */
+	{1, &oid_rt_pro_set_fw_ra_state_hdl}	,						/* 0x8B */
+	{1, &oid_null_function},										/* 0x8C */
+	{1, &oid_null_function},										/* 0x8D */
+	{1, &oid_null_function},										/* 0x8E */
+	{1, &oid_null_function},										/* 0x8F */
+	{1, &oid_rt_get_rx_total_packet_hdl},							/* 0x90 */
+	{1, &oid_rt_get_tx_beacon_ok_hdl},							/* 0x91 */
+	{1, &oid_rt_get_tx_beacon_err_hdl},							/* 0x92 */
+	{1, &oid_rt_get_rx_icv_err_hdl},								/* 0x93 */
+	{1, &oid_rt_set_encryption_algorithm_hdl},					/* 0x94 */
+	{1, &oid_null_function},										/* 0x95 */
+	{1, &oid_rt_get_preamble_mode_hdl},							/* 0x96 */
+	{1, &oid_null_function},										/* 0x97 */
+	{1, &oid_rt_get_ap_ip_hdl},									/* 0x98 */
+	{1, &oid_rt_get_channelplan_hdl},							/* 0x99	 */
+	{1, &oid_rt_set_preamble_mode_hdl},	 						/* 0x9A */
+	{1, &oid_rt_set_bcn_intvl_hdl},								/* 0x9B */
+	{1, &oid_null_function},										/* 0x9C */
+	{1, &oid_rt_dedicate_probe_hdl},								/* 0x9D */
+	{1, &oid_null_function},										/* 0x9E */
+	{1, &oid_null_function},										/* 0x9F */
+	{1, &oid_null_function},										/* 0xA0 */
+	{1, &oid_null_function},										/* 0xA1 */
+	{1, &oid_null_function},										/* 0xA2 */
+	{1, &oid_null_function},										/* 0xA3 */
+	{1, &oid_null_function},										/* 0xA4 */
+	{1, &oid_null_function},										/* 0xA5 */
+	{1, &oid_null_function},										/* 0xA6 */
+	{1, &oid_rt_get_total_tx_bytes_hdl},							/* 0xA7 */
+	{1, &oid_rt_get_total_rx_bytes_hdl},							/* 0xA8 */
+	{1, &oid_rt_current_tx_power_level_hdl},						/* 0xA9	 */
+	{1, &oid_rt_get_enc_key_mismatch_count_hdl},	 			/* 0xAA */
+	{1, &oid_rt_get_enc_key_match_count_hdl},					/* 0xAB */
+	{1, &oid_rt_get_channel_hdl},								/* 0xAC */
+	{1, &oid_rt_set_channelplan_hdl},								/* 0xAD */
+	{1, &oid_rt_get_hardware_radio_off_hdl},						/* 0xAE */
+	{1, &oid_null_function},										/* 0xAF */
+	{1, &oid_null_function},										/* 0xB0 */
+	{1, &oid_null_function},										/* 0xB1 */
+	{1, &oid_null_function},										/* 0xB2 */
+	{1, &oid_null_function},										/* 0xB3 */
+	{1, &oid_rt_get_key_mismatch_hdl},							/* 0xB4 */
+	{1, &oid_null_function},										/* 0xB5 */
+	{1, &oid_null_function},										/* 0xB6 */
+	{1, &oid_null_function},										/* 0xB7 */
+	{1, &oid_null_function},										/* 0xB8 */
+	{1, &oid_null_function},										/* 0xB9	 */
+	{1, &oid_null_function},	 									/* 0xBA */
+	{1, &oid_rt_supported_wireless_mode_hdl},					/* 0xBB */
+	{1, &oid_rt_get_channel_list_hdl},							/* 0xBC */
+	{1, &oid_rt_get_scan_in_progress_hdl},						/* 0xBD */
+	{1, &oid_null_function},										/* 0xBE */
+	{1, &oid_null_function},										/* 0xBF */
+	{1, &oid_null_function},										/* 0xC0 */
+	{1, &oid_rt_forced_data_rate_hdl},							/* 0xC1 */
+	{1, &oid_rt_wireless_mode_for_scan_list_hdl},					/* 0xC2 */
+	{1, &oid_rt_get_bss_wireless_mode_hdl},						/* 0xC3 */
+	{1, &oid_rt_scan_with_magic_packet_hdl},					/* 0xC4 */
+	{1, &oid_null_function},										/* 0xC5 */
+	{1, &oid_null_function},										/* 0xC6 */
+	{1, &oid_null_function},										/* 0xC7 */
+	{1, &oid_null_function},										/* 0xC8 */
+	{1, &oid_null_function},										/* 0xC9	 */
+	{1, &oid_null_function},	 									/* 0xCA */
+	{1, &oid_null_function},										/* 0xCB */
+	{1, &oid_null_function},										/* 0xCC */
+	{1, &oid_null_function},										/* 0xCD */
+	{1, &oid_null_function},										/* 0xCE */
+	{1, &oid_null_function},										/* 0xCF */
+
+};
+
+struct oid_obj_priv oid_rtl_seg_01_03[] = {
+	{1, &oid_rt_ap_get_associated_station_list_hdl},				/* 0x00 */
+	{1, &oid_null_function},										/* 0x01 */
+	{1, &oid_rt_ap_switch_into_ap_mode_hdl},					/* 0x02 */
+	{1, &oid_null_function},										/* 0x03 */
+	{1, &oid_rt_ap_supported_hdl},								/* 0x04 */
+	{1, &oid_rt_ap_set_passphrase_hdl},							/* 0x05 */
+
+};
+
+struct oid_obj_priv oid_rtl_seg_01_11[] = {
+	{1, &oid_null_function},					/* 0xC0	OID_RT_PRO_RX_FILTER	 */
+	{1, &oid_null_function},					/* 0xC1	OID_CE_USB_WRITE_REGISTRY */
+	{1, &oid_null_function},					/* 0xC2	OID_CE_USB_READ_REGISTRY */
+	{1, &oid_null_function},					/* 0xC3	OID_RT_PRO_SET_INITIAL_GAIN */
+	{1, &oid_null_function},					/* 0xC4	OID_RT_PRO_SET_BB_RF_STANDBY_MODE */
+	{1, &oid_null_function},					/* 0xC5	OID_RT_PRO_SET_BB_RF_SHUTDOWN_MODE */
+	{1, &oid_null_function},					/* 0xC6	OID_RT_PRO_SET_TX_CHARGE_PUMP */
+	{1, &oid_null_function},					/* 0xC7	OID_RT_PRO_SET_RX_CHARGE_PUMP */
+	{1, &oid_rt_pro_rf_write_registry_hdl},	/* 0xC8	 */
+	{1, &oid_rt_pro_rf_read_registry_hdl},	/* 0xC9	 */
+	{1, &oid_null_function}					/* 0xCA	OID_RT_PRO_QUERY_RF_TYPE */
+
+};
+
+struct oid_obj_priv oid_rtl_seg_03_00[] = {
+	{1, &oid_null_function},										/* 0x00 */
+	{1, &oid_rt_get_connect_state_hdl},							/* 0x01 */
+	{1, &oid_null_function},										/* 0x02 */
+	{1, &oid_null_function},										/* 0x03 */
+	{1, &oid_rt_set_default_key_id_hdl},							/* 0x04 */
+
+
+};
+
+
+/* **************  oid_rtl_seg_01_01 section start ************** */
+
+NDIS_STATUS oid_rt_pro_set_fw_dig_state_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL			oldirql;
+
+	_func_enter_;
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	if (poid_par_priv->information_buf_len >= sizeof(struct setdig_parm)) {
+		/* DEBUG_ERR(("===> oid_rt_pro_set_fw_dig_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf )));	 */
+		if (!rtw_setfwdig_cmd(Adapter, *((unsigned char *)poid_par_priv->information_buf)))
+			status = NDIS_STATUS_NOT_ACCEPTED;
+
+	} else
+		status = NDIS_STATUS_NOT_ACCEPTED;
+	_irqlevel_changed_(&oldirql, RAISE);
+	_func_exit_;
+#endif
+	return status;
+}
+/* ----------------------------------------------------------------------------- */
+NDIS_STATUS oid_rt_pro_set_fw_ra_state_hdl(struct oid_par_priv *poid_par_priv)
+{
+
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL			oldirql;
+
+	_func_enter_;
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+
+	_irqlevel_changed_(&oldirql, LOWER);
+
+	if (poid_par_priv->information_buf_len >= sizeof(struct setra_parm)) {
+		/* DEBUG_ERR(("===> oid_rt_pro_set_fw_ra_state_hdl. type:0x%02x.\n",*((unsigned char*)poid_par_priv->information_buf )));	 */
+		if (!rtw_setfwra_cmd(Adapter, *((unsigned char *)poid_par_priv->information_buf)))
+			status = NDIS_STATUS_NOT_ACCEPTED;
+
+	} else
+		status = NDIS_STATUS_NOT_ACCEPTED;
+	_irqlevel_changed_(&oldirql, RAISE);
+	_func_exit_;
+#endif
+	return status;
+}
+/* ----------------------------------------------------------------------------- */
+NDIS_STATUS oid_rt_get_signal_quality_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	/* DEBUG_ERR(("<**********************oid_rt_get_signal_quality_hdl\n")); */
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+#if 0
+	if (pMgntInfo->mAssoc || pMgntInfo->mIbss) {
+		ulInfo = pAdapter->RxStats.SignalQuality;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else {
+		ulInfo = 0xffffffff; /* It stands for -1 in 4-byte integer. */
+	}
+	break;
+#endif
+
+	return status;
+}
+
+/* ------------------------------------------------------------------------------ */
+
+NDIS_STATUS oid_rt_get_small_packet_crc_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if (poid_par_priv->information_buf_len >=  sizeof(ULONG)) {
+		*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_smallpacket_crcerr;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_middle_packet_crc_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if (poid_par_priv->information_buf_len >=  sizeof(ULONG)) {
+		*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_middlepacket_crcerr;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_large_packet_crc_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if (poid_par_priv->information_buf_len >=  sizeof(ULONG)) {
+		*(ULONG *)poid_par_priv->information_buf = padapter->recvpriv.rx_largepacket_crcerr;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+
+
+	return status;
+}
+
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_tx_retry_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_rx_retry_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_rx_total_packet_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len >=  sizeof(ULONG)) {
+		*(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_pkts + padapter->recvpriv.rx_drop;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_tx_beacon_ok_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_tx_beacon_err_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_rx_icv_err_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len >= sizeof(u32)) {
+		/* _rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); */
+		*(uint *)poid_par_priv->information_buf = padapter->recvpriv.rx_icv_err;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH ;
+
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_set_encryption_algorithm_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_preamble_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	ULONG			preamblemode = 0 ;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
+		if (padapter->registrypriv.preamble == PREAMBLE_LONG)
+			preamblemode = 0;
+		else if (padapter->registrypriv.preamble == PREAMBLE_AUTO)
+			preamblemode = 1;
+		else if (padapter->registrypriv.preamble == PREAMBLE_SHORT)
+			preamblemode = 2;
+
+
+		*(ULONG *)poid_par_priv->information_buf = preamblemode ;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_ap_ip_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_get_channelplan_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	*(u16 *)poid_par_priv->information_buf = padapter->mlmepriv.ChannelPlan ;
+
+	return status;
+}
+NDIS_STATUS oid_rt_set_channelplan_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	padapter->mlmepriv.ChannelPlan  = *(u16 *)poid_par_priv->information_buf ;
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_set_preamble_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	ULONG			preamblemode = 0;
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
+		preamblemode = *(ULONG *)poid_par_priv->information_buf ;
+		if (preamblemode == 0)
+			padapter->registrypriv.preamble = PREAMBLE_LONG;
+		else if (preamblemode == 1)
+			padapter->registrypriv.preamble = PREAMBLE_AUTO;
+		else if (preamblemode == 2)
+			padapter->registrypriv.preamble = PREAMBLE_SHORT;
+
+		*(ULONG *)poid_par_priv->information_buf = preamblemode ;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH ;
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_set_bcn_intvl_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_dedicate_probe_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_total_tx_bytes_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
+		*(u64 *)poid_par_priv->information_buf = padapter->xmitpriv.tx_bytes;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH ;
+
+
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_get_total_rx_bytes_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
+		/* _rtw_memcpy(*(uint *)poid_par_priv->information_buf,padapter->recvpriv.rx_icv_err,sizeof(u32)); */
+		*(u64 *)poid_par_priv->information_buf = padapter->recvpriv.rx_bytes;
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH ;
+	return status;
+}
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_current_tx_power_level_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_enc_key_mismatch_count_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_enc_key_match_count_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_channel_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	struct	mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	NDIS_802_11_CONFIGURATION		*pnic_Config;
+
+	ULONG   channelnum;
+
+	_func_enter_;
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	if ((check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE) ||
+	    (check_fwstate(pmlmepriv, WIFI_ADHOC_MASTER_STATE) == _TRUE))
+		pnic_Config = &pmlmepriv->cur_network.network.Configuration;
+	else
+		pnic_Config = &padapter->registrypriv.dev_network.Configuration;
+
+	channelnum = pnic_Config->DSConfig;
+	*(ULONG *)poid_par_priv->information_buf = channelnum;
+
+	*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+
+	_func_exit_;
+
+
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_hardware_radio_off_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_key_mismatch_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_supported_wireless_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+	ULONG			ulInfo = 0 ;
+	/* DEBUG_ERR(("<**********************oid_rt_supported_wireless_mode_hdl\n"));	 */
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+	if (poid_par_priv->information_buf_len >= sizeof(ULONG)) {
+		ulInfo |= 0x0100; /* WIRELESS_MODE_B */
+		ulInfo |= 0x0200; /* WIRELESS_MODE_G */
+		ulInfo |= 0x0400; /* WIRELESS_MODE_A */
+
+		*(ULONG *) poid_par_priv->information_buf = ulInfo;
+		/* DEBUG_ERR(("<===oid_rt_supported_wireless_mode %x\n",ulInfo));	 */
+		*poid_par_priv->bytes_rw = poid_par_priv->information_buf_len;
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_channel_list_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_scan_in_progress_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+
+
+NDIS_STATUS oid_rt_forced_data_rate_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_wireless_mode_for_scan_list_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_get_bss_wireless_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_scan_with_magic_packet_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+/* **************  oid_rtl_seg_01_01 section end ************** */
+
+/* **************  oid_rtl_seg_01_03 section start ************** */
+NDIS_STATUS oid_rt_ap_get_associated_station_list_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+NDIS_STATUS oid_rt_ap_switch_into_ap_mode_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_ap_supported_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	return status;
+}
+NDIS_STATUS oid_rt_ap_set_passphrase_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+
+/* **************  oid_rtl_seg_01_03 section end ************** */
+
+/* ****************  oid_rtl_seg_01_11   section start **************** */
+NDIS_STATUS oid_rt_pro_rf_write_registry_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL			oldirql;
+	_func_enter_;
+	/* DEBUG_ERR(("<**********************oid_rt_pro_rf_write_registry_hdl\n")); */
+	if (poid_par_priv->type_of_oid != SET_OID) { /* QUERY_OID */
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	if (poid_par_priv->information_buf_len == (sizeof(unsigned long) * 3)) {
+		/* RegOffsetValue	- The offset of RF register to write. */
+		/* RegDataWidth	- The data width of RF register to write. */
+		/* RegDataValue	- The value to write. */
+		/* RegOffsetValue = *((unsigned long*)InformationBuffer); */
+		/* RegDataWidth = *((unsigned long*)InformationBuffer+1);	   */
+		/* RegDataValue =  *((unsigned long*)InformationBuffer+2);	 */
+		if (!rtw_setrfreg_cmd(Adapter,
+			      *(unsigned char *)poid_par_priv->information_buf,
+			(unsigned long)(*((unsigned long *)poid_par_priv->information_buf + 2))))
+			status = NDIS_STATUS_NOT_ACCEPTED;
+
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+	_irqlevel_changed_(&oldirql, RAISE);
+	_func_exit_;
+
+	return status;
+}
+
+/* ------------------------------------------------------------------------------ */
+NDIS_STATUS oid_rt_pro_rf_read_registry_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+#if 0
+	PADAPTER		Adapter = (PADAPTER)(poid_par_priv->adapter_context);
+	_irqL	oldirql;
+	_func_enter_;
+
+	/* DEBUG_ERR(("<**********************oid_rt_pro_rf_read_registry_hdl\n")); */
+	if (poid_par_priv->type_of_oid != SET_OID) { /* QUERY_OID */
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	_irqlevel_changed_(&oldirql, LOWER);
+	if (poid_par_priv->information_buf_len == (sizeof(unsigned long) * 3)) {
+		if (Adapter->mppriv.act_in_progress == _TRUE)
+			status = NDIS_STATUS_NOT_ACCEPTED;
+		else {
+			/* init workparam */
+			Adapter->mppriv.act_in_progress = _TRUE;
+			Adapter->mppriv.workparam.bcompleted = _FALSE;
+			Adapter->mppriv.workparam.act_type = MPT_READ_RF;
+			Adapter->mppriv.workparam.io_offset = *(unsigned long *)poid_par_priv->information_buf;
+			Adapter->mppriv.workparam.io_value = 0xcccccccc;
+
+			/* RegOffsetValue	- The offset of RF register to read. */
+			/* RegDataWidth	- The data width of RF register to read. */
+			/* RegDataValue	- The value to read. */
+			/* RegOffsetValue = *((unsigned long*)InformationBuffer); */
+			/* RegDataWidth = *((unsigned long*)InformationBuffer+1);	   */
+			/* RegDataValue =  *((unsigned long*)InformationBuffer+2);	   	 	                   */
+			if (!rtw_getrfreg_cmd(Adapter,
+				*(unsigned char *)poid_par_priv->information_buf,
+				(unsigned char *)&Adapter->mppriv.workparam.io_value))
+				status = NDIS_STATUS_NOT_ACCEPTED;
+		}
+
+
+	} else
+		status = NDIS_STATUS_INVALID_LENGTH;
+	_irqlevel_changed_(&oldirql, RAISE);
+	_func_exit_;
+#endif
+	return status;
+}
+
+/* ****************  oid_rtl_seg_01_11   section end****************	 */
+
+
+/* **************  oid_rtl_seg_03_00 section start **************  */
+enum _CONNECT_STATE_ {
+	CHECKINGSTATUS,
+	ASSOCIATED,
+	ADHOCMODE,
+	NOTASSOCIATED
+};
+
+NDIS_STATUS oid_rt_get_connect_state_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+
+	ULONG ulInfo;
+
+	if (poid_par_priv->type_of_oid != QUERY_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	/* nStatus==0	CheckingStatus */
+	/* nStatus==1	Associated */
+	/* nStatus==2	AdHocMode */
+	/* nStatus==3	NotAssociated */
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING) == _TRUE)
+		ulInfo = CHECKINGSTATUS;
+	else if (check_fwstate(pmlmepriv, _FW_LINKED) == _TRUE)
+		ulInfo = ASSOCIATED;
+	else if (check_fwstate(pmlmepriv, WIFI_ADHOC_STATE) == _TRUE)
+		ulInfo = ADHOCMODE;
+	else
+		ulInfo = NOTASSOCIATED ;
+
+	*(ULONG *)poid_par_priv->information_buf = ulInfo;
+	*poid_par_priv->bytes_rw =  poid_par_priv->information_buf_len;
+
+#if 0
+	/* Rearrange the order to let the UI still shows connection when scan is in progress */
+	RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("===> Query OID_RT_GET_CONNECT_STATE.\n"));
+	if (pMgntInfo->mAssoc)
+		ulInfo = 1;
+	else if (pMgntInfo->mIbss)
+		ulInfo = 2;
+	else if (pMgntInfo->bScanInProgress)
+		ulInfo = 0;
+	else
+		ulInfo = 3;
+	ulInfoLen = sizeof(ULONG);
+	RT_TRACE(COMP_OID_QUERY, DBG_LOUD, ("<=== Query OID_RT_GET_CONNECT_STATE: %d\n", ulInfo));
+#endif
+
+	return status;
+}
+
+NDIS_STATUS oid_rt_set_default_key_id_hdl(struct oid_par_priv *poid_par_priv)
+{
+	NDIS_STATUS		status = NDIS_STATUS_SUCCESS;
+	PADAPTER		padapter = (PADAPTER)(poid_par_priv->adapter_context);
+
+	if (poid_par_priv->type_of_oid != SET_OID) {
+		status = NDIS_STATUS_NOT_ACCEPTED;
+		return status;
+	}
+
+	return status;
+}
+/* **************  oid_rtl_seg_03_00 section end **************  */

core/rtw_iol.c

@@ -0,0 +1,387 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include <drv_types.h>
+
+#ifdef CONFIG_IOL
+struct xmit_frame	*rtw_IOL_accquire_xmit_frame(ADAPTER *adapter)
+{
+	struct xmit_frame	*xmit_frame;
+	struct xmit_buf	*xmitbuf;
+	struct pkt_attrib	*pattrib;
+	struct xmit_priv	*pxmitpriv = &(adapter->xmitpriv);
+
+#if 1
+	xmit_frame = rtw_alloc_xmitframe(pxmitpriv);
+	if (xmit_frame == NULL) {
+		RTW_INFO("%s rtw_alloc_xmitframe return null\n", __FUNCTION__);
+		goto exit;
+	}
+
+	xmitbuf = rtw_alloc_xmitbuf(pxmitpriv);
+	if (xmitbuf == NULL) {
+		RTW_INFO("%s rtw_alloc_xmitbuf return null\n", __FUNCTION__);
+		rtw_free_xmitframe(pxmitpriv, xmit_frame);
+		xmit_frame = NULL;
+		goto exit;
+	}
+
+	xmit_frame->frame_tag = MGNT_FRAMETAG;
+	xmit_frame->pxmitbuf = xmitbuf;
+	xmit_frame->buf_addr = xmitbuf->pbuf;
+	xmitbuf->priv_data = xmit_frame;
+
+	pattrib = &xmit_frame->attrib;
+	update_mgntframe_attrib(adapter, pattrib);
+	pattrib->qsel = QSLT_BEACON;/* Beacon	 */
+	pattrib->subtype = WIFI_BEACON;
+	pattrib->pktlen = pattrib->last_txcmdsz = 0;
+
+#else
+	xmit_frame = alloc_mgtxmitframe(pxmitpriv);
+	if (xmit_frame == NULL)
+		RTW_INFO("%s alloc_mgtxmitframe return null\n", __FUNCTION__);
+	else {
+		pattrib = &xmit_frame->attrib;
+		update_mgntframe_attrib(adapter, pattrib);
+		pattrib->qsel = QSLT_BEACON;
+		pattrib->pktlen = pattrib->last_txcmdsz = 0;
+	}
+#endif
+
+exit:
+	return xmit_frame;
+}
+
+
+int rtw_IOL_append_cmds(struct xmit_frame *xmit_frame, u8 *IOL_cmds, u32 cmd_len)
+{
+	struct pkt_attrib	*pattrib = &xmit_frame->attrib;
+	u16 buf_offset;
+	u32 ori_len;
+
+	buf_offset = TXDESC_OFFSET;
+	ori_len = buf_offset + pattrib->pktlen;
+
+	/* check if the io_buf can accommodate new cmds */
+	if (ori_len + cmd_len + 8 > MAX_XMITBUF_SZ) {
+		RTW_INFO("%s %u is large than MAX_XMITBUF_SZ:%u, can't accommodate new cmds\n", __FUNCTION__
+			 , ori_len + cmd_len + 8, MAX_XMITBUF_SZ);
+		return _FAIL;
+	}
+
+	_rtw_memcpy(xmit_frame->buf_addr + buf_offset + pattrib->pktlen, IOL_cmds, cmd_len);
+	pattrib->pktlen += cmd_len;
+	pattrib->last_txcmdsz += cmd_len;
+
+	/* RTW_INFO("%s ori:%u + cmd_len:%u = %u\n", __FUNCTION__, ori_len, cmd_len, buf_offset+pattrib->pktlen); */
+
+	return _SUCCESS;
+}
+
+bool rtw_IOL_applied(ADAPTER *adapter)
+{
+	if (1 == adapter->registrypriv.fw_iol)
+		return _TRUE;
+
+#ifdef CONFIG_USB_HCI
+	if ((2 == adapter->registrypriv.fw_iol) && (IS_FULL_SPEED_USB(adapter)))
+		return _TRUE;
+#endif
+
+	return _FALSE;
+}
+
+int rtw_IOL_exec_cmds_sync(ADAPTER *adapter, struct xmit_frame *xmit_frame, u32 max_wating_ms, u32 bndy_cnt)
+{
+	return rtw_hal_iol_cmd(adapter, xmit_frame, max_wating_ms, bndy_cnt);
+}
+
+#ifdef CONFIG_IOL_NEW_GENERATION
+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
+{
+	return _SUCCESS;
+}
+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, u8 mask)
+{
+	struct ioreg_cfg cmd = {8, IOREG_CMD_WB_REG, 0x0, 0x0, 0x0};
+
+	/* RTW_PUT_LE16((u8*)&cmd.address, addr);	 */
+	/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value);	 */
+	cmd.address = cpu_to_le16(addr);
+	cmd.data = cpu_to_le32(value);
+
+	if (mask != 0xFF) {
+		cmd.length = 12;
+		/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask);	 */
+		cmd.mask = cpu_to_le32(mask);
+	}
+
+	/* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); */
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
+
+}
+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, u16 mask)
+{
+	struct ioreg_cfg cmd = {8, IOREG_CMD_WW_REG, 0x0, 0x0, 0x0};
+
+	/* RTW_PUT_LE16((u8*)&cmd.address, addr);	 */
+	/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value);	 */
+	cmd.address = cpu_to_le16(addr);
+	cmd.data = cpu_to_le32(value);
+
+	if (mask != 0xFFFF) {
+		cmd.length = 12;
+		/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask);	 */
+		cmd.mask =  cpu_to_le32(mask);
+	}
+
+	/* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FUNCTION__, addr,value,mask); */
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
+
+}
+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, u32 mask)
+{
+	struct ioreg_cfg cmd = {8, IOREG_CMD_WD_REG, 0x0, 0x0, 0x0};
+
+	/* RTW_PUT_LE16((u8*)&cmd.address, addr);	 */
+	/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value);	 */
+	cmd.address = cpu_to_le16(addr);
+	cmd.data = cpu_to_le32(value);
+
+	if (mask != 0xFFFFFFFF) {
+		cmd.length = 12;
+		/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask);	 */
+		cmd.mask =  cpu_to_le32(mask);
+	}
+
+	/* RTW_INFO("%s addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__, addr,value,mask); */
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
+
+}
+
+int _rtw_IOL_append_WRF_cmd(struct xmit_frame *xmit_frame, u8 rf_path, u16 addr, u32 value, u32 mask)
+{
+	struct ioreg_cfg cmd = {8, IOREG_CMD_W_RF, 0x0, 0x0, 0x0};
+
+	/* RTW_PUT_LE16((u8*)&cmd.address, addr);	 */
+	/* RTW_PUT_LE32((u8*)&cmd.value, (u32)value);	 */
+	cmd.address = (rf_path << 8) | ((addr) & 0xFF);
+	cmd.data = cpu_to_le32(value);
+
+	if (mask != 0x000FFFFF) {
+		cmd.length = 12;
+		/* RTW_PUT_LE32((u8*)&cmd.mask, (u32)mask);	 */
+		cmd.mask =  cpu_to_le32(mask);
+	}
+
+	/* RTW_INFO("%s rf_path:0x%02x addr:0x%04x,value:0x%08x,mask:0x%08x\n", __FU2NCTION__,rf_path, addr,value,mask); */
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, cmd.length);
+
+}
+
+
+
+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
+{
+	struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0};
+	/* RTW_PUT_LE16((u8*)&cmd.address, us);	 */
+	cmd.address = cpu_to_le16(us);
+
+	/* RTW_INFO("%s %u\n", __FUNCTION__, us); */
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
+}
+
+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
+{
+	struct ioreg_cfg cmd = {4, IOREG_CMD_DELAY_US, 0x0, 0x0, 0x0};
+
+	/* RTW_PUT_LE16((u8*)&cmd.address, ms);	 */
+	cmd.address = cpu_to_le16(ms);
+
+	/* RTW_INFO("%s %u\n", __FUNCTION__, ms); */
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
+}
+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
+{
+	struct ioreg_cfg cmd = {4, IOREG_CMD_END, 0xFFFF, 0xFF, 0x0};
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 4);
+
+}
+
+u8 rtw_IOL_cmd_boundary_handle(struct xmit_frame *pxmit_frame)
+{
+	u8 is_cmd_bndy = _FALSE;
+	if (((pxmit_frame->attrib.pktlen + 32) % 256) + 8 >= 256) {
+		rtw_IOL_append_END_cmd(pxmit_frame);
+		pxmit_frame->attrib.pktlen = ((((pxmit_frame->attrib.pktlen + 32) / 256) + 1) * 256);
+
+		/* printk("==> %s, pktlen(%d)\n",__FUNCTION__,pxmit_frame->attrib.pktlen); */
+		pxmit_frame->attrib.last_txcmdsz = pxmit_frame->attrib.pktlen;
+		is_cmd_bndy = _TRUE;
+	}
+	return is_cmd_bndy;
+}
+
+void rtw_IOL_cmd_buf_dump(ADAPTER *Adapter, int buf_len, u8 *pbuf)
+{
+	int i;
+	int j = 1;
+
+	printk("###### %s ######\n", __FUNCTION__);
+	for (i = 0; i < buf_len; i++) {
+		printk("%02x-", *(pbuf + i));
+
+		if (j % 32 == 0)
+			printk("\n");
+		j++;
+	}
+	printk("\n");
+	printk("============= ioreg_cmd len = %d ===============\n", buf_len);
+}
+
+
+#else /* CONFIG_IOL_NEW_GENERATION */
+int rtw_IOL_append_LLT_cmd(struct xmit_frame *xmit_frame, u8 page_boundary)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_LLT, 0x0, 0x0};
+
+	RTW_PUT_BE32((u8 *)&cmd.value, (u32)page_boundary);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
+}
+
+int _rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_WB_REG, 0x0, 0x0};
+
+	RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr);
+	RTW_PUT_BE32((u8 *)&cmd.value, (u32)value);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
+}
+
+int _rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_WW_REG, 0x0, 0x0};
+
+	RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr);
+	RTW_PUT_BE32((u8 *)&cmd.value, (u32)value);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
+}
+
+int _rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_WD_REG, 0x0, 0x0};
+	u8 *pos = (u8 *)&cmd;
+
+	RTW_PUT_BE16((u8 *)&cmd.address, (u16)addr);
+	RTW_PUT_BE32((u8 *)&cmd.value, (u32)value);
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
+}
+
+#ifdef DBG_IO
+int dbg_rtw_IOL_append_WB_cmd(struct xmit_frame *xmit_frame, u16 addr, u8 value, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 1))
+		RTW_INFO("DBG_IO %s:%d IOL_WB(0x%04x, 0x%02x)\n", caller, line, addr, value);
+
+	return _rtw_IOL_append_WB_cmd(xmit_frame, addr, value);
+}
+
+int dbg_rtw_IOL_append_WW_cmd(struct xmit_frame *xmit_frame, u16 addr, u16 value, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 2))
+		RTW_INFO("DBG_IO %s:%d IOL_WW(0x%04x, 0x%04x)\n", caller, line, addr, value);
+
+	return _rtw_IOL_append_WW_cmd(xmit_frame, addr, value);
+}
+
+int dbg_rtw_IOL_append_WD_cmd(struct xmit_frame *xmit_frame, u16 addr, u32 value, const char *caller, const int line)
+{
+	if (match_write_sniff_ranges(addr, 4))
+		RTW_INFO("DBG_IO %s:%d IOL_WD(0x%04x, 0x%08x)\n", caller, line, addr, value);
+
+	return _rtw_IOL_append_WD_cmd(xmit_frame, addr, value);
+}
+#endif
+
+int rtw_IOL_append_DELAY_US_cmd(struct xmit_frame *xmit_frame, u16 us)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_DELAY_US, 0x0, 0x0};
+
+	RTW_PUT_BE32((u8 *)&cmd.value, (u32)us);
+
+	/* RTW_INFO("%s %u\n", __FUNCTION__, us); */
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
+}
+
+int rtw_IOL_append_DELAY_MS_cmd(struct xmit_frame *xmit_frame, u16 ms)
+{
+	IOL_CMD cmd = {0x0, IOL_CMD_DELAY_MS, 0x0, 0x0};
+
+	RTW_PUT_BE32((u8 *)&cmd.value, (u32)ms);
+
+	/* RTW_INFO("%s %u\n", __FUNCTION__, ms); */
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&cmd, 8);
+}
+
+int rtw_IOL_append_END_cmd(struct xmit_frame *xmit_frame)
+{
+	IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
+
+
+	return rtw_IOL_append_cmds(xmit_frame, (u8 *)&end_cmd, 8);
+
+}
+
+int rtw_IOL_exec_cmd_array_sync(PADAPTER adapter, u8 *IOL_cmds, u32 cmd_num, u32 max_wating_ms)
+{
+	struct xmit_frame	*xmit_frame;
+
+	xmit_frame = rtw_IOL_accquire_xmit_frame(adapter);
+	if (xmit_frame == NULL)
+		return _FAIL;
+
+	if (rtw_IOL_append_cmds(xmit_frame, IOL_cmds, cmd_num << 3) == _FAIL)
+		return _FAIL;
+
+	return rtw_IOL_exec_cmds_sync(adapter, xmit_frame, max_wating_ms, 0);
+}
+
+int rtw_IOL_exec_empty_cmds_sync(ADAPTER *adapter, u32 max_wating_ms)
+{
+	IOL_CMD end_cmd = {0x0, IOL_CMD_END, 0x0, 0x0};
+	return rtw_IOL_exec_cmd_array_sync(adapter, (u8 *)&end_cmd, 1, max_wating_ms);
+}
+#endif /* CONFIG_IOL_NEW_GENERATION */
+
+
+
+
+#endif /* CONFIG_IOL */

core/rtw_mem.c

@@ -0,0 +1,107 @@
+
+#include <drv_types.h>
+#include <rtw_mem.h>
+
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("Realtek Wireless Lan Driver 802.11 AC");
+MODULE_AUTHOR("Brandon Bailey <brandon@rmrcom.com>");
+MODULE_VERSION("DRIVERVERSION");
+
+struct sk_buff_head rtk_skb_mem_q;
+struct u8 *rtk_buf_mem[NR_RECVBUFF];
+
+struct u8	*rtw_get_buf_premem(int index) {
+	printk("%s, rtk_buf_mem index : %d\n", __func__, index);
+	return rtk_buf_mem[index];
+}
+
+u16 rtw_rtkm_get_buff_size(void) {
+	return MAX_RTKM_RECVBUF_SZ;
+}
+EXPORT_SYMBOL(rtw_rtkm_get_buff_size);
+
+u8 rtw_rtkm_get_nr_recv_skb(void) {
+	return MAX_RTKM_NR_PREALLOC_RECV_SKB;
+}
+EXPORT_SYMBOL(rtw_rtkm_get_nr_recv_skb);
+
+struct sk_buff *rtw_alloc_skb_premem(u16 in_size) {
+	struct sk_buff *skb = NULL;
+
+	if (in_size > MAX_RTKM_RECVBUF_SZ) {
+		pr_info("warning %s: driver buffer size(%d) > rtkm buffer size(%d)\n", __func__, in_size, MAX_RTKM_RECVBUF_SZ);
+		WARN_ON(1);
+		return skb;
+	}
+
+	skb = skb_dequeue(&rtk_skb_mem_q);
+
+	printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
+
+	return skb;
+}
+EXPORT_SYMBOL(rtw_alloc_skb_premem);
+
+int rtw_free_skb_premem(struct sk_buff *pskb) {
+	if (!pskb)
+		return -1;
+
+	if (skb_queue_len(&rtk_skb_mem_q) >= MAX_RTKM_NR_PREALLOC_RECV_SKB)
+		return -1;
+
+	skb_queue_tail(&rtk_skb_mem_q, pskb);
+
+	printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
+
+	return 0;
+}
+EXPORT_SYMBOL(rtw_free_skb_premem);
+
+static int __init rtw_mem_init(void) {
+	int i;
+	SIZE_PTR tmpaddr = 0;
+	SIZE_PTR alignment = 0;
+	struct sk_buff *pskb = NULL;
+
+	printk("%s\n", __func__);
+	pr_info("MAX_RTKM_NR_PREALLOC_RECV_SKB: %d\n", MAX_RTKM_NR_PREALLOC_RECV_SKB);
+	pr_info("MAX_RTKM_RECVBUF_SZ: %d\n", MAX_RTKM_RECVBUF_SZ);
+
+#ifdef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	for (i = 0; i < NR_RECVBUFF; i++)
+		rtk_buf_mem[i] = usb_buffer_alloc(dev, size, (in_interrupt() ? GFP_ATOMIC : GFP_KERNEL), dma);
+#endif /* CONFIG_USE_USB_BUFFER_ALLOC_RX */
+
+	skb_queue_head_init(&rtk_skb_mem_q);
+
+	for (i = 0; i < MAX_RTKM_NR_PREALLOC_RECV_SKB; i++) {
+		pskb = __dev_alloc_skb(MAX_RTKM_RECVBUF_SZ + RECVBUFF_ALIGN_SZ, in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
+		if (pskb) {
+			tmpaddr = (SIZE_PTR)pskb->data;
+			alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
+			skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
+
+			skb_queue_tail(&rtk_skb_mem_q, pskb);
+		} else
+			printk("%s, alloc skb memory fail!\n", __func__);
+
+		pskb = NULL;
+	}
+
+	printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
+
+	return 0;
+
+}
+
+static void __exit rtw_mem_exit(void) {
+	if (skb_queue_len(&rtk_skb_mem_q))
+		printk("%s, rtk_skb_mem_q len : %d\n", __func__, skb_queue_len(&rtk_skb_mem_q));
+
+	skb_queue_purge(&rtk_skb_mem_q);
+
+	printk("%s\n", __func__);
+}
+
+module_init(rtw_mem_init);
+module_exit(rtw_mem_exit);

core/rtw_odm.c

@@ -0,0 +1,386 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include <rtw_odm.h>
+#include <hal_data.h>
+
+const char *odm_comp_str[] = {
+	/* BIT0 */"ODM_COMP_DIG",
+	/* BIT1 */"ODM_COMP_RA_MASK",
+	/* BIT2 */"ODM_COMP_DYNAMIC_TXPWR",
+	/* BIT3 */"ODM_COMP_FA_CNT",
+	/* BIT4 */"ODM_COMP_RSSI_MONITOR",
+	/* BIT5 */"ODM_COMP_CCK_PD",
+	/* BIT6 */"ODM_COMP_ANT_DIV",
+	/* BIT7 */"ODM_COMP_PWR_SAVE",
+	/* BIT8 */"ODM_COMP_PWR_TRAIN",
+	/* BIT9 */"ODM_COMP_RATE_ADAPTIVE",
+	/* BIT10 */"ODM_COMP_PATH_DIV",
+	/* BIT11 */"ODM_COMP_PSD",
+	/* BIT12 */"ODM_COMP_DYNAMIC_PRICCA",
+	/* BIT13 */"ODM_COMP_RXHP",
+	/* BIT14 */"ODM_COMP_MP",
+	/* BIT15 */"ODM_COMP_CFO_TRACKING",
+	/* BIT16 */"ODM_COMP_ACS",
+	/* BIT17 */"PHYDM_COMP_ADAPTIVITY",
+	/* BIT18 */"PHYDM_COMP_RA_DBG",
+	/* BIT19 */"PHYDM_COMP_TXBF",
+	/* BIT20 */"ODM_COMP_EDCA_TURBO",
+	/* BIT21 */"ODM_COMP_EARLY_MODE",
+	/* BIT22 */"ODM_FW_DEBUG_TRACE",
+	/* BIT23 */NULL,
+	/* BIT24 */"ODM_COMP_TX_PWR_TRACK",
+	/* BIT25 */"ODM_COMP_RX_GAIN_TRACK",
+	/* BIT26 */"ODM_COMP_CALIBRATION",
+	/* BIT27 */NULL,
+	/* BIT28 */"ODM_PHY_CONFIG",
+	/* BIT29 */"BEAMFORMING_DEBUG",
+	/* BIT30 */"ODM_COMP_COMMON",
+	/* BIT31 */"ODM_COMP_INIT",
+	/* BIT32 */"ODM_COMP_NOISY_DETECT",
+	/* BIT33 */"ODM_COMP_DFS",
+};
+
+#define RTW_ODM_COMP_MAX 34
+
+const char *odm_ability_str[] = {
+	/* BIT0 */"ODM_BB_DIG",
+	/* BIT1 */"ODM_BB_RA_MASK",
+	/* BIT2 */"ODM_BB_DYNAMIC_TXPWR",
+	/* BIT3 */"ODM_BB_FA_CNT",
+	/* BIT4 */"ODM_BB_RSSI_MONITOR",
+	/* BIT5 */"ODM_BB_CCK_PD",
+	/* BIT6 */"ODM_BB_ANT_DIV",
+	/* BIT7 */"ODM_BB_PWR_SAVE",
+	/* BIT8 */"ODM_BB_PWR_TRAIN",
+	/* BIT9 */"ODM_BB_RATE_ADAPTIVE",
+	/* BIT10 */"ODM_BB_PATH_DIV",
+	/* BIT11 */"ODM_BB_PSD",
+	/* BIT12 */"ODM_BB_RXHP",
+	/* BIT13 */"ODM_BB_ADAPTIVITY",
+	/* BIT14 */"ODM_BB_CFO_TRACKING",
+	/* BIT15 */"ODM_BB_NHM_CNT",
+	/* BIT16 */"ODM_BB_PRIMARY_CCA",
+	/* BIT17 */"ODM_BB_TXBF",
+	/* BIT18 */NULL,
+	/* BIT19 */NULL,
+	/* BIT20 */"ODM_MAC_EDCA_TURBO",
+	/* BIT21 */"ODM_MAC_EARLY_MODE",
+	/* BIT22 */NULL,
+	/* BIT23 */NULL,
+	/* BIT24 */"ODM_RF_TX_PWR_TRACK",
+	/* BIT25 */"ODM_RF_RX_GAIN_TRACK",
+	/* BIT26 */"ODM_RF_CALIBRATION",
+};
+
+#define RTW_ODM_ABILITY_MAX 27
+
+const char *odm_dbg_level_str[] = {
+	NULL,
+	"ODM_DBG_OFF",
+	"ODM_DBG_SERIOUS",
+	"ODM_DBG_WARNING",
+	"ODM_DBG_LOUD",
+	"ODM_DBG_TRACE",
+};
+
+#define RTW_ODM_DBG_LEVEL_NUM 6
+
+void rtw_odm_dbg_comp_msg(void *sel, _adapter *adapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &pHalData->odmpriv;
+	int cnt = 0;
+	u64 dbg_comp = 0;
+	int i;
+
+	rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_FLAG, &dbg_comp, NULL);
+
+	RTW_PRINT_SEL(sel, "odm.DebugComponents = 0x%016llx\n", dbg_comp);
+	for (i = 0; i < RTW_ODM_COMP_MAX; i++) {
+		if (odm_comp_str[i])
+			RTW_PRINT_SEL(sel, "%cBIT%-2d %s\n",
+				(BIT0 & (dbg_comp >> i)) ? '+' : ' ', i, odm_comp_str[i]);
+	}
+}
+
+inline void rtw_odm_dbg_comp_set(_adapter *adapter, u64 comps)
+{
+	rtw_hal_set_odm_var(adapter, HAL_ODM_DBG_FLAG, &comps, _FALSE);
+}
+
+void rtw_odm_dbg_level_msg(void *sel, _adapter *adapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &pHalData->odmpriv;
+	int cnt = 0;
+	u32 dbg_level = 0;
+	int i;
+
+	rtw_hal_get_odm_var(adapter, HAL_ODM_DBG_LEVEL, &dbg_level, NULL);
+	RTW_PRINT_SEL(sel, "odm.DebugLevel = %u\n", dbg_level);
+	for (i = 0; i < RTW_ODM_DBG_LEVEL_NUM; i++) {
+		if (odm_dbg_level_str[i])
+			RTW_PRINT_SEL(sel, "%u %s\n", i, odm_dbg_level_str[i]);
+	}
+}
+
+inline void rtw_odm_dbg_level_set(_adapter *adapter, u32 level)
+{
+	rtw_hal_set_odm_var(adapter, HAL_ODM_DBG_LEVEL, &level, _FALSE);
+}
+
+void rtw_odm_ability_msg(void *sel, _adapter *adapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &pHalData->odmpriv;
+	int cnt = 0;
+	u32 ability = 0;
+	int i;
+
+	ability = rtw_phydm_ability_get(adapter);
+	RTW_PRINT_SEL(sel, "odm.SupportAbility = 0x%08x\n", ability);
+	for (i = 0; i < RTW_ODM_ABILITY_MAX; i++) {
+		if (odm_ability_str[i])
+			RTW_PRINT_SEL(sel, "%cBIT%-2d %s\n",
+				(BIT0 << i) & ability ? '+' : ' ', i, odm_ability_str[i]);
+	}
+}
+
+inline void rtw_odm_ability_set(_adapter *adapter, u32 ability)
+{
+	rtw_phydm_ability_set(adapter, ability);
+}
+
+/* set ODM_CMNINFO_IC_TYPE based on chip_type */
+void rtw_odm_init_ic_type(_adapter *adapter)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &hal_data->odmpriv;
+	u4Byte ic_type = chip_type_to_odm_ic_type(rtw_get_chip_type(adapter));
+
+	rtw_warn_on(!ic_type);
+
+	ODM_CmnInfoInit(odm, ODM_CMNINFO_IC_TYPE, ic_type);
+}
+
+inline void rtw_odm_set_force_igi_lb(_adapter *adapter, u8 lb)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+
+	hal_data->u1ForcedIgiLb = lb;
+}
+
+inline u8 rtw_odm_get_force_igi_lb(_adapter *adapter)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+
+	return hal_data->u1ForcedIgiLb;
+}
+
+void rtw_odm_adaptivity_ver_msg(void *sel, _adapter *adapter)
+{
+	RTW_PRINT_SEL(sel, "ADAPTIVITY_VERSION "ADAPTIVITY_VERSION"\n");
+}
+
+#define RTW_ADAPTIVITY_EN_DISABLE 0
+#define RTW_ADAPTIVITY_EN_ENABLE 1
+
+void rtw_odm_adaptivity_en_msg(void *sel, _adapter *adapter)
+{
+	struct registry_priv *regsty = &adapter->registrypriv;
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &hal_data->odmpriv;
+
+	RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_EN_");
+
+	if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_DISABLE)
+		_RTW_PRINT_SEL(sel, "DISABLE\n");
+	else if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
+		_RTW_PRINT_SEL(sel, "ENABLE\n");
+	else
+		_RTW_PRINT_SEL(sel, "INVALID\n");
+}
+
+#define RTW_ADAPTIVITY_MODE_NORMAL 0
+#define RTW_ADAPTIVITY_MODE_CARRIER_SENSE 1
+
+void rtw_odm_adaptivity_mode_msg(void *sel, _adapter *adapter)
+{
+	struct registry_priv *regsty = &adapter->registrypriv;
+
+	RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_MODE_");
+
+	if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_NORMAL)
+		_RTW_PRINT_SEL(sel, "NORMAL\n");
+	else if (regsty->adaptivity_mode == RTW_ADAPTIVITY_MODE_CARRIER_SENSE)
+		_RTW_PRINT_SEL(sel, "CARRIER_SENSE\n");
+	else
+		_RTW_PRINT_SEL(sel, "INVALID\n");
+}
+
+#define RTW_ADAPTIVITY_DML_DISABLE 0
+#define RTW_ADAPTIVITY_DML_ENABLE 1
+
+void rtw_odm_adaptivity_dml_msg(void *sel, _adapter *adapter)
+{
+	struct registry_priv *regsty = &adapter->registrypriv;
+
+	RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DML_");
+
+	if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_DISABLE)
+		_RTW_PRINT_SEL(sel, "DISABLE\n");
+	else if (regsty->adaptivity_dml == RTW_ADAPTIVITY_DML_ENABLE)
+		_RTW_PRINT_SEL(sel, "ENABLE\n");
+	else
+		_RTW_PRINT_SEL(sel, "INVALID\n");
+}
+
+void rtw_odm_adaptivity_dc_backoff_msg(void *sel, _adapter *adapter)
+{
+	struct registry_priv *regsty = &adapter->registrypriv;
+
+	RTW_PRINT_SEL(sel, "RTW_ADAPTIVITY_DC_BACKOFF:%u\n", regsty->adaptivity_dc_backoff);
+}
+
+void rtw_odm_adaptivity_config_msg(void *sel, _adapter *adapter)
+{
+	rtw_odm_adaptivity_ver_msg(sel, adapter);
+	rtw_odm_adaptivity_en_msg(sel, adapter);
+	rtw_odm_adaptivity_mode_msg(sel, adapter);
+	rtw_odm_adaptivity_dml_msg(sel, adapter);
+	rtw_odm_adaptivity_dc_backoff_msg(sel, adapter);
+}
+
+bool rtw_odm_adaptivity_needed(_adapter *adapter)
+{
+	struct registry_priv *regsty = &adapter->registrypriv;
+	struct mlme_priv *mlme = &adapter->mlmepriv;
+	bool ret = _FALSE;
+
+	if (regsty->adaptivity_en == RTW_ADAPTIVITY_EN_ENABLE)
+		ret = _TRUE;
+
+	return ret;
+}
+
+void rtw_odm_adaptivity_parm_msg(void *sel, _adapter *adapter)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &pHalData->odmpriv;
+
+	rtw_odm_adaptivity_config_msg(sel, adapter);
+
+	RTW_PRINT_SEL(sel, "%10s %16s %16s %22s %12s\n"
+		, "TH_L2H_ini", "TH_EDCCA_HL_diff", "TH_L2H_ini_mode2", "TH_EDCCA_HL_diff_mode2", "EDCCA_enable");
+	RTW_PRINT_SEL(sel, "0x%-8x %-16d 0x%-14x %-22d %-12d\n"
+		      , (u8)odm->TH_L2H_ini
+		      , odm->TH_EDCCA_HL_diff
+		      , (u8)odm->TH_L2H_ini_mode2
+		      , odm->TH_EDCCA_HL_diff_mode2
+		      , odm->EDCCA_enable
+		     );
+
+	RTW_PRINT_SEL(sel, "%15s %9s\n", "AdapEnableState", "Adap_Flag");
+	RTW_PRINT_SEL(sel, "%-15x %-9x\n"
+		      , odm->Adaptivity_enable
+		      , odm->adaptivity_flag
+		     );
+}
+
+void rtw_odm_adaptivity_parm_set(_adapter *adapter, s8 TH_L2H_ini, s8 TH_EDCCA_HL_diff, s8 TH_L2H_ini_mode2, s8 TH_EDCCA_HL_diff_mode2, u8 EDCCA_enable)
+{
+	HAL_DATA_TYPE *pHalData = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &pHalData->odmpriv;
+
+	odm->TH_L2H_ini = TH_L2H_ini;
+	odm->TH_EDCCA_HL_diff = TH_EDCCA_HL_diff;
+	odm->TH_L2H_ini_mode2 = TH_L2H_ini_mode2;
+	odm->TH_EDCCA_HL_diff_mode2 = TH_EDCCA_HL_diff_mode2;
+	odm->EDCCA_enable = EDCCA_enable;
+}
+
+void rtw_odm_get_perpkt_rssi(void *sel, _adapter *adapter)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	DM_ODM_T *odm = &(hal_data->odmpriv);
+
+	RTW_PRINT_SEL(sel, "RxRate = %s, RSSI_A = %d(%%), RSSI_B = %d(%%)\n",
+		      HDATA_RATE(odm->RxRate), odm->RSSI_A, odm->RSSI_B);
+}
+
+
+void rtw_odm_acquirespinlock(_adapter *adapter,	RT_SPINLOCK_TYPE type)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(adapter);
+	_irqL irqL;
+
+	switch (type) {
+	case RT_IQK_SPINLOCK:
+		_enter_critical_bh(&pHalData->IQKSpinLock, &irqL);
+	default:
+		break;
+	}
+}
+
+void rtw_odm_releasespinlock(_adapter *adapter,	RT_SPINLOCK_TYPE type)
+{
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(adapter);
+	_irqL irqL;
+
+	switch (type) {
+	case RT_IQK_SPINLOCK:
+		_exit_critical_bh(&pHalData->IQKSpinLock, &irqL);
+	default:
+		break;
+	}
+}
+
+#ifdef CONFIG_DFS_MASTER
+inline u8 rtw_odm_get_dfs_domain(_adapter *adapter)
+{
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	PDM_ODM_T pDM_Odm = &(hal_data->odmpriv);
+
+	return pDM_Odm->DFS_RegionDomain;
+}
+
+inline VOID rtw_odm_radar_detect_reset(_adapter *adapter)
+{
+	phydm_radar_detect_reset(GET_ODM(adapter));
+}
+
+inline VOID rtw_odm_radar_detect_disable(_adapter *adapter)
+{
+	phydm_radar_detect_disable(GET_ODM(adapter));
+}
+
+/* called after ch, bw is set */
+inline VOID rtw_odm_radar_detect_enable(_adapter *adapter)
+{
+	phydm_radar_detect_enable(GET_ODM(adapter));
+}
+
+inline BOOLEAN rtw_odm_radar_detect(_adapter *adapter)
+{
+	return phydm_radar_detect(GET_ODM(adapter));
+}
+#endif /* CONFIG_DFS_MASTER */

core/rtw_rf.c

@@ -0,0 +1,923 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_RF_C_
+
+#include <drv_types.h>
+#include <hal_data.h>
+
+u8 center_ch_2g[CENTER_CH_2G_NUM] = {
+	/* G00 */1, 2,
+	/* G01 */3, 4, 5,
+	/* G02 */6, 7, 8,
+	/* G03 */9, 10, 11,
+	/* G04 */12, 13,
+	/* G05 */14
+};
+
+u8 center_ch_2g_40m[CENTER_CH_2G_40M_NUM] = {
+	3,
+	4,
+	5,
+	6,
+	7,
+	8,
+	9,
+	10,
+	11,
+};
+
+u8 op_chs_of_cch_2g_40m[CENTER_CH_2G_40M_NUM][2] = {
+	{1, 5}, /* 3 */
+	{2, 6}, /* 4 */
+	{3, 7}, /* 5 */
+	{4, 8}, /* 6 */
+	{5, 9}, /* 7 */
+	{6, 10}, /* 8 */
+	{7, 11}, /* 9 */
+	{8, 12}, /* 10 */
+	{9, 13}, /* 11 */
+};
+
+u8 center_ch_5g_all[CENTER_CH_5G_ALL_NUM] = {
+	/* G00 */36, 38, 40,
+	42,
+	/* G01 */44, 46, 48,
+	/* 50, */
+	/* G02 */52, 54, 56,
+	58,
+	/* G03 */60, 62, 64,
+	/* G04 */100, 102, 104,
+	106,
+	/* G05 */108, 110, 112,
+	/* 114, */
+	/* G06 */116, 118, 120,
+	122,
+	/* G07 */124, 126, 128,
+	/* G08 */132, 134, 136,
+	138,
+	/* G09 */140, 142, 144,
+	/* G10 */149, 151, 153,
+	155,
+	/* G11 */157, 159, 161,
+	/* 163, */
+	/* G12 */165, 167, 169,
+	171,
+	/* G13 */173, 175, 177
+};
+
+u8 center_ch_5g_20m[CENTER_CH_5G_20M_NUM] = {
+	/* G00 */36, 40,
+	/* G01 */44, 48,
+	/* G02 */52, 56,
+	/* G03 */60, 64,
+	/* G04 */100, 104,
+	/* G05 */108, 112,
+	/* G06 */116, 120,
+	/* G07 */124, 128,
+	/* G08 */132, 136,
+	/* G09 */140, 144,
+	/* G10 */149, 153,
+	/* G11 */157, 161,
+	/* G12 */165, 169,
+	/* G13 */173, 177
+};
+
+u8 center_ch_5g_40m[CENTER_CH_5G_40M_NUM] = {
+	/* G00 */38,
+	/* G01 */46,
+	/* G02 */54,
+	/* G03 */62,
+	/* G04 */102,
+	/* G05 */110,
+	/* G06 */118,
+	/* G07 */126,
+	/* G08 */134,
+	/* G09 */142,
+	/* G10 */151,
+	/* G11 */159,
+	/* G12 */167,
+	/* G13 */175
+};
+
+u8 op_chs_of_cch_5g_40m[CENTER_CH_5G_40M_NUM][2] = {
+	{36, 40}, /* 38 */
+	{44, 48}, /* 46 */
+	{52, 56}, /* 54 */
+	{60, 64}, /* 62 */
+	{100, 104}, /* 102 */
+	{108, 112}, /* 110 */
+	{116, 120}, /* 118 */
+	{124, 128}, /* 126 */
+	{132, 136}, /* 134 */
+	{140, 144}, /* 142 */
+	{149, 153}, /* 151 */
+	{157, 161}, /* 159 */
+	{165, 169}, /* 167 */
+	{173, 177}, /* 175 */
+};
+
+u8 center_ch_5g_80m[CENTER_CH_5G_80M_NUM] = {
+	/* G00 ~ G01*/42,
+	/* G02 ~ G03*/58,
+	/* G04 ~ G05*/106,
+	/* G06 ~ G07*/122,
+	/* G08 ~ G09*/138,
+	/* G10 ~ G11*/155,
+	/* G12 ~ G13*/171
+};
+
+u8 op_chs_of_cch_5g_80m[CENTER_CH_5G_80M_NUM][4] = {
+	{36, 40, 44, 48}, /* 42 */
+	{52, 56, 60, 64}, /* 58 */
+	{100, 104, 108, 112}, /* 106 */
+	{116, 120, 124, 128}, /* 122 */
+	{132, 136, 140, 144}, /* 138 */
+	{149, 153, 157, 161}, /* 155 */
+	{165, 169, 173, 177}, /* 171 */
+};
+
+u8 center_ch_5g_160m[CENTER_CH_5G_160M_NUM] = {
+	/* G00 ~ G03*/50,
+	/* G04 ~ G07*/114,
+	/* G10 ~ G13*/163
+};
+
+u8 op_chs_of_cch_5g_160m[CENTER_CH_5G_160M_NUM][8] = {
+	{36, 40, 44, 48, 52, 56, 60, 64}, /* 50 */
+	{100, 104, 108, 112, 116, 120, 124, 128}, /* 114 */
+	{149, 153, 157, 161, 165, 169, 173, 177}, /* 163 */
+};
+
+struct center_chs_ent_t {
+	u8 ch_num;
+	u8 *chs;
+};
+
+struct center_chs_ent_t center_chs_2g_by_bw[] = {
+	{CENTER_CH_2G_NUM, center_ch_2g},
+	{CENTER_CH_2G_40M_NUM, center_ch_2g_40m},
+};
+
+struct center_chs_ent_t center_chs_5g_by_bw[] = {
+	{CENTER_CH_5G_20M_NUM, center_ch_5g_20m},
+	{CENTER_CH_5G_40M_NUM, center_ch_5g_40m},
+	{CENTER_CH_5G_80M_NUM, center_ch_5g_80m},
+	{CENTER_CH_5G_160M_NUM, center_ch_5g_160m},
+};
+
+struct op_chs_ent_t {
+	u8 ch_num;
+	u8 *chs;
+};
+
+struct op_chs_ent_t op_chs_of_cch_2g_by_bw[] = {
+	{1, center_ch_2g},
+	{2, (u8 *)op_chs_of_cch_2g_40m},
+};
+
+struct op_chs_ent_t op_chs_of_cch_5g_by_bw[] = {
+	{1, center_ch_5g_20m},
+	{2, (u8 *)op_chs_of_cch_5g_40m},
+	{4, (u8 *)op_chs_of_cch_5g_80m},
+	{8, (u8 *)op_chs_of_cch_5g_160m},
+};
+
+inline u8 center_chs_5g_num(u8 bw) {
+	if (bw >= CHANNEL_WIDTH_160)
+		return 0;
+
+	return center_chs_5g_by_bw[bw].ch_num;
+}
+
+inline u8 center_chs_5g(u8 bw, u8 id) {
+	if (bw >= CHANNEL_WIDTH_160)
+		return 0;
+
+	if (id >= center_chs_5g_num(bw))
+		return 0;
+
+	return center_chs_5g_by_bw[bw].chs[id];
+}
+
+/*
+ * Get available op channels by @param cch, @param bw
+ * @cch: the given center channel
+ * @bw: the given bandwidth
+ * @op_chs: the pointer to return pointer of op channel array
+ * @op_ch_num: the pointer to return pointer of op channel number
+ *
+ * return valid (1) or not (0)
+ */
+u8 rtw_get_op_chs_by_cch_bw(u8 cch, u8 bw, u8 **op_chs, u8 *op_ch_num) {
+	int i;
+	struct center_chs_ent_t *c_chs_ent = NULL;
+	struct op_chs_ent_t *op_chs_ent = NULL;
+	u8 valid = 1;
+
+	if (cch <= 14
+	        && bw >= CHANNEL_WIDTH_20 && bw <= CHANNEL_WIDTH_40
+	   ) {
+		c_chs_ent = &center_chs_2g_by_bw[bw];
+		op_chs_ent = &op_chs_of_cch_2g_by_bw[bw];
+	} else if (cch >= 36 && cch <= 177
+	           && bw >= CHANNEL_WIDTH_20 && bw <= CHANNEL_WIDTH_160
+	          ) {
+		c_chs_ent = &center_chs_5g_by_bw[bw];
+		op_chs_ent = &op_chs_of_cch_5g_by_bw[bw];
+	} else {
+		valid = 0;
+		goto exit;
+	}
+
+	for (i = 0; i < c_chs_ent->ch_num; i++)
+		if (cch == *(c_chs_ent->chs + i))
+			break;
+
+	if (i == c_chs_ent->ch_num) {
+		valid = 0;
+		goto exit;
+	}
+
+	*op_chs = op_chs_ent->chs + op_chs_ent->ch_num * i;
+	*op_ch_num = op_chs_ent->ch_num;
+
+exit:
+	return valid;
+}
+
+int rtw_ch2freq(int chan) {
+	/* see 802.11 17.3.8.3.2 and Annex J
+	* there are overlapping channel numbers in 5GHz and 2GHz bands */
+
+	/*
+	* RTK: don't consider the overlapping channel numbers: 5G channel <= 14,
+	* because we don't support it. simply judge from channel number
+	*/
+
+	if (chan >= 1 && chan <= 14) {
+		if (chan == 14)
+			return 2484;
+		else if (chan < 14)
+			return 2407 + chan * 5;
+	} else if (chan >= 36 && chan <= 177)
+		return 5000 + chan * 5;
+
+	return 0; /* not supported */
+}
+
+int rtw_freq2ch(int freq) {
+	/* see 802.11 17.3.8.3.2 and Annex J */
+	if (freq == 2484)
+		return 14;
+	else if (freq < 2484)
+		return (freq - 2407) / 5;
+	else if (freq >= 4910 && freq <= 4980)
+		return (freq - 4000) / 5;
+	else if (freq <= 45000) /* DMG band lower limit */
+		return (freq - 5000) / 5;
+	else if (freq >= 58320 && freq <= 64800)
+		return (freq - 56160) / 2160;
+	else
+		return 0;
+}
+
+bool rtw_chbw_to_freq_range(u8 ch, u8 bw, u8 offset, u32 *hi, u32 *lo) {
+	u8 c_ch;
+	u32 freq;
+	u32 hi_ret = 0, lo_ret = 0;
+	int i;
+	bool valid = _FALSE;
+
+	if (hi)
+		*hi = 0;
+	if (lo)
+		*lo = 0;
+
+	c_ch = rtw_get_center_ch(ch, bw, offset);
+	freq = rtw_ch2freq(c_ch);
+
+	if (!freq) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	if (bw == CHANNEL_WIDTH_80) {
+		hi_ret = freq + 40;
+		lo_ret = freq - 40;
+	} else if (bw == CHANNEL_WIDTH_40) {
+		hi_ret = freq + 20;
+		lo_ret = freq - 20;
+	} else if (bw == CHANNEL_WIDTH_20) {
+		hi_ret = freq + 10;
+		lo_ret = freq - 10;
+	} else
+		rtw_warn_on(1);
+
+	if (hi)
+		*hi = hi_ret;
+	if (lo)
+		*lo = lo_ret;
+
+	valid = _TRUE;
+
+exit:
+	return valid;
+}
+
+const char *const _ch_width_str[] = {
+	"20MHz",
+	"40MHz",
+	"80MHz",
+	"160MHz",
+	"80_80MHz",
+	"CHANNEL_WIDTH_MAX",
+};
+
+const u8 _ch_width_to_bw_cap[] = {
+	BW_CAP_20M,
+	BW_CAP_40M,
+	BW_CAP_80M,
+	BW_CAP_160M,
+	BW_CAP_80_80M,
+	0,
+};
+
+const char *const _band_str[] = {
+	"2.4G",
+	"5G",
+	"BOTH",
+	"BAND_MAX",
+};
+
+const u8 _band_to_band_cap[] = {
+	BAND_CAP_2G,
+	BAND_CAP_5G,
+	0,
+	0,
+};
+
+#ifdef CONFIG_80211AC_VHT
+#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val) , .en_11ac = (_val)
+#else
+#define COUNTRY_CHPLAN_ASSIGN_EN_11AC(_val)
+#endif
+
+#if RTW_DEF_MODULE_REGULATORY_CERT
+#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val) , .def_module_flags = (_val)
+#else
+#define COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_val)
+#endif
+
+/* has def_module_flags specified, used by common map and HAL dfference map */
+#define COUNTRY_CHPLAN_ENT(_alpha2, _chplan, _en_11ac, _def_module_flags) \
+	{.alpha2 = (_alpha2), .chplan = (_chplan) \
+				COUNTRY_CHPLAN_ASSIGN_EN_11AC(_en_11ac) \
+			COUNTRY_CHPLAN_ASSIGN_DEF_MODULE_FLAGS(_def_module_flags) \
+	}
+
+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
+
+#include "../platform/custom_country_chplan.h"
+
+#elif RTW_DEF_MODULE_REGULATORY_CERT
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AE_HMC_M2)
+static const struct country_chplan RTL8821AE_HMC_M2_country_chplan_map[] = {
+	COUNTRY_CHPLAN_ENT("CN", 0x51, 1, 0xFB), /* China */
+	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0xFB), /* Russia(fac/gost), Kaliningrad */
+	COUNTRY_CHPLAN_ENT("UA", 0x26, 0, 0xFB), /* Ukraine */
+};
+static const u16 RTL8821AE_HMC_M2_country_chplan_map_sz = sizeof(RTL8821AE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8821AU)
+static const struct country_chplan RTL8821AU_country_chplan_map[] = {
+	COUNTRY_CHPLAN_ENT("RU", 0x59, 0, 0xFB), /* Russia(fac/gost), Kaliningrad */
+	COUNTRY_CHPLAN_ENT("UA", 0x26, 0, 0xFB), /* Ukraine */
+};
+static const u16 RTL8821AU_country_chplan_map_sz = sizeof(RTL8821AU_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AENF_NGFF)
+static const struct country_chplan RTL8812AENF_NGFF_country_chplan_map[] = {
+};
+static const u16 RTL8812AENF_NGFF_country_chplan_map_sz = sizeof(RTL8812AENF_NGFF_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8812AEBT_HMC)
+static const struct country_chplan RTL8812AEBT_HMC_country_chplan_map[] = {
+};
+static const u16 RTL8812AEBT_HMC_country_chplan_map_sz = sizeof(RTL8812AEBT_HMC_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8188EE_HMC_M2)
+static const struct country_chplan RTL8188EE_HMC_M2_country_chplan_map[] = {
+};
+static const u16 RTL8188EE_HMC_M2_country_chplan_map_sz = sizeof(RTL8188EE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BE_HMC_M2)
+static const struct country_chplan RTL8723BE_HMC_M2_country_chplan_map[] = {
+};
+static const u16 RTL8723BE_HMC_M2_country_chplan_map_sz = sizeof(RTL8723BE_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8723BS_NGFF1216)
+static const struct country_chplan RTL8723BS_NGFF1216_country_chplan_map[] = {
+};
+static const u16 RTL8723BS_NGFF1216_country_chplan_map_sz = sizeof(RTL8723BS_NGFF1216_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+#if (RTW_DEF_MODULE_REGULATORY_CERT & RTW_MODULE_RTL8192EEBT_HMC_M2)
+static const struct country_chplan RTL8192EEBT_HMC_M2_country_chplan_map[] = {
+};
+static const u16 RTL8192EEBT_HMC_M2_country_chplan_map_sz = sizeof(RTL8192EEBT_HMC_M2_country_chplan_map) / sizeof(struct country_chplan);
+#endif
+
+/**
+ * rtw_def_module_get_chplan_from_country -
+ * @country_code: string of country code
+ * @return:
+ * Return NULL for case referring to common map
+ */
+static const struct country_chplan *rtw_def_module_get_chplan_from_country(const char *country_code) {
+	const struct country_chplan *ent = NULL;
+	const struct country_chplan *hal_map = NULL;
+	u16 hal_map_sz = 0;
+	int i;
+
+	/* TODO: runtime selection for multi driver */
+#if (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AE_HMC_M2)
+	hal_map = RTL8821AE_HMC_M2_country_chplan_map;
+	hal_map_sz = RTL8821AE_HMC_M2_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8821AU)
+	hal_map = RTL8821AU_country_chplan_map;
+	hal_map_sz = RTL8821AU_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AENF_NGFF)
+	hal_map = RTL8812AENF_NGFF_country_chplan_map;
+	hal_map_sz = RTL8812AENF_NGFF_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8812AEBT_HMC)
+	hal_map = RTL8812AEBT_HMC_country_chplan_map;
+	hal_map_sz = RTL8812AEBT_HMC_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8188EE_HMC_M2)
+	hal_map = RTL8188EE_HMC_M2_country_chplan_map;
+	hal_map_sz = RTL8188EE_HMC_M2_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BE_HMC_M2)
+	hal_map = RTL8723BE_HMC_M2_country_chplan_map;
+	hal_map_sz = RTL8723BE_HMC_M2_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8723BS_NGFF1216)
+	hal_map = RTL8723BS_NGFF1216_country_chplan_map;
+	hal_map_sz = RTL8723BS_NGFF1216_country_chplan_map_sz;
+#elif (RTW_DEF_MODULE_REGULATORY_CERT == RTW_MODULE_RTL8192EEBT_HMC_M2)
+	hal_map = RTL8192EEBT_HMC_M2_country_chplan_map;
+	hal_map_sz = RTL8192EEBT_HMC_M2_country_chplan_map_sz;
+#endif
+
+	if (hal_map == NULL || hal_map_sz == 0)
+		goto exit;
+
+	for (i = 0; i < hal_map_sz; i++) {
+		if (strncmp(country_code, hal_map[i].alpha2, 2) == 0) {
+			ent = &hal_map[i];
+			break;
+		}
+	}
+
+exit:
+	return ent;
+}
+#endif /* CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP or RTW_DEF_MODULE_REGULATORY_CERT */
+
+static const struct country_chplan country_chplan_map[] = {
+	COUNTRY_CHPLAN_ENT("AD", 0x26, 1, 0x00), /* Andorra */
+	COUNTRY_CHPLAN_ENT("AE", 0x26, 1, 0xFB), /* United Arab Emirates */
+	COUNTRY_CHPLAN_ENT("AF", 0x42, 1, 0x00), /* Afghanistan */
+	COUNTRY_CHPLAN_ENT("AG", 0x30, 1, 0x00), /* Antigua & Barbuda */
+	COUNTRY_CHPLAN_ENT("AI", 0x26, 1, 0x00), /* Anguilla(UK) */
+	COUNTRY_CHPLAN_ENT("AL", 0x26, 1, 0xF1), /* Albania */
+	COUNTRY_CHPLAN_ENT("AM", 0x26, 1, 0xB0), /* Armenia */
+	COUNTRY_CHPLAN_ENT("AO", 0x26, 1, 0xE0), /* Angola */
+	COUNTRY_CHPLAN_ENT("AQ", 0x26, 1, 0x00), /* Antarctica */
+	COUNTRY_CHPLAN_ENT("AR", 0x57, 1, 0xF3), /* Argentina */
+	COUNTRY_CHPLAN_ENT("AS", 0x34, 1, 0x00), /* American Samoa */
+	COUNTRY_CHPLAN_ENT("AT", 0x26, 1, 0xFB), /* Austria */
+	COUNTRY_CHPLAN_ENT("AU", 0x45, 1, 0xFB), /* Australia */
+	COUNTRY_CHPLAN_ENT("AW", 0x34, 1, 0xB0), /* Aruba */
+	COUNTRY_CHPLAN_ENT("AZ", 0x26, 1, 0xF1), /* Azerbaijan */
+	COUNTRY_CHPLAN_ENT("BA", 0x26, 1, 0xF1), /* Bosnia & Herzegovina */
+	COUNTRY_CHPLAN_ENT("BB", 0x34, 1, 0x50), /* Barbados */
+	COUNTRY_CHPLAN_ENT("BD", 0x26, 1, 0xF1), /* Bangladesh */
+	COUNTRY_CHPLAN_ENT("BE", 0x26, 1, 0xFB), /* Belgium */
+	COUNTRY_CHPLAN_ENT("BF", 0x26, 1, 0xB0), /* Burkina Faso */
+	COUNTRY_CHPLAN_ENT("BG", 0x26, 1, 0xF1), /* Bulgaria */
+	COUNTRY_CHPLAN_ENT("BH", 0x47, 1, 0xF1), /* Bahrain */
+	COUNTRY_CHPLAN_ENT("BI", 0x26, 1, 0xB0), /* Burundi */
+	COUNTRY_CHPLAN_ENT("BJ", 0x26, 1, 0xB0), /* Benin */
+	COUNTRY_CHPLAN_ENT("BN", 0x47, 1, 0x10), /* Brunei */
+	COUNTRY_CHPLAN_ENT("BO", 0x30, 1, 0xF1), /* Bolivia */
+	COUNTRY_CHPLAN_ENT("BR", 0x34, 1, 0xF1), /* Brazil */
+	COUNTRY_CHPLAN_ENT("BS", 0x34, 1, 0x20), /* Bahamas */
+	COUNTRY_CHPLAN_ENT("BW", 0x26, 1, 0xF1), /* Botswana */
+	COUNTRY_CHPLAN_ENT("BY", 0x26, 1, 0xF1), /* Belarus */
+	COUNTRY_CHPLAN_ENT("BZ", 0x34, 1, 0x00), /* Belize */
+	COUNTRY_CHPLAN_ENT("CA", 0x34, 1, 0xFB), /* Canada */
+	COUNTRY_CHPLAN_ENT("CC", 0x26, 1, 0x00), /* Cocos (Keeling) Islands (Australia) */
+	COUNTRY_CHPLAN_ENT("CD", 0x26, 1, 0xB0), /* Congo, Republic of the */
+	COUNTRY_CHPLAN_ENT("CF", 0x26, 1, 0xB0), /* Central African Republic */
+	COUNTRY_CHPLAN_ENT("CG", 0x26, 1, 0xB0), /* Congo, Democratic Republic of the. Zaire */
+	COUNTRY_CHPLAN_ENT("CH", 0x26, 1, 0xFB), /* Switzerland */
+	COUNTRY_CHPLAN_ENT("CI", 0x26, 1, 0xF1), /* Cote d'Ivoire */
+	COUNTRY_CHPLAN_ENT("CK", 0x26, 1, 0x00), /* Cook Islands */
+	COUNTRY_CHPLAN_ENT("CL", 0x30, 1, 0xF1), /* Chile */
+	COUNTRY_CHPLAN_ENT("CM", 0x26, 1, 0xB0), /* Cameroon */
+	COUNTRY_CHPLAN_ENT("CN", 0x48, 1, 0xFB), /* China */
+	COUNTRY_CHPLAN_ENT("CO", 0x34, 1, 0xF1), /* Colombia */
+	COUNTRY_CHPLAN_ENT("CR", 0x34, 1, 0xF1), /* Costa Rica */
+	COUNTRY_CHPLAN_ENT("CV", 0x26, 1, 0xB0), /* Cape Verde */
+	COUNTRY_CHPLAN_ENT("CX", 0x45, 1, 0x00), /* Christmas Island (Australia) */
+	COUNTRY_CHPLAN_ENT("CY", 0x26, 1, 0xFB), /* Cyprus */
+	COUNTRY_CHPLAN_ENT("CZ", 0x26, 1, 0xFB), /* Czech Republic */
+	COUNTRY_CHPLAN_ENT("DE", 0x26, 1, 0xFB), /* Germany */
+	COUNTRY_CHPLAN_ENT("DJ", 0x26, 1, 0x80), /* Djibouti */
+	COUNTRY_CHPLAN_ENT("DK", 0x26, 1, 0xFB), /* Denmark */
+	COUNTRY_CHPLAN_ENT("DM", 0x34, 1, 0x00), /* Dominica */
+	COUNTRY_CHPLAN_ENT("DO", 0x34, 1, 0xF1), /* Dominican Republic */
+	COUNTRY_CHPLAN_ENT("DZ", 0x26, 1, 0xF1), /* Algeria */
+	COUNTRY_CHPLAN_ENT("EC", 0x34, 1, 0xF1), /* Ecuador */
+	COUNTRY_CHPLAN_ENT("EE", 0x26, 1, 0xFB), /* Estonia */
+	COUNTRY_CHPLAN_ENT("EG", 0x47, 0, 0xF1), /* Egypt */
+	COUNTRY_CHPLAN_ENT("EH", 0x47, 1, 0x80), /* Western Sahara */
+	COUNTRY_CHPLAN_ENT("ER", 0x26, 1, 0x00), /* Eritrea */
+	COUNTRY_CHPLAN_ENT("ES", 0x26, 1, 0xFB), /* Spain, Canary Islands, Ceuta, Melilla */
+	COUNTRY_CHPLAN_ENT("ET", 0x26, 1, 0xB0), /* Ethiopia */
+	COUNTRY_CHPLAN_ENT("FI", 0x26, 1, 0xFB), /* Finland */
+	COUNTRY_CHPLAN_ENT("FJ", 0x34, 1, 0x00), /* Fiji */
+	COUNTRY_CHPLAN_ENT("FK", 0x26, 1, 0x00), /* Falkland Islands (Islas Malvinas) (UK) */
+	COUNTRY_CHPLAN_ENT("FM", 0x34, 1, 0x00), /* Micronesia, Federated States of (USA) */
+	COUNTRY_CHPLAN_ENT("FO", 0x26, 1, 0x00), /* Faroe Islands (Denmark) */
+	COUNTRY_CHPLAN_ENT("FR", 0x26, 1, 0xFB), /* France */
+	COUNTRY_CHPLAN_ENT("GA", 0x26, 1, 0xB0), /* Gabon */
+	COUNTRY_CHPLAN_ENT("GB", 0x26, 1, 0xFB), /* Great Britain (United Kingdom; England) */
+	COUNTRY_CHPLAN_ENT("GD", 0x34, 1, 0xB0), /* Grenada */
+	COUNTRY_CHPLAN_ENT("GE", 0x26, 1, 0x00), /* Georgia */
+	COUNTRY_CHPLAN_ENT("GF", 0x26, 1, 0x80), /* French Guiana */
+	COUNTRY_CHPLAN_ENT("GG", 0x26, 1, 0x00), /* Guernsey (UK) */
+	COUNTRY_CHPLAN_ENT("GH", 0x26, 1, 0xF1), /* Ghana */
+	COUNTRY_CHPLAN_ENT("GI", 0x26, 1, 0x00), /* Gibraltar (UK) */
+	COUNTRY_CHPLAN_ENT("GL", 0x26, 1, 0x00), /* Greenland (Denmark) */
+	COUNTRY_CHPLAN_ENT("GM", 0x26, 1, 0xB0), /* Gambia */
+	COUNTRY_CHPLAN_ENT("GN", 0x26, 1, 0x10), /* Guinea */
+	COUNTRY_CHPLAN_ENT("GP", 0x26, 1, 0x00), /* Guadeloupe (France) */
+	COUNTRY_CHPLAN_ENT("GQ", 0x26, 1, 0xB0), /* Equatorial Guinea */
+	COUNTRY_CHPLAN_ENT("GR", 0x26, 1, 0xFB), /* Greece */
+	COUNTRY_CHPLAN_ENT("GS", 0x26, 1, 0x00), /* South Georgia and the Sandwich Islands (UK) */
+	COUNTRY_CHPLAN_ENT("GT", 0x34, 1, 0xF1), /* Guatemala */
+	COUNTRY_CHPLAN_ENT("GU", 0x34, 1, 0x00), /* Guam (USA) */
+	COUNTRY_CHPLAN_ENT("GW", 0x26, 1, 0xB0), /* Guinea-Bissau */
+	COUNTRY_CHPLAN_ENT("GY", 0x44, 1, 0x00), /* Guyana */
+	COUNTRY_CHPLAN_ENT("HK", 0x26, 1, 0xFB), /* Hong Kong */
+	COUNTRY_CHPLAN_ENT("HM", 0x45, 1, 0x00), /* Heard and McDonald Islands (Australia) */
+	COUNTRY_CHPLAN_ENT("HN", 0x32, 1, 0xF1), /* Honduras */
+	COUNTRY_CHPLAN_ENT("HR", 0x26, 1, 0xF9), /* Croatia */
+	COUNTRY_CHPLAN_ENT("HT", 0x34, 1, 0x50), /* Haiti */
+	COUNTRY_CHPLAN_ENT("HU", 0x26, 1, 0xFB), /* Hungary */
+	COUNTRY_CHPLAN_ENT("ID", 0x54, 0, 0xF3), /* Indonesia */
+	COUNTRY_CHPLAN_ENT("IE", 0x26, 1, 0xFB), /* Ireland */
+	COUNTRY_CHPLAN_ENT("IL", 0x47, 1, 0xF1), /* Israel */
+	COUNTRY_CHPLAN_ENT("IM", 0x26, 1, 0x00), /* Isle of Man (UK) */
+	COUNTRY_CHPLAN_ENT("IN", 0x47, 1, 0xF1), /* India */
+	COUNTRY_CHPLAN_ENT("IQ", 0x26, 1, 0x00), /* Iraq */
+	COUNTRY_CHPLAN_ENT("IR", 0x26, 0, 0x00), /* Iran */
+	COUNTRY_CHPLAN_ENT("IS", 0x26, 1, 0xFB), /* Iceland */
+	COUNTRY_CHPLAN_ENT("IT", 0x26, 1, 0xFB), /* Italy */
+	COUNTRY_CHPLAN_ENT("JE", 0x26, 1, 0x00), /* Jersey (UK) */
+	COUNTRY_CHPLAN_ENT("JM", 0x51, 1, 0xF1), /* Jamaica */
+	COUNTRY_CHPLAN_ENT("JO", 0x49, 1, 0xFB), /* Jordan */
+	COUNTRY_CHPLAN_ENT("JP", 0x27, 1, 0xFF), /* Japan- Telec */
+	COUNTRY_CHPLAN_ENT("KE", 0x47, 1, 0xF9), /* Kenya */
+	COUNTRY_CHPLAN_ENT("KG", 0x26, 1, 0xF1), /* Kyrgyzstan */
+	COUNTRY_CHPLAN_ENT("KH", 0x26, 1, 0xF1), /* Cambodia */
+	COUNTRY_CHPLAN_ENT("KI", 0x26, 1, 0x00), /* Kiribati */
+	COUNTRY_CHPLAN_ENT("KN", 0x34, 1, 0x00), /* Saint Kitts and Nevis */
+	COUNTRY_CHPLAN_ENT("KR", 0x28, 1, 0xFB), /* South Korea */
+	COUNTRY_CHPLAN_ENT("KW", 0x47, 1, 0xFB), /* Kuwait */
+	COUNTRY_CHPLAN_ENT("KY", 0x34, 1, 0x00), /* Cayman Islands (UK) */
+	COUNTRY_CHPLAN_ENT("KZ", 0x26, 1, 0x00), /* Kazakhstan */
+	COUNTRY_CHPLAN_ENT("LA", 0x26, 1, 0x00), /* Laos */
+	COUNTRY_CHPLAN_ENT("LB", 0x26, 1, 0xF1), /* Lebanon */
+	COUNTRY_CHPLAN_ENT("LC", 0x34, 1, 0x00), /* Saint Lucia */
+	COUNTRY_CHPLAN_ENT("LI", 0x26, 1, 0xFB), /* Liechtenstein */
+	COUNTRY_CHPLAN_ENT("LK", 0x26, 1, 0xF1), /* Sri Lanka */
+	COUNTRY_CHPLAN_ENT("LR", 0x26, 1, 0xB0), /* Liberia */
+	COUNTRY_CHPLAN_ENT("LS", 0x26, 1, 0xF1), /* Lesotho */
+	COUNTRY_CHPLAN_ENT("LT", 0x26, 1, 0xFB), /* Lithuania */
+	COUNTRY_CHPLAN_ENT("LU", 0x26, 1, 0xFB), /* Luxembourg */
+	COUNTRY_CHPLAN_ENT("LV", 0x26, 1, 0xFB), /* Latvia */
+	COUNTRY_CHPLAN_ENT("LY", 0x26, 1, 0x00), /* Libya */
+	COUNTRY_CHPLAN_ENT("MA", 0x47, 1, 0xF1), /* Morocco */
+	COUNTRY_CHPLAN_ENT("MC", 0x26, 1, 0xFB), /* Monaco */
+	COUNTRY_CHPLAN_ENT("MD", 0x26, 1, 0xF1), /* Moldova */
+	COUNTRY_CHPLAN_ENT("ME", 0x26, 1, 0xF1), /* Montenegro */
+	COUNTRY_CHPLAN_ENT("MF", 0x34, 1, 0x00), /* Saint Martin */
+	COUNTRY_CHPLAN_ENT("MG", 0x26, 1, 0x20), /* Madagascar */
+	COUNTRY_CHPLAN_ENT("MH", 0x34, 1, 0x00), /* Marshall Islands (USA) */
+	COUNTRY_CHPLAN_ENT("MK", 0x26, 1, 0xF1), /* Republic of Macedonia (FYROM) */
+	COUNTRY_CHPLAN_ENT("ML", 0x26, 1, 0xB0), /* Mali */
+	COUNTRY_CHPLAN_ENT("MM", 0x26, 1, 0x00), /* Burma (Myanmar) */
+	COUNTRY_CHPLAN_ENT("MN", 0x26, 1, 0x00), /* Mongolia */
+	COUNTRY_CHPLAN_ENT("MO", 0x26, 1, 0x00), /* Macau */
+	COUNTRY_CHPLAN_ENT("MP", 0x34, 1, 0x00), /* Northern Mariana Islands (USA) */
+	COUNTRY_CHPLAN_ENT("MQ", 0x26, 1, 0x40), /* Martinique (France) */
+	COUNTRY_CHPLAN_ENT("MR", 0x26, 1, 0xA0), /* Mauritania */
+	COUNTRY_CHPLAN_ENT("MS", 0x26, 1, 0x00), /* Montserrat (UK) */
+	COUNTRY_CHPLAN_ENT("MT", 0x26, 1, 0xFB), /* Malta */
+	COUNTRY_CHPLAN_ENT("MU", 0x26, 1, 0xB0), /* Mauritius */
+	COUNTRY_CHPLAN_ENT("MV", 0x26, 1, 0x00), /* Maldives */
+	COUNTRY_CHPLAN_ENT("MW", 0x26, 1, 0xB0), /* Malawi */
+	COUNTRY_CHPLAN_ENT("MX", 0x34, 1, 0xF1), /* Mexico */
+	COUNTRY_CHPLAN_ENT("MY", 0x47, 1, 0xF1), /* Malaysia */
+	COUNTRY_CHPLAN_ENT("MZ", 0x26, 1, 0xF1), /* Mozambique */
+	COUNTRY_CHPLAN_ENT("NA", 0x26, 0, 0x00), /* Namibia */
+	COUNTRY_CHPLAN_ENT("NC", 0x26, 1, 0x00), /* New Caledonia */
+	COUNTRY_CHPLAN_ENT("NE", 0x26, 1, 0xB0), /* Niger */
+	COUNTRY_CHPLAN_ENT("NF", 0x45, 1, 0x00), /* Norfolk Island (Australia) */
+	COUNTRY_CHPLAN_ENT("NG", 0x50, 1, 0xF9), /* Nigeria */
+	COUNTRY_CHPLAN_ENT("NI", 0x34, 1, 0xF1), /* Nicaragua */
+	COUNTRY_CHPLAN_ENT("NL", 0x26, 1, 0xFB), /* Netherlands */
+	COUNTRY_CHPLAN_ENT("NO", 0x26, 1, 0xFB), /* Norway */
+	COUNTRY_CHPLAN_ENT("NP", 0x47, 1, 0xF0), /* Nepal */
+	COUNTRY_CHPLAN_ENT("NR", 0x26, 1, 0x00), /* Nauru */
+	COUNTRY_CHPLAN_ENT("NU", 0x45, 1, 0x00), /* Niue */
+	COUNTRY_CHPLAN_ENT("NZ", 0x45, 1, 0xFB), /* New Zealand */
+	COUNTRY_CHPLAN_ENT("OM", 0x26, 1, 0xF9), /* Oman */
+	COUNTRY_CHPLAN_ENT("PA", 0x34, 1, 0xF1), /* Panama */
+	COUNTRY_CHPLAN_ENT("PE", 0x34, 1, 0xF1), /* Peru */
+	COUNTRY_CHPLAN_ENT("PF", 0x26, 1, 0x00), /* French Polynesia (France) */
+	COUNTRY_CHPLAN_ENT("PG", 0x26, 1, 0xF1), /* Papua New Guinea */
+	COUNTRY_CHPLAN_ENT("PH", 0x26, 1, 0xF1), /* Philippines */
+	COUNTRY_CHPLAN_ENT("PK", 0x51, 1, 0xF1), /* Pakistan */
+	COUNTRY_CHPLAN_ENT("PL", 0x26, 1, 0xFB), /* Poland */
+	COUNTRY_CHPLAN_ENT("PM", 0x26, 1, 0x00), /* Saint Pierre and Miquelon (France) */
+	COUNTRY_CHPLAN_ENT("PR", 0x34, 1, 0xF1), /* Puerto Rico */
+	COUNTRY_CHPLAN_ENT("PT", 0x26, 1, 0xFB), /* Portugal */
+	COUNTRY_CHPLAN_ENT("PW", 0x34, 1, 0x00), /* Palau */
+	COUNTRY_CHPLAN_ENT("PY", 0x34, 1, 0xF1), /* Paraguay */
+	COUNTRY_CHPLAN_ENT("QA", 0x51, 1, 0xF9), /* Qatar */
+	COUNTRY_CHPLAN_ENT("RE", 0x26, 1, 0x00), /* Reunion (France) */
+	COUNTRY_CHPLAN_ENT("RO", 0x26, 1, 0xF1), /* Romania */
+	COUNTRY_CHPLAN_ENT("RS", 0x26, 1, 0xF1), /* Serbia, Kosovo */
+	COUNTRY_CHPLAN_ENT("RU", 0x59, 1, 0xFB), /* Russia(fac/gost), Kaliningrad */
+	COUNTRY_CHPLAN_ENT("RW", 0x26, 1, 0xB0), /* Rwanda */
+	COUNTRY_CHPLAN_ENT("SA", 0x26, 1, 0xFB), /* Saudi Arabia */
+	COUNTRY_CHPLAN_ENT("SB", 0x26, 1, 0x00), /* Solomon Islands */
+	COUNTRY_CHPLAN_ENT("SC", 0x34, 1, 0x90), /* Seychelles */
+	COUNTRY_CHPLAN_ENT("SE", 0x26, 1, 0xFB), /* Sweden */
+	COUNTRY_CHPLAN_ENT("SG", 0x47, 1, 0xFB), /* Singapore */
+	COUNTRY_CHPLAN_ENT("SH", 0x26, 1, 0x00), /* Saint Helena (UK) */
+	COUNTRY_CHPLAN_ENT("SI", 0x26, 1, 0xFB), /* Slovenia */
+	COUNTRY_CHPLAN_ENT("SJ", 0x26, 1, 0x00), /* Svalbard (Norway) */
+	COUNTRY_CHPLAN_ENT("SK", 0x26, 1, 0xFB), /* Slovakia */
+	COUNTRY_CHPLAN_ENT("SL", 0x26, 1, 0xB0), /* Sierra Leone */
+	COUNTRY_CHPLAN_ENT("SM", 0x26, 1, 0x00), /* San Marino */
+	COUNTRY_CHPLAN_ENT("SN", 0x26, 1, 0xF1), /* Senegal */
+	COUNTRY_CHPLAN_ENT("SO", 0x26, 1, 0x00), /* Somalia */
+	COUNTRY_CHPLAN_ENT("SR", 0x34, 1, 0x00), /* Suriname */
+	COUNTRY_CHPLAN_ENT("ST", 0x34, 1, 0x80), /* Sao Tome and Principe */
+	COUNTRY_CHPLAN_ENT("SV", 0x30, 1, 0xF1), /* El Salvador */
+	COUNTRY_CHPLAN_ENT("SX", 0x34, 1, 0x00), /* Sint Marteen */
+	COUNTRY_CHPLAN_ENT("SZ", 0x26, 1, 0x20), /* Swaziland */
+	COUNTRY_CHPLAN_ENT("TC", 0x26, 1, 0x00), /* Turks and Caicos Islands (UK) */
+	COUNTRY_CHPLAN_ENT("TD", 0x26, 1, 0xB0), /* Chad */
+	COUNTRY_CHPLAN_ENT("TF", 0x26, 1, 0x80), /* French Southern and Antarctic Lands (FR Southern Territories) */
+	COUNTRY_CHPLAN_ENT("TG", 0x26, 1, 0xB0), /* Togo */
+	COUNTRY_CHPLAN_ENT("TH", 0x26, 1, 0xF1), /* Thailand */
+	COUNTRY_CHPLAN_ENT("TJ", 0x26, 1, 0x40), /* Tajikistan */
+	COUNTRY_CHPLAN_ENT("TK", 0x45, 1, 0x00), /* Tokelau */
+	COUNTRY_CHPLAN_ENT("TM", 0x26, 1, 0x00), /* Turkmenistan */
+	COUNTRY_CHPLAN_ENT("TN", 0x47, 1, 0xF1), /* Tunisia */
+	COUNTRY_CHPLAN_ENT("TO", 0x26, 1, 0x00), /* Tonga */
+	COUNTRY_CHPLAN_ENT("TR", 0x26, 1, 0xF1), /* Turkey, Northern Cyprus */
+	COUNTRY_CHPLAN_ENT("TT", 0x42, 1, 0xF1), /* Trinidad & Tobago */
+	COUNTRY_CHPLAN_ENT("TW", 0x39, 1, 0xFF), /* Taiwan */
+	COUNTRY_CHPLAN_ENT("TZ", 0x26, 1, 0xF0), /* Tanzania */
+	COUNTRY_CHPLAN_ENT("UA", 0x26, 1, 0xFB), /* Ukraine */
+	COUNTRY_CHPLAN_ENT("UG", 0x26, 1, 0xF1), /* Uganda */
+	COUNTRY_CHPLAN_ENT("US", 0x34, 1, 0xFF), /* United States of America (USA) */
+	COUNTRY_CHPLAN_ENT("UY", 0x34, 1, 0xF1), /* Uruguay */
+	COUNTRY_CHPLAN_ENT("UZ", 0x47, 1, 0xF0), /* Uzbekistan */
+	COUNTRY_CHPLAN_ENT("VA", 0x26, 1, 0x00), /* Holy See (Vatican City) */
+	COUNTRY_CHPLAN_ENT("VC", 0x34, 1, 0x10), /* Saint Vincent and the Grenadines */
+	COUNTRY_CHPLAN_ENT("VE", 0x30, 1, 0xF1), /* Venezuela */
+	COUNTRY_CHPLAN_ENT("VI", 0x34, 1, 0x00), /* United States Virgin Islands (USA) */
+	COUNTRY_CHPLAN_ENT("VN", 0x26, 1, 0xF1), /* Vietnam */
+	COUNTRY_CHPLAN_ENT("VU", 0x26, 1, 0x00), /* Vanuatu */
+	COUNTRY_CHPLAN_ENT("WF", 0x26, 1, 0x00), /* Wallis and Futuna (France) */
+	COUNTRY_CHPLAN_ENT("WS", 0x34, 1, 0x00), /* Samoa */
+	COUNTRY_CHPLAN_ENT("YE", 0x26, 1, 0x40), /* Yemen */
+	COUNTRY_CHPLAN_ENT("YT", 0x26, 1, 0x80), /* Mayotte (France) */
+	COUNTRY_CHPLAN_ENT("ZA", 0x26, 1, 0xF1), /* South Africa */
+	COUNTRY_CHPLAN_ENT("ZM", 0x26, 1, 0xB0), /* Zambia */
+	COUNTRY_CHPLAN_ENT("ZW", 0x26, 1, 0xF1), /* Zimbabwe */
+};
+
+u16 const country_chplan_map_sz = sizeof(country_chplan_map) / sizeof(struct country_chplan);
+
+/*
+* rtw_get_chplan_from_country -
+* @country_code: string of country code
+*
+* Return pointer of struct country_chplan entry or NULL when unsupported country_code is given
+*/
+const struct country_chplan *rtw_get_chplan_from_country(const char *country_code) {
+	const struct country_chplan *ent = NULL;
+	const struct country_chplan *map = NULL;
+	u16 map_sz = 0;
+	char code[2];
+	int i;
+
+	code[0] = alpha_to_upper(country_code[0]);
+	code[1] = alpha_to_upper(country_code[1]);
+
+#if !defined(CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP) && RTW_DEF_MODULE_REGULATORY_CERT
+	ent = rtw_def_module_get_chplan_from_country(code);
+	if (ent != NULL)
+		goto exit;
+#endif
+
+#ifdef CONFIG_CUSTOMIZED_COUNTRY_CHPLAN_MAP
+	map = CUSTOMIZED_country_chplan_map;
+	map_sz = CUSTOMIZED_country_chplan_map_sz;
+#else
+	map = country_chplan_map;
+	map_sz = country_chplan_map_sz;
+#endif
+
+	for (i = 0; i < map_sz; i++) {
+		if (strncmp(code, map[i].alpha2, 2) == 0) {
+			ent = &map[i];
+			break;
+		}
+	}
+
+exit:
+#if RTW_DEF_MODULE_REGULATORY_CERT
+	if (ent && !(COUNTRY_CHPLAN_DEF_MODULE_FALGS(ent) & RTW_DEF_MODULE_REGULATORY_CERT))
+		ent = NULL;
+#endif
+
+	return ent;
+}
+
+int rtw_ch_to_bb_gain_sel(int ch) {
+	int sel = -1;
+
+	if (ch >= 1 && ch <= 14)
+		sel = BB_GAIN_2G;
+#ifdef CONFIG_NL80211_BAND_5GHZ
+	else if (ch >= 36 && ch < 48)
+		sel = BB_GAIN_5GLB1;
+	else if (ch >= 52 && ch <= 64)
+		sel = BB_GAIN_5GLB2;
+	else if (ch >= 100 && ch <= 120)
+		sel = BB_GAIN_5GMB1;
+	else if (ch >= 124 && ch <= 144)
+		sel = BB_GAIN_5GMB2;
+	else if (ch >= 149 && ch <= 177)
+		sel = BB_GAIN_5GHB;
+#endif
+
+	return sel;
+}
+
+s8 rtw_rf_get_kfree_tx_gain_offset(_adapter *padapter, u8 path, u8 ch) {
+	s8 kfree_offset = 0;
+
+#ifdef CONFIG_RF_POWER_TRIM
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(padapter);
+	struct kfree_data_t *kfree_data = GET_KFREE_DATA(padapter);
+	s8 bb_gain_sel = rtw_ch_to_bb_gain_sel(ch);
+
+	if (bb_gain_sel < BB_GAIN_2G || bb_gain_sel >= BB_GAIN_NUM) {
+		rtw_warn_on(1);
+		goto exit;
+	}
+
+	if (kfree_data->flag & KFREE_FLAG_ON) {
+		kfree_offset = kfree_data->bb_gain[bb_gain_sel][path];
+		if (1)
+			RTW_INFO("%s path:%u, ch:%u, bb_gain_sel:%d, kfree_offset:%d\n"
+			         , __func__, path, ch, bb_gain_sel, kfree_offset);
+	}
+exit:
+#endif /* CONFIG_RF_POWER_TRIM */
+	return kfree_offset;
+}
+
+void rtw_rf_set_tx_gain_offset(_adapter *adapter, u8 path, s8 offset) {
+	u8 write_value;
+
+	RTW_INFO("kfree gain_offset 0x55:0x%x ", rtw_hal_read_rfreg(adapter, path, 0x55, 0xffffffff));
+	switch (rtw_get_chip_type(adapter)) {
+#ifdef CONFIG_RTL8723D
+	case RTL8723D:
+		write_value = RF_TX_GAIN_OFFSET_8723D(offset);
+		rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value);
+		break;
+#endif /* CONFIG_RTL8723D */
+#ifdef CONFIG_RTL8703B
+	case RTL8703B:
+		write_value = RF_TX_GAIN_OFFSET_8703B(offset);
+		rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value);
+		break;
+#endif /* CONFIG_RTL8703B */
+#ifdef CONFIG_RTL8188F
+	case RTL8188F:
+		write_value = RF_TX_GAIN_OFFSET_8188F(offset);
+		rtw_hal_write_rfreg(adapter, path, 0x55, 0x0fc000, write_value);
+		break;
+#endif /* CONFIG_RTL8188F */
+#ifdef CONFIG_RTL8192E
+	case RTL8192E:
+		write_value = RF_TX_GAIN_OFFSET_8192E(offset);
+		rtw_hal_write_rfreg(adapter, path, 0x55, 0x0f8000, write_value);
+		break;
+#endif /* CONFIG_RTL8188F */
+
+#ifdef CONFIG_RTL8821A
+	case RTL8821:
+		write_value = RF_TX_GAIN_OFFSET_8821A(offset);
+		rtw_hal_write_rfreg(adapter, path, 0x55, 0x0f8000, write_value);
+		break;
+#endif /* CONFIG_RTL8821A */
+#if defined(CONFIG_RTL8814A) || defined(CONFIG_RTL8822B) || defined(CONFIG_RTL8821C)
+	case RTL8814A:
+	case RTL8822B:
+	case RTL8821C:
+		RTW_INFO("\nkfree by PhyDM on the sw CH. path %d\n", path);
+		break;
+#endif /* CONFIG_RTL8814A || CONFIG_RTL8822B || CONFIG_RTL8821C */
+
+	default:
+		rtw_warn_on(1);
+		break;
+	}
+
+	RTW_INFO(" after :0x%x\n", rtw_hal_read_rfreg(adapter, path, 0x55, 0xffffffff));
+}
+
+void rtw_rf_apply_tx_gain_offset(_adapter *adapter, u8 ch) {
+	HAL_DATA_TYPE *hal_data = GET_HAL_DATA(adapter);
+	s8 kfree_offset = 0;
+	s8 tx_pwr_track_offset = 0; /* TODO: 8814A should consider tx pwr track when setting tx gain offset */
+	s8 total_offset;
+	int i;
+
+	for (i = 0; i < hal_data->NumTotalRFPath; i++) {
+		kfree_offset = rtw_rf_get_kfree_tx_gain_offset(adapter, i, ch);
+		total_offset = kfree_offset + tx_pwr_track_offset;
+		rtw_rf_set_tx_gain_offset(adapter, i, total_offset);
+	}
+}
+
+bool rtw_is_dfs_range(u32 hi, u32 lo) {
+	return rtw_is_range_overlap(hi, lo, 5720 + 10, 5260 - 10) ? _TRUE : _FALSE;
+}
+
+bool rtw_is_dfs_ch(u8 ch, u8 bw, u8 offset) {
+	u32 hi, lo;
+
+	if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
+		return _FALSE;
+
+	return rtw_is_dfs_range(hi, lo) ? _TRUE : _FALSE;
+}
+
+bool rtw_is_long_cac_range(u32 hi, u32 lo, u8 dfs_region) {
+	return (dfs_region == PHYDM_DFS_DOMAIN_ETSI && rtw_is_range_overlap(hi, lo, 5660 + 10, 5600 - 10)) ? _TRUE : _FALSE;
+}
+
+bool rtw_is_long_cac_ch(u8 ch, u8 bw, u8 offset, u8 dfs_region) {
+	u32 hi, lo;
+
+	if (rtw_chbw_to_freq_range(ch, bw, offset, &hi, &lo) == _FALSE)
+		return _FALSE;
+
+	return rtw_is_long_cac_range(hi, lo, dfs_region) ? _TRUE : _FALSE;
+}

core/rtw_sdio.c

@@ -0,0 +1,100 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ ******************************************************************************/
+#define _RTW_SDIO_C_
+
+#include <drv_types.h>		/* struct dvobj_priv and etc. */
+#include <drv_types_sdio.h>	/* RTW_SDIO_ADDR_CMD52_GEN */
+
+/*
+ * Description:
+ *	Use SDIO cmd52 or cmd53 to read/write data
+ *
+ * Parameters:
+ *	d	pointer of device object(struct dvobj_priv)
+ *	addr	SDIO address, 17 bits
+ *	buf	buffer for I/O
+ *	len	length
+ *	write	0:read, 1:write
+ *	cmd52	0:cmd52, 1:cmd53
+ *
+ * Return:
+ *	_SUCCESS	I/O ok.
+ *	_FAIL		I/O fail.
+ */
+static u8 sdio_io(struct dvobj_priv *d, u32 addr, void *buf, size_t len, u8 write, u8 cmd52)
+{
+	int err;
+
+
+	if (cmd52)
+		addr = RTW_SDIO_ADDR_CMD52_GEN(addr);
+
+	if (write)
+		err = d->intf_ops->write(d, addr, buf, len, 0);
+	else
+		err = d->intf_ops->read(d, addr, buf, len, 0);
+	if (err) {
+		RTW_INFO("%s: [ERROR] %s FAIL! error(%d)\n",
+			 __FUNCTION__, write ? "write" : "read", err);
+		return _FAIL;
+	}
+
+	return _SUCCESS;
+}
+
+u8 rtw_sdio_read_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
+{
+	return sdio_io(d, addr, buf, len, 0, 1);
+}
+
+u8 rtw_sdio_read_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
+{
+	return sdio_io(d, addr, buf, len, 0, 0);
+}
+
+u8 rtw_sdio_write_cmd52(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
+{
+	return sdio_io(d, addr, buf, len, 1, 1);
+}
+
+u8 rtw_sdio_write_cmd53(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
+{
+	return sdio_io(d, addr, buf, len, 1, 0);
+}
+
+u8 rtw_sdio_f0_read(struct dvobj_priv *d, u32 addr, void *buf, size_t len)
+{
+	int err;
+	u8 ret;
+
+	_func_enter_;
+
+	ret = _SUCCESS;
+	addr = RTW_SDIO_ADDR_F0_GEN(addr);
+
+	err = d->intf_ops->read(d, addr, buf, len, 0);
+	if (err) {
+		RTW_INFO("%s: [ERROR] Read f0 register FAIL!\n", __FUNCTION__);
+		ret = _FAIL;
+	}
+
+	_func_exit_;
+
+	return ret;
+}

core/rtw_sreset.c

@@ -0,0 +1,346 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include <drv_types.h>
+#include <hal_data.h>
+#include <rtw_sreset.h>
+
+void sreset_init_value(_adapter *padapter)
+{
+#if defined(DBG_CONFIG_ERROR_DETECT)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+
+	_rtw_mutex_init(&psrtpriv->silentreset_mutex);
+	psrtpriv->silent_reset_inprogress = _FALSE;
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+	psrtpriv->last_tx_time = 0;
+	psrtpriv->last_tx_complete_time = 0;
+#endif
+}
+void sreset_reset_value(_adapter *padapter)
+{
+#if defined(DBG_CONFIG_ERROR_DETECT)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+	psrtpriv->last_tx_time = 0;
+	psrtpriv->last_tx_complete_time = 0;
+#endif
+}
+
+u8 sreset_get_wifi_status(_adapter *padapter)
+{
+#if defined(DBG_CONFIG_ERROR_DETECT)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+
+	u8 status = WIFI_STATUS_SUCCESS;
+	u32 val32 = 0;
+	_irqL irqL;
+	if (psrtpriv->silent_reset_inprogress == _TRUE)
+		return status;
+	val32 = rtw_read32(padapter, REG_TXDMA_STATUS);
+	if (val32 == 0xeaeaeaea)
+		psrtpriv->Wifi_Error_Status = WIFI_IF_NOT_EXIST;
+	else if (val32 != 0) {
+		RTW_INFO("txdmastatu(%x)\n", val32);
+		psrtpriv->Wifi_Error_Status = WIFI_MAC_TXDMA_ERROR;
+	}
+
+	if (WIFI_STATUS_SUCCESS != psrtpriv->Wifi_Error_Status) {
+		RTW_INFO("==>%s error_status(0x%x)\n", __FUNCTION__, psrtpriv->Wifi_Error_Status);
+		status = (psrtpriv->Wifi_Error_Status & (~(USB_READ_PORT_FAIL | USB_WRITE_PORT_FAIL)));
+	}
+	RTW_INFO("==> %s wifi_status(0x%x)\n", __FUNCTION__, status);
+
+	/* status restore */
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+
+	return status;
+#else
+	return WIFI_STATUS_SUCCESS;
+#endif
+}
+
+void sreset_set_wifi_error_status(_adapter *padapter, u32 status)
+{
+#if defined(DBG_CONFIG_ERROR_DETECT)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	pHalData->srestpriv.Wifi_Error_Status = status;
+#endif
+}
+
+void sreset_set_trigger_point(_adapter *padapter, s32 tgp)
+{
+#if defined(DBG_CONFIG_ERROR_DETECT)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	pHalData->srestpriv.dbg_trigger_point = tgp;
+#endif
+}
+
+bool sreset_inprogress(_adapter *padapter)
+{
+#if defined(DBG_CONFIG_ERROR_RESET)
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	return pHalData->srestpriv.silent_reset_inprogress;
+#else
+	return _FALSE;
+#endif
+}
+
+void sreset_restore_security_station(_adapter *padapter)
+{
+	u8 EntryId = 0;
+	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
+	struct sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *psta;
+	struct security_priv *psecuritypriv = &(padapter->securitypriv);
+	struct mlme_ext_info	*pmlmeinfo = &padapter->mlmeextpriv.mlmext_info;
+
+	{
+		u8 val8;
+
+		if (pmlmeinfo->auth_algo == dot11AuthAlgrthm_8021X) {
+			val8 = 0xcc;
+#ifdef CONFIG_WAPI_SUPPORT
+		} else if (padapter->wapiInfo.bWapiEnable && pmlmeinfo->auth_algo == dot11AuthAlgrthm_WAPI) {
+			/* Disable TxUseDefaultKey, RxUseDefaultKey, RxBroadcastUseDefaultKey. */
+			val8 = 0x4c;
+#endif
+		} else
+			val8 = 0xcf;
+		rtw_hal_set_hwreg(padapter, HW_VAR_SEC_CFG, (u8 *)(&val8));
+	}
+
+#if 0
+	if ((padapter->securitypriv.dot11PrivacyAlgrthm == _WEP40_) ||
+	    (padapter->securitypriv.dot11PrivacyAlgrthm == _WEP104_)) {
+
+		for (EntryId = 0; EntryId < 4; EntryId++) {
+			if (EntryId == psecuritypriv->dot11PrivacyKeyIndex)
+				rtw_set_key(padapter, &padapter->securitypriv, EntryId, 1, _FALSE);
+			else
+				rtw_set_key(padapter, &padapter->securitypriv, EntryId, 0, _FALSE);
+		}
+
+	} else
+#endif
+		if ((padapter->securitypriv.dot11PrivacyAlgrthm == _TKIP_) ||
+		    (padapter->securitypriv.dot11PrivacyAlgrthm == _AES_)) {
+			psta = rtw_get_stainfo(pstapriv, get_bssid(mlmepriv));
+			if (psta == NULL) {
+				/* DEBUG_ERR( ("Set wpa_set_encryption: Obtain Sta_info fail\n")); */
+			} else {
+				/* pairwise key */
+				rtw_setstakey_cmd(padapter, psta, UNICAST_KEY, _FALSE);
+				/* group key */
+				rtw_set_key(padapter, &padapter->securitypriv, padapter->securitypriv.dot118021XGrpKeyid, 0, _FALSE);
+			}
+		}
+}
+
+void sreset_restore_network_station(_adapter *padapter)
+{
+	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8 doiqk = _FALSE;
+
+#if 0
+	{
+		/* ======================================================= */
+		/* reset related register of Beacon control */
+
+		/* set MSR to nolink */
+		Set_MSR(padapter, _HW_STATE_NOLINK_);
+		/* reject all data frame */
+		rtw_write16(padapter, REG_RXFLTMAP2, 0x00);
+		/* reset TSF */
+		rtw_write8(padapter, REG_DUAL_TSF_RST, (BIT(0) | BIT(1)));
+
+		/* disable update TSF */
+		SetBcnCtrlReg(padapter, BIT(4), 0);
+
+		/* ======================================================= */
+	}
+#endif
+
+	rtw_setopmode_cmd(padapter, Ndis802_11Infrastructure, _FALSE);
+
+	{
+		u8 threshold;
+#ifdef CONFIG_USB_HCI
+		/* TH=1 => means that invalidate usb rx aggregation */
+		/* TH=0 => means that validate usb rx aggregation, use init value. */
+		if (mlmepriv->htpriv.ht_option) {
+			if (padapter->registrypriv.wifi_spec == 1)
+				threshold = 1;
+			else
+				threshold = 0;
+			rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
+		} else {
+			threshold = 1;
+			rtw_hal_set_hwreg(padapter, HW_VAR_RXDMA_AGG_PG_TH, (u8 *)(&threshold));
+		}
+#endif
+	}
+
+	doiqk = _TRUE;
+	rtw_hal_set_hwreg(padapter, HW_VAR_DO_IQK , &doiqk);
+
+	set_channel_bwmode(padapter, pmlmeext->cur_channel, pmlmeext->cur_ch_offset, pmlmeext->cur_bwmode);
+
+	doiqk = _FALSE;
+	rtw_hal_set_hwreg(padapter , HW_VAR_DO_IQK , &doiqk);
+	/* disable dynamic functions, such as high power, DIG */
+	/*rtw_phydm_func_disable_all(padapter);*/
+
+	rtw_hal_set_hwreg(padapter, HW_VAR_BSSID, pmlmeinfo->network.MacAddress);
+
+	{
+		u8	join_type = 0;
+		rtw_hal_set_hwreg(padapter, HW_VAR_MLME_JOIN, (u8 *)(&join_type));
+	}
+
+	Set_MSR(padapter, (pmlmeinfo->state & 0x3));
+
+	mlmeext_joinbss_event_callback(padapter, 1);
+	/* restore Sequence No. */
+	rtw_hal_set_hwreg(padapter, HW_VAR_RESTORE_HW_SEQ, 0);
+
+	sreset_restore_security_station(padapter);
+}
+
+
+void sreset_restore_network_status(_adapter *padapter)
+{
+	struct mlme_priv *mlmepriv = &padapter->mlmepriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+
+	if (check_fwstate(mlmepriv, WIFI_STATION_STATE)) {
+		RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_STATION_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
+		sreset_restore_network_station(padapter);
+	} else if (check_fwstate(mlmepriv, WIFI_AP_STATE)) {
+		RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_AP_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
+		rtw_ap_restore_network(padapter);
+	} else if (check_fwstate(mlmepriv, WIFI_ADHOC_STATE))
+		RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - WIFI_ADHOC_STATE\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
+	else
+		RTW_INFO(FUNC_ADPT_FMT" fwstate:0x%08x - ???\n", FUNC_ADPT_ARG(padapter), get_fwstate(mlmepriv));
+}
+
+void sreset_stop_adapter(_adapter *padapter)
+{
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+
+	if (padapter == NULL)
+		return;
+
+	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
+
+	rtw_netif_stop_queue(padapter->pnetdev);
+
+	rtw_cancel_all_timer(padapter);
+
+	/* TODO: OS and HCI independent */
+#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI)
+	tasklet_kill(&pxmitpriv->xmit_tasklet);
+#endif
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_SURVEY))
+		rtw_scan_abort(padapter);
+
+	if (check_fwstate(pmlmepriv, _FW_UNDER_LINKING)) {
+		rtw_set_to_roam(padapter, 0);
+		_rtw_join_timeout_handler(padapter);
+	}
+
+}
+
+void sreset_start_adapter(_adapter *padapter)
+{
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+
+	if (padapter == NULL)
+		return;
+
+	RTW_INFO(FUNC_ADPT_FMT"\n", FUNC_ADPT_ARG(padapter));
+
+	if (check_fwstate(pmlmepriv, _FW_LINKED))
+		sreset_restore_network_status(padapter);
+
+	/* TODO: OS and HCI independent */
+#if defined(PLATFORM_LINUX) && defined(CONFIG_USB_HCI)
+	tasklet_hi_schedule(&pxmitpriv->xmit_tasklet);
+#endif
+
+	if (is_primary_adapter(padapter))
+		_set_timer(&padapter->mlmepriv.dynamic_chk_timer, 2000);
+
+	rtw_netif_wake_queue(padapter->pnetdev);
+}
+
+void sreset_reset(_adapter *padapter)
+{
+#ifdef DBG_CONFIG_ERROR_RESET
+	HAL_DATA_TYPE	*pHalData = GET_HAL_DATA(padapter);
+	struct sreset_priv *psrtpriv = &pHalData->srestpriv;
+	struct pwrctrl_priv *pwrpriv = adapter_to_pwrctl(padapter);
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	_irqL irqL;
+	u32 start = rtw_get_current_time();
+	struct dvobj_priv *psdpriv = padapter->dvobj;
+	struct debug_priv *pdbgpriv = &psdpriv->drv_dbg;
+
+	RTW_INFO("%s\n", __FUNCTION__);
+
+	psrtpriv->Wifi_Error_Status = WIFI_STATUS_SUCCESS;
+
+
+#ifdef CONFIG_LPS
+	rtw_set_ps_mode(padapter, PS_MODE_ACTIVE, 0, 0, "SRESET");
+#endif/* #ifdef CONFIG_LPS */
+
+	_enter_pwrlock(&pwrpriv->lock);
+
+	psrtpriv->silent_reset_inprogress = _TRUE;
+	pwrpriv->change_rfpwrstate = rf_off;
+
+	rtw_mi_sreset_adapter_hdl(padapter, _FALSE);/*sreset_stop_adapter*/
+#ifdef CONFIG_IPS
+	_ips_enter(padapter);
+	_ips_leave(padapter);
+#endif
+	rtw_mi_sreset_adapter_hdl(padapter, _TRUE);/*sreset_start_adapter*/
+
+	psrtpriv->silent_reset_inprogress = _FALSE;
+
+	_exit_pwrlock(&pwrpriv->lock);
+
+	RTW_INFO("%s done in %d ms\n", __FUNCTION__, rtw_get_passing_time_ms(start));
+	pdbgpriv->dbg_sreset_cnt++;
+#endif
+}

core/rtw_sta_mgt.c

@@ -0,0 +1,986 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_STA_MGT_C_
+
+#include <drv_types.h>
+
+#if defined(PLATFORM_LINUX) && defined (PLATFORM_WINDOWS)
+
+	#error "Shall be Linux or Windows, but not both!\n"
+
+#endif
+
+
+bool test_st_match_rule(_adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port)
+{
+	if (ntohs(*((u16 *)local_port)) == 5001 || ntohs(*((u16 *)remote_port)) == 5001)
+		return _TRUE;
+	return _FALSE;
+}
+
+struct st_register test_st_reg = {
+	.s_proto = 0x06,
+	.rule = test_st_match_rule,
+};
+
+inline void rtw_st_ctl_init(struct st_ctl_t *st_ctl)
+{
+	_rtw_memset(st_ctl->reg, 0 , sizeof(struct st_register) * SESSION_TRACKER_REG_ID_NUM);
+	_rtw_init_queue(&st_ctl->tracker_q);
+}
+
+inline void rtw_st_ctl_clear_tracker_q(struct st_ctl_t *st_ctl)
+{
+	_irqL irqL;
+	_list *plist, *phead;
+	struct session_tracker *st;
+
+	_enter_critical_bh(&st_ctl->tracker_q.lock, &irqL);
+	phead = &st_ctl->tracker_q.queue;
+	plist = get_next(phead);
+	while (rtw_end_of_queue_search(phead, plist) == _FALSE) {
+		st = LIST_CONTAINOR(plist, struct session_tracker, list);
+		plist = get_next(plist);
+		rtw_list_delete(&st->list);
+		rtw_mfree((u8 *)st, sizeof(struct session_tracker));
+	}
+	_exit_critical_bh(&st_ctl->tracker_q.lock, &irqL);
+}
+
+inline void rtw_st_ctl_deinit(struct st_ctl_t *st_ctl)
+{
+	rtw_st_ctl_clear_tracker_q(st_ctl);
+	_rtw_deinit_queue(&st_ctl->tracker_q);
+}
+
+inline void rtw_st_ctl_register(struct st_ctl_t *st_ctl, u8 st_reg_id, struct st_register *reg)
+{
+	if (st_reg_id >= SESSION_TRACKER_REG_ID_NUM) {
+		rtw_warn_on(1);
+		return;
+	}
+
+	st_ctl->reg[st_reg_id].s_proto = reg->s_proto;
+	st_ctl->reg[st_reg_id].rule = reg->rule;
+}
+
+inline void rtw_st_ctl_unregister(struct st_ctl_t *st_ctl, u8 st_reg_id)
+{
+	int i;
+
+	if (st_reg_id >= SESSION_TRACKER_REG_ID_NUM) {
+		rtw_warn_on(1);
+		return;
+	}
+
+	st_ctl->reg[st_reg_id].s_proto = 0;
+	st_ctl->reg[st_reg_id].rule = NULL;
+
+	/* clear tracker queue if no session trecker registered */
+	for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++)
+		if (st_ctl->reg[i].s_proto != 0)
+			break;
+	if (i >= SESSION_TRACKER_REG_ID_NUM)
+		rtw_st_ctl_clear_tracker_q(st_ctl);
+}
+
+inline bool rtw_st_ctl_chk_reg_s_proto(struct st_ctl_t *st_ctl, u8 s_proto)
+{
+	bool ret = _FALSE;
+	int i;
+
+	for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) {
+		if (st_ctl->reg[i].s_proto == s_proto) {
+			ret = _TRUE;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+inline bool rtw_st_ctl_chk_reg_rule(struct st_ctl_t *st_ctl, _adapter *adapter, u8 *local_naddr, u8 *local_port, u8 *remote_naddr, u8 *remote_port)
+{
+	bool ret = _FALSE;
+	int i;
+	st_match_rule rule;
+
+	for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++) {
+		rule = st_ctl->reg[i].rule;
+		if (rule && rule(adapter, local_naddr, local_port, remote_naddr, remote_port) == _TRUE) {
+			ret = _TRUE;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+#define SESSION_TRACKER_FMT IP_FMT":"PORT_FMT" "IP_FMT":"PORT_FMT" %u %d"
+#define SESSION_TRACKER_ARG(st) IP_ARG(&(st)->local_naddr), PORT_ARG(&(st)->local_port), IP_ARG(&(st)->remote_naddr), PORT_ARG(&(st)->remote_port), (st)->status, rtw_get_passing_time_ms((st)->set_time)
+
+void dump_st_ctl(void *sel, struct st_ctl_t *st_ctl)
+{
+	int i;
+	_irqL irqL;
+	_list *plist, *phead;
+	struct session_tracker *st;
+
+	if (!DBG_SESSION_TRACKER)
+		return;
+
+	for (i = 0; i < SESSION_TRACKER_REG_ID_NUM; i++)
+		RTW_PRINT_SEL(sel, "reg%d: %u %p\n", i, st_ctl->reg[i].s_proto, st_ctl->reg[i].rule);
+
+	_enter_critical_bh(&st_ctl->tracker_q.lock, &irqL);
+	phead = &st_ctl->tracker_q.queue;
+	plist = get_next(phead);
+	while (rtw_end_of_queue_search(phead, plist) == _FALSE) {
+		st = LIST_CONTAINOR(plist, struct session_tracker, list);
+		plist = get_next(plist);
+
+		RTW_PRINT_SEL(sel, SESSION_TRACKER_FMT"\n", SESSION_TRACKER_ARG(st));
+	}
+	_exit_critical_bh(&st_ctl->tracker_q.lock, &irqL);
+
+}
+
+void _rtw_init_stainfo(struct sta_info *psta);
+void _rtw_init_stainfo(struct sta_info *psta)
+{
+
+	_func_enter_;
+
+	_rtw_memset((u8 *)psta, 0, sizeof(struct sta_info));
+
+	_rtw_spinlock_init(&psta->lock);
+	_rtw_init_listhead(&psta->list);
+	_rtw_init_listhead(&psta->hash_list);
+	/* _rtw_init_listhead(&psta->asoc_list); */
+	/* _rtw_init_listhead(&psta->sleep_list); */
+	/* _rtw_init_listhead(&psta->wakeup_list);	 */
+
+	_rtw_init_queue(&psta->sleep_q);
+	psta->sleepq_len = 0;
+
+	_rtw_init_sta_xmit_priv(&psta->sta_xmitpriv);
+	_rtw_init_sta_recv_priv(&psta->sta_recvpriv);
+
+#ifdef CONFIG_AP_MODE
+
+	_rtw_init_listhead(&psta->asoc_list);
+
+	_rtw_init_listhead(&psta->auth_list);
+
+	psta->expire_to = 0;
+
+	psta->flags = 0;
+
+	psta->capability = 0;
+
+	psta->bpairwise_key_installed = _FALSE;
+
+
+#ifdef CONFIG_NATIVEAP_MLME
+	psta->nonerp_set = 0;
+	psta->no_short_slot_time_set = 0;
+	psta->no_short_preamble_set = 0;
+	psta->no_ht_gf_set = 0;
+	psta->no_ht_set = 0;
+	psta->ht_20mhz_set = 0;
+	psta->ht_40mhz_intolerant = 0;
+#endif
+
+#ifdef CONFIG_TX_MCAST2UNI
+	psta->under_exist_checking = 0;
+#endif /* CONFIG_TX_MCAST2UNI */
+
+	psta->keep_alive_trycnt = 0;
+
+#endif /* CONFIG_AP_MODE	 */
+
+	rtw_st_ctl_init(&psta->st_ctl);
+
+	_func_exit_;
+
+}
+
+u32	_rtw_init_sta_priv(struct	sta_priv *pstapriv)
+{
+	struct sta_info *psta;
+	s32 i;
+
+	_func_enter_;
+
+	pstapriv->pallocated_stainfo_buf = rtw_zvmalloc(sizeof(struct sta_info) * NUM_STA + 4);
+
+	if (!pstapriv->pallocated_stainfo_buf)
+		return _FAIL;
+
+	pstapriv->pstainfo_buf = pstapriv->pallocated_stainfo_buf + 4 -
+			 ((SIZE_PTR)(pstapriv->pallocated_stainfo_buf) & 3);
+
+	_rtw_init_queue(&pstapriv->free_sta_queue);
+
+	_rtw_spinlock_init(&pstapriv->sta_hash_lock);
+
+	/* _rtw_init_queue(&pstapriv->asoc_q); */
+	pstapriv->asoc_sta_count = 0;
+	_rtw_init_queue(&pstapriv->sleep_q);
+	_rtw_init_queue(&pstapriv->wakeup_q);
+
+	psta = (struct sta_info *)(pstapriv->pstainfo_buf);
+
+
+	for (i = 0; i < NUM_STA; i++) {
+		_rtw_init_stainfo(psta);
+
+		_rtw_init_listhead(&(pstapriv->sta_hash[i]));
+
+		rtw_list_insert_tail(&psta->list, get_list_head(&pstapriv->free_sta_queue));
+
+		psta++;
+	}
+
+	pstapriv->adhoc_expire_to = 4; /* 4 * 2 = 8 sec */
+
+#ifdef CONFIG_AP_MODE
+
+	pstapriv->sta_dz_bitmap = 0;
+	pstapriv->tim_bitmap = 0;
+
+	_rtw_init_listhead(&pstapriv->asoc_list);
+	_rtw_init_listhead(&pstapriv->auth_list);
+	_rtw_spinlock_init(&pstapriv->asoc_list_lock);
+	_rtw_spinlock_init(&pstapriv->auth_list_lock);
+	pstapriv->asoc_list_cnt = 0;
+	pstapriv->auth_list_cnt = 0;
+
+	pstapriv->auth_to = 3; /* 3*2 = 6 sec */
+	pstapriv->assoc_to = 3;
+	/* pstapriv->expire_to = 900; */ /* 900*2 = 1800 sec = 30 min, expire after no any traffic. */
+	/* pstapriv->expire_to = 30; */ /* 30*2 = 60 sec = 1 min, expire after no any traffic. */
+#ifdef CONFIG_ACTIVE_KEEP_ALIVE_CHECK
+	pstapriv->expire_to = 3; /* 3*2 = 6 sec */
+#else
+	pstapriv->expire_to = 60;/* 60*2 = 120 sec = 2 min, expire after no any traffic. */
+#endif
+#ifdef CONFIG_ATMEL_RC_PATCH
+	_rtw_memset(pstapriv->atmel_rc_pattern, 0, ETH_ALEN);
+#endif
+	pstapriv->max_num_sta = NUM_STA;
+
+#endif
+
+#if CONFIG_RTW_MACADDR_ACL
+	_rtw_init_queue(&(pstapriv->acl_list.acl_node_q));
+#endif
+
+	_func_exit_;
+
+	return _SUCCESS;
+
+}
+
+inline int rtw_stainfo_offset(struct sta_priv *stapriv, struct sta_info *sta)
+{
+	int offset = (((u8 *)sta) - stapriv->pstainfo_buf) / sizeof(struct sta_info);
+
+	if (!stainfo_offset_valid(offset))
+		RTW_INFO("%s invalid offset(%d), out of range!!!", __func__, offset);
+
+	return offset;
+}
+
+inline struct sta_info *rtw_get_stainfo_by_offset(struct sta_priv *stapriv, int offset)
+{
+	if (!stainfo_offset_valid(offset))
+		RTW_INFO("%s invalid offset(%d), out of range!!!", __func__, offset);
+
+	return (struct sta_info *)(stapriv->pstainfo_buf + offset * sizeof(struct sta_info));
+}
+
+void	_rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv);
+void	_rtw_free_sta_xmit_priv_lock(struct sta_xmit_priv *psta_xmitpriv)
+{
+	_func_enter_;
+
+	_rtw_spinlock_free(&psta_xmitpriv->lock);
+
+	_rtw_spinlock_free(&(psta_xmitpriv->be_q.sta_pending.lock));
+	_rtw_spinlock_free(&(psta_xmitpriv->bk_q.sta_pending.lock));
+	_rtw_spinlock_free(&(psta_xmitpriv->vi_q.sta_pending.lock));
+	_rtw_spinlock_free(&(psta_xmitpriv->vo_q.sta_pending.lock));
+	_func_exit_;
+}
+
+static void	_rtw_free_sta_recv_priv_lock(struct sta_recv_priv *psta_recvpriv)
+{
+	_func_enter_;
+
+	_rtw_spinlock_free(&psta_recvpriv->lock);
+
+	_rtw_spinlock_free(&(psta_recvpriv->defrag_q.lock));
+
+	_func_exit_;
+
+}
+
+void rtw_mfree_stainfo(struct sta_info *psta);
+void rtw_mfree_stainfo(struct sta_info *psta)
+{
+	_func_enter_;
+
+	if (&psta->lock != NULL)
+		_rtw_spinlock_free(&psta->lock);
+
+	_rtw_free_sta_xmit_priv_lock(&psta->sta_xmitpriv);
+	_rtw_free_sta_recv_priv_lock(&psta->sta_recvpriv);
+
+	_func_exit_;
+}
+
+
+/* this function is used to free the memory of lock || sema for all stainfos */
+void rtw_mfree_all_stainfo(struct sta_priv *pstapriv);
+void rtw_mfree_all_stainfo(struct sta_priv *pstapriv)
+{
+	_irqL	 irqL;
+	_list	*plist, *phead;
+	struct sta_info *psta = NULL;
+
+	_func_enter_;
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	phead = get_list_head(&pstapriv->free_sta_queue);
+	plist = get_next(phead);
+
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+		psta = LIST_CONTAINOR(plist, struct sta_info , list);
+		plist = get_next(plist);
+
+		rtw_mfree_stainfo(psta);
+	}
+
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	_func_exit_;
+
+}
+
+void rtw_mfree_sta_priv_lock(struct	sta_priv *pstapriv);
+void rtw_mfree_sta_priv_lock(struct	sta_priv *pstapriv)
+{
+	rtw_mfree_all_stainfo(pstapriv); /* be done before free sta_hash_lock */
+
+	_rtw_spinlock_free(&pstapriv->free_sta_queue.lock);
+
+	_rtw_spinlock_free(&pstapriv->sta_hash_lock);
+	_rtw_spinlock_free(&pstapriv->wakeup_q.lock);
+	_rtw_spinlock_free(&pstapriv->sleep_q.lock);
+
+#ifdef CONFIG_AP_MODE
+	_rtw_spinlock_free(&pstapriv->asoc_list_lock);
+	_rtw_spinlock_free(&pstapriv->auth_list_lock);
+#endif
+
+}
+
+u32	_rtw_free_sta_priv(struct	sta_priv *pstapriv)
+{
+	_irqL	irqL;
+	_list	*phead, *plist;
+	struct sta_info *psta = NULL;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	int	index;
+
+	_func_enter_;
+	if (pstapriv) {
+
+		/*	delete all reordering_ctrl_timer		*/
+		_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+		for (index = 0; index < NUM_STA; index++) {
+			phead = &(pstapriv->sta_hash[index]);
+			plist = get_next(phead);
+
+			while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+				int i;
+				psta = LIST_CONTAINOR(plist, struct sta_info , hash_list);
+				plist = get_next(plist);
+
+				for (i = 0; i < 16 ; i++) {
+					preorder_ctrl = &psta->recvreorder_ctrl[i];
+					_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+				}
+			}
+		}
+		_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+		/*===============================*/
+
+		rtw_mfree_sta_priv_lock(pstapriv);
+
+#if CONFIG_RTW_MACADDR_ACL
+		_rtw_deinit_queue(&(pstapriv->acl_list.acl_node_q));
+#endif
+
+		if (pstapriv->pallocated_stainfo_buf)
+			rtw_vmfree(pstapriv->pallocated_stainfo_buf, sizeof(struct sta_info) * NUM_STA + 4);
+	}
+
+	_func_exit_;
+	return _SUCCESS;
+}
+
+
+/* struct	sta_info *rtw_alloc_stainfo(_queue *pfree_sta_queue, unsigned char *hwaddr) */
+struct	sta_info *rtw_alloc_stainfo(struct	sta_priv *pstapriv, u8 *hwaddr)
+{
+	_irqL irqL, irqL2;
+	uint tmp_aid;
+	s32	index;
+	_list	*phash_list;
+	struct sta_info	*psta;
+	_queue *pfree_sta_queue;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	int i = 0;
+	u16  wRxSeqInitialValue = 0xffff;
+
+	_func_enter_;
+
+	pfree_sta_queue = &pstapriv->free_sta_queue;
+
+	/* _enter_critical_bh(&(pfree_sta_queue->lock), &irqL); */
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+	if (_rtw_queue_empty(pfree_sta_queue) == _TRUE) {
+		/* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); */
+		_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+		psta = NULL;
+	} else {
+		psta = LIST_CONTAINOR(get_next(&pfree_sta_queue->queue), struct sta_info, list);
+
+		rtw_list_delete(&(psta->list));
+
+		/* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL); */
+
+		tmp_aid = psta->aid;
+
+		_rtw_init_stainfo(psta);
+
+		psta->padapter = pstapriv->padapter;
+
+		_rtw_memcpy(psta->hwaddr, hwaddr, ETH_ALEN);
+
+		index = wifi_mac_hash(hwaddr);
+
+		RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_, ("rtw_alloc_stainfo: index  = %x", index));
+
+		if (index >= NUM_STA) {
+			RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("ERROR=> rtw_alloc_stainfo: index >= NUM_STA"));
+			psta = NULL;
+			goto exit;
+		}
+		phash_list = &(pstapriv->sta_hash[index]);
+
+		/* _enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */
+
+		rtw_list_insert_tail(&psta->hash_list, phash_list);
+
+		pstapriv->asoc_sta_count++;
+
+		/* _exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2); */
+
+		/* Commented by Albert 2009/08/13
+		 * For the SMC router, the sequence number of first packet of WPS handshake will be 0.
+		 * In this case, this packet will be dropped by recv_decache function if we use the 0x00 as the default value for tid_rxseq variable.
+		 * So, we initialize the tid_rxseq variable as the 0xffff. */
+
+		for (i = 0; i < 16; i++)
+			_rtw_memcpy(&psta->sta_recvpriv.rxcache.tid_rxseq[i], &wRxSeqInitialValue, 2);
+
+		RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_info_, ("alloc number_%d stainfo  with hwaddr = %x %x %x %x %x %x\n",
+			pstapriv->asoc_sta_count , hwaddr[0], hwaddr[1], hwaddr[2], hwaddr[3], hwaddr[4], hwaddr[5]));
+
+		init_addba_retry_timer(pstapriv->padapter, psta);
+#ifdef CONFIG_IEEE80211W
+		init_dot11w_expire_timer(pstapriv->padapter, psta);
+#endif /* CONFIG_IEEE80211W */
+#ifdef CONFIG_TDLS
+		rtw_init_tdls_timer(pstapriv->padapter, psta);
+#endif /* CONFIG_TDLS */
+
+		/* for A-MPDU Rx reordering buffer control */
+		for (i = 0; i < 16 ; i++) {
+			preorder_ctrl = &psta->recvreorder_ctrl[i];
+
+			preorder_ctrl->padapter = pstapriv->padapter;
+
+			preorder_ctrl->enable = _FALSE;
+
+			preorder_ctrl->indicate_seq = 0xffff;
+#ifdef DBG_RX_SEQ
+			RTW_INFO("DBG_RX_SEQ %s:%d IndicateSeq: %d\n", __FUNCTION__, __LINE__,
+				 preorder_ctrl->indicate_seq);
+#endif
+			preorder_ctrl->wend_b = 0xffff;
+			/* preorder_ctrl->wsize_b = (NR_RECVBUFF-2); */
+			preorder_ctrl->wsize_b = 64;/* 64; */
+			preorder_ctrl->ampdu_size = RX_AMPDU_SIZE_INVALID;
+
+			_rtw_init_queue(&preorder_ctrl->pending_recvframe_queue);
+
+			rtw_init_recv_timer(preorder_ctrl);
+		}
+
+
+		/* init for DM */
+		psta->rssi_stat.UndecoratedSmoothedPWDB = (-1);
+		psta->rssi_stat.UndecoratedSmoothedCCK = (-1);
+#ifdef CONFIG_ATMEL_RC_PATCH
+		psta->flag_atmel_rc = 0;
+#endif
+		/* init for the sequence number of received management frame */
+		psta->RxMgmtFrameSeqNum = 0xffff;
+		psta->ra_rpt_linked = _FALSE;
+
+		rtw_alloc_macid(pstapriv->padapter, psta);
+
+	}
+
+exit:
+
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL2);
+
+	_func_exit_;
+
+	return psta;
+
+
+}
+
+
+/* using pstapriv->sta_hash_lock to protect */
+u32	rtw_free_stainfo(_adapter *padapter , struct sta_info *psta)
+{
+	int i;
+	_irqL irqL0;
+	_queue *pfree_sta_queue;
+	struct recv_reorder_ctrl *preorder_ctrl;
+	struct	sta_xmit_priv	*pstaxmitpriv;
+	struct	xmit_priv	*pxmitpriv = &padapter->xmitpriv;
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	struct hw_xmit *phwxmit;
+	int pending_qcnt[4];
+
+	_func_enter_;
+
+	if (psta == NULL)
+		goto exit;
+
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
+	rtw_list_delete(&psta->hash_list);
+	RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("\n free number_%d stainfo  with hwaddr = 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x 0x%.2x\n", pstapriv->asoc_sta_count , psta->hwaddr[0],
+		psta->hwaddr[1], psta->hwaddr[2], psta->hwaddr[3], psta->hwaddr[4], psta->hwaddr[5]));
+	pstapriv->asoc_sta_count--;
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
+
+
+	_enter_critical_bh(&psta->lock, &irqL0);
+	psta->state &= ~_FW_LINKED;
+	_exit_critical_bh(&psta->lock, &irqL0);
+
+	pfree_sta_queue = &pstapriv->free_sta_queue;
+
+
+	pstaxmitpriv = &psta->sta_xmitpriv;
+
+	/* rtw_list_delete(&psta->sleep_list); */
+
+	/* rtw_list_delete(&psta->wakeup_list); */
+
+	_enter_critical_bh(&pxmitpriv->lock, &irqL0);
+
+	rtw_free_xmitframe_queue(pxmitpriv, &psta->sleep_q);
+	psta->sleepq_len = 0;
+
+	/* vo */
+	/* _enter_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); */
+	rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vo_q.sta_pending);
+	rtw_list_delete(&(pstaxmitpriv->vo_q.tx_pending));
+	phwxmit = pxmitpriv->hwxmits;
+	phwxmit->accnt -= pstaxmitpriv->vo_q.qcnt;
+	pending_qcnt[0] = pstaxmitpriv->vo_q.qcnt;
+	pstaxmitpriv->vo_q.qcnt = 0;
+	/* _exit_critical_bh(&(pxmitpriv->vo_pending.lock), &irqL0); */
+
+	/* vi */
+	/* _enter_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); */
+	rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->vi_q.sta_pending);
+	rtw_list_delete(&(pstaxmitpriv->vi_q.tx_pending));
+	phwxmit = pxmitpriv->hwxmits + 1;
+	phwxmit->accnt -= pstaxmitpriv->vi_q.qcnt;
+	pending_qcnt[1] = pstaxmitpriv->vi_q.qcnt;
+	pstaxmitpriv->vi_q.qcnt = 0;
+	/* _exit_critical_bh(&(pxmitpriv->vi_pending.lock), &irqL0); */
+
+	/* be */
+	/* _enter_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); */
+	rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->be_q.sta_pending);
+	rtw_list_delete(&(pstaxmitpriv->be_q.tx_pending));
+	phwxmit = pxmitpriv->hwxmits + 2;
+	phwxmit->accnt -= pstaxmitpriv->be_q.qcnt;
+	pending_qcnt[2] = pstaxmitpriv->be_q.qcnt;
+	pstaxmitpriv->be_q.qcnt = 0;
+	/* _exit_critical_bh(&(pxmitpriv->be_pending.lock), &irqL0); */
+
+	/* bk */
+	/* _enter_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); */
+	rtw_free_xmitframe_queue(pxmitpriv, &pstaxmitpriv->bk_q.sta_pending);
+	rtw_list_delete(&(pstaxmitpriv->bk_q.tx_pending));
+	phwxmit = pxmitpriv->hwxmits + 3;
+	phwxmit->accnt -= pstaxmitpriv->bk_q.qcnt;
+	pending_qcnt[3] = pstaxmitpriv->bk_q.qcnt;
+	pstaxmitpriv->bk_q.qcnt = 0;
+	/* _exit_critical_bh(&(pxmitpriv->bk_pending.lock), &irqL0); */
+
+	rtw_os_wake_queue_at_free_stainfo(padapter, pending_qcnt);
+
+	_exit_critical_bh(&pxmitpriv->lock, &irqL0);
+
+
+	/* re-init sta_info; 20061114 */ /* will be init in alloc_stainfo */
+	/* _rtw_init_sta_xmit_priv(&psta->sta_xmitpriv); */
+	/* _rtw_init_sta_recv_priv(&psta->sta_recvpriv); */
+#ifdef CONFIG_IEEE80211W
+	_cancel_timer_ex(&psta->dot11w_expire_timer);
+#endif /* CONFIG_IEEE80211W */
+	_cancel_timer_ex(&psta->addba_retry_timer);
+
+#ifdef CONFIG_TDLS
+	psta->tdls_sta_state = TDLS_STATE_NONE;
+	rtw_free_tdls_timer(psta);
+#endif /* CONFIG_TDLS */
+
+	/* for A-MPDU Rx reordering buffer control, cancel reordering_ctrl_timer */
+	for (i = 0; i < 16 ; i++) {
+		_irqL irqL;
+		_list	*phead, *plist;
+		union recv_frame *prframe;
+		_queue *ppending_recvframe_queue;
+		_queue *pfree_recv_queue = &padapter->recvpriv.free_recv_queue;
+
+		preorder_ctrl = &psta->recvreorder_ctrl[i];
+
+		_cancel_timer_ex(&preorder_ctrl->reordering_ctrl_timer);
+
+
+		ppending_recvframe_queue = &preorder_ctrl->pending_recvframe_queue;
+
+		_enter_critical_bh(&ppending_recvframe_queue->lock, &irqL);
+
+		phead =	get_list_head(ppending_recvframe_queue);
+		plist = get_next(phead);
+
+		while (!rtw_is_list_empty(phead)) {
+			prframe = LIST_CONTAINOR(plist, union recv_frame, u);
+
+			plist = get_next(plist);
+
+			rtw_list_delete(&(prframe->u.hdr.list));
+
+			rtw_free_recvframe(prframe, pfree_recv_queue);
+		}
+
+		_exit_critical_bh(&ppending_recvframe_queue->lock, &irqL);
+
+	}
+
+	if (!((psta->state & WIFI_AP_STATE) || MacAddr_isBcst(psta->hwaddr)))
+		rtw_hal_set_odm_var(padapter, HAL_ODM_STA_INFO, psta, _FALSE);
+
+
+	/* release mac id for non-bc/mc station, */
+	rtw_release_macid(pstapriv->padapter, psta);
+
+#ifdef CONFIG_AP_MODE
+
+	/*
+		_enter_critical_bh(&pstapriv->asoc_list_lock, &irqL0);
+		rtw_list_delete(&psta->asoc_list);
+		_exit_critical_bh(&pstapriv->asoc_list_lock, &irqL0);
+	*/
+	_enter_critical_bh(&pstapriv->auth_list_lock, &irqL0);
+	if (!rtw_is_list_empty(&psta->auth_list)) {
+		rtw_list_delete(&psta->auth_list);
+		pstapriv->auth_list_cnt--;
+	}
+	_exit_critical_bh(&pstapriv->auth_list_lock, &irqL0);
+
+	psta->expire_to = 0;
+#ifdef CONFIG_ATMEL_RC_PATCH
+	psta->flag_atmel_rc = 0;
+#endif
+	psta->sleepq_ac_len = 0;
+	psta->qos_info = 0;
+
+	psta->max_sp_len = 0;
+	psta->uapsd_bk = 0;
+	psta->uapsd_be = 0;
+	psta->uapsd_vi = 0;
+	psta->uapsd_vo = 0;
+
+	psta->has_legacy_ac = 0;
+
+#ifdef CONFIG_NATIVEAP_MLME
+
+	pstapriv->sta_dz_bitmap &= ~BIT(psta->aid);
+	pstapriv->tim_bitmap &= ~BIT(psta->aid);
+
+	/* rtw_indicate_sta_disassoc_event(padapter, psta); */
+
+	if ((psta->aid > 0) && (pstapriv->sta_aid[psta->aid - 1] == psta)) {
+		pstapriv->sta_aid[psta->aid - 1] = NULL;
+		psta->aid = 0;
+	}
+
+#endif /* CONFIG_NATIVEAP_MLME	 */
+
+#ifdef CONFIG_TX_MCAST2UNI
+	psta->under_exist_checking = 0;
+#endif /* CONFIG_TX_MCAST2UNI */
+
+#endif /* CONFIG_AP_MODE	 */
+
+	rtw_st_ctl_deinit(&psta->st_ctl);
+
+	_rtw_spinlock_free(&psta->lock);
+
+	/* _enter_critical_bh(&(pfree_sta_queue->lock), &irqL0); */
+	_enter_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
+	rtw_list_insert_tail(&psta->list, get_list_head(pfree_sta_queue));
+	_exit_critical_bh(&(pstapriv->sta_hash_lock), &irqL0);
+	/* _exit_critical_bh(&(pfree_sta_queue->lock), &irqL0); */
+
+exit:
+
+	_func_exit_;
+
+	return _SUCCESS;
+
+}
+
+/* free all stainfo which in sta_hash[all] */
+void rtw_free_all_stainfo(_adapter *padapter)
+{
+	_irqL	 irqL;
+	_list	*plist, *phead;
+	s32	index;
+	struct sta_info *psta = NULL;
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	struct sta_info *pbcmc_stainfo = rtw_get_bcmc_stainfo(padapter);
+	u8 free_sta_num = 0;
+	char free_sta_list[NUM_STA];
+	int stainfo_offset;
+
+	_func_enter_;
+
+	if (pstapriv->asoc_sta_count == 1)
+		goto exit;
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	for (index = 0; index < NUM_STA; index++) {
+		phead = &(pstapriv->sta_hash[index]);
+		plist = get_next(phead);
+
+		while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+			psta = LIST_CONTAINOR(plist, struct sta_info , hash_list);
+
+			plist = get_next(plist);
+
+			if (pbcmc_stainfo != psta) {
+				rtw_list_delete(&psta->hash_list);
+				/* rtw_free_stainfo(padapter , psta); */
+				stainfo_offset = rtw_stainfo_offset(pstapriv, psta);
+				if (stainfo_offset_valid(stainfo_offset))
+					free_sta_list[free_sta_num++] = stainfo_offset;
+			}
+
+		}
+	}
+
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+
+	for (index = 0; index < free_sta_num; index++) {
+		psta = rtw_get_stainfo_by_offset(pstapriv, free_sta_list[index]);
+		rtw_free_stainfo(padapter , psta);
+	}
+
+exit:
+
+	_func_exit_;
+
+}
+
+/* any station allocated can be searched by hash list */
+struct sta_info *rtw_get_stainfo(struct sta_priv *pstapriv, u8 *hwaddr)
+{
+
+	_irqL	 irqL;
+
+	_list	*plist, *phead;
+
+	struct sta_info *psta = NULL;
+
+	u32	index;
+
+	u8 *addr;
+
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+	_func_enter_;
+
+	if (hwaddr == NULL)
+		return NULL;
+
+	if (IS_MCAST(hwaddr))
+		addr = bc_addr;
+	else
+		addr = hwaddr;
+
+	index = wifi_mac_hash(addr);
+
+	_enter_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+
+	phead = &(pstapriv->sta_hash[index]);
+	plist = get_next(phead);
+
+
+	while ((rtw_end_of_queue_search(phead, plist)) == _FALSE) {
+
+		psta = LIST_CONTAINOR(plist, struct sta_info, hash_list);
+
+		if ((_rtw_memcmp(psta->hwaddr, addr, ETH_ALEN)) == _TRUE) {
+			/* if found the matched address */
+			break;
+		}
+		psta = NULL;
+		plist = get_next(plist);
+	}
+
+	_exit_critical_bh(&pstapriv->sta_hash_lock, &irqL);
+	_func_exit_;
+	return psta;
+
+}
+
+u32 rtw_init_bcmc_stainfo(_adapter *padapter)
+{
+
+	struct sta_info	*psta;
+	struct tx_servq	*ptxservq;
+	u32 res = _SUCCESS;
+	NDIS_802_11_MAC_ADDRESS	bcast_addr = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+
+	struct	sta_priv *pstapriv = &padapter->stapriv;
+	/* _queue	*pstapending = &padapter->xmitpriv.bm_pending; */
+
+	_func_enter_;
+
+	psta = rtw_alloc_stainfo(pstapriv, bcast_addr);
+
+	if (psta == NULL) {
+		res = _FAIL;
+		RT_TRACE(_module_rtl871x_sta_mgt_c_, _drv_err_, ("rtw_alloc_stainfo fail"));
+		goto exit;
+	}
+#ifdef CONFIG_BEAMFORMING
+	psta->txbf_gid = 63;
+	psta->txbf_paid = 0;
+#endif
+	ptxservq = &(psta->sta_xmitpriv.be_q);
+
+	/*
+		_enter_critical(&pstapending->lock, &irqL0);
+
+		if (rtw_is_list_empty(&ptxservq->tx_pending))
+			rtw_list_insert_tail(&ptxservq->tx_pending, get_list_head(pstapending));
+
+		_exit_critical(&pstapending->lock, &irqL0);
+	*/
+
+exit:
+	_func_exit_;
+	return _SUCCESS;
+
+}
+
+
+struct sta_info *rtw_get_bcmc_stainfo(_adapter *padapter)
+{
+	struct sta_info	*psta;
+	struct sta_priv	*pstapriv = &padapter->stapriv;
+	u8 bc_addr[ETH_ALEN] = {0xff, 0xff, 0xff, 0xff, 0xff, 0xff};
+	_func_enter_;
+	psta = rtw_get_stainfo(pstapriv, bc_addr);
+	_func_exit_;
+	return psta;
+
+}
+
+#if CONFIG_RTW_MACADDR_ACL
+u8 rtw_access_ctrl(_adapter *adapter, u8 *mac_addr)
+{
+	u8 res = _TRUE;
+	_irqL irqL;
+	_list *list, *head;
+	struct rtw_wlan_acl_node *acl_node;
+	u8 match = _FALSE;
+	struct sta_priv *stapriv = &adapter->stapriv;
+	struct wlan_acl_pool *acl = &stapriv->acl_list;
+	_queue	*acl_node_q = &acl->acl_node_q;
+
+	_enter_critical_bh(&(acl_node_q->lock), &irqL);
+	head = get_list_head(acl_node_q);
+	list = get_next(head);
+	while (rtw_end_of_queue_search(head, list) == _FALSE) {
+		acl_node = LIST_CONTAINOR(list, struct rtw_wlan_acl_node, list);
+		list = get_next(list);
+
+		if (_rtw_memcmp(acl_node->addr, mac_addr, ETH_ALEN)) {
+			if (acl_node->valid == _TRUE) {
+				match = _TRUE;
+				break;
+			}
+		}
+	}
+	_exit_critical_bh(&(acl_node_q->lock), &irqL);
+
+	if (acl->mode == RTW_ACL_MODE_ACCEPT_UNLESS_LISTED)
+		res = (match == _TRUE) ?  _FALSE : _TRUE;
+	else if (acl->mode == RTW_ACL_MODE_DENY_UNLESS_LISTED)
+		res = (match == _TRUE) ?  _TRUE : _FALSE;
+	else
+		res = _TRUE;
+
+	return res;
+}
+#endif /* CONFIG_RTW_MACADDR_ACL */

core/rtw_vht.c

@@ -0,0 +1,857 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _RTW_VHT_C
+
+#include <drv_types.h>
+
+#ifdef CONFIG_80211AC_VHT
+/*				20/40/80,	ShortGI,	MCS Rate  */
+const u16 VHT_MCS_DATA_RATE[3][2][30] = {
+	{	{
+			13, 26, 39, 52, 78, 104, 117, 130, 156, 156,
+			26, 52, 78, 104, 156, 208, 234, 260, 312, 312,
+			39, 78, 117, 156, 234, 312, 351, 390, 468, 520
+		},			/* Long GI, 20MHz */
+		{
+			14, 29, 43, 58, 87, 116, 130, 144, 173, 173,
+			29, 58, 87, 116, 173, 231, 260, 289, 347, 347,
+			43,	87, 130, 173, 260, 347, 390,	433,	520, 578
+		}
+	},		/* Short GI, 20MHz */
+	{	{
+			27, 54, 81, 108, 162, 216, 243, 270, 324, 360,
+			54, 108, 162, 216, 324, 432, 486, 540, 648, 720,
+			81, 162, 243, 324, 486, 648, 729, 810, 972, 1080
+		}, 		/* Long GI, 40MHz */
+		{
+			30, 60, 90, 120, 180, 240, 270, 300, 360, 400,
+			60, 120, 180, 240, 360, 480, 540, 600, 720, 800,
+			90, 180, 270, 360, 540, 720, 810, 900, 1080, 1200
+		}
+	},		/* Short GI, 40MHz */
+	{	{
+			59, 117,  176, 234, 351, 468, 527, 585, 702, 780,
+			117, 234, 351, 468, 702, 936, 1053, 1170, 1404, 1560,
+			176, 351, 527, 702, 1053, 1404, 1580, 1755, 2106, 2340
+		},	/* Long GI, 80MHz */
+		{
+			65, 130, 195, 260, 390, 520, 585, 650, 780, 867,
+			130, 260, 390, 520, 780, 1040, 1170, 1300, 1560, 1734,
+			195, 390, 585, 780, 1170, 1560, 1755, 1950, 2340, 2600
+		}
+	}	/* Short GI, 80MHz */
+};
+
+u8	rtw_get_vht_highest_rate(u8 *pvht_mcs_map)
+{
+	u8	i, j;
+	u8	bit_map;
+	u8	vht_mcs_rate = 0;
+
+	for (i = 0; i < 2; i++) {
+		if (pvht_mcs_map[i] != 0xff) {
+			for (j = 0; j < 8; j += 2) {
+				bit_map = (pvht_mcs_map[i] >> j) & 3;
+
+				if (bit_map != 3)
+					vht_mcs_rate = MGN_VHT1SS_MCS7 + 10 * j / 2 + i * 40 + bit_map; /* VHT rate indications begin from 0x90 */
+			}
+		}
+	}
+
+	/* RTW_INFO("HighestVHTMCSRate is %x\n", vht_mcs_rate); */
+	return vht_mcs_rate;
+}
+
+u8	rtw_vht_mcsmap_to_nss(u8 *pvht_mcs_map)
+{
+	u8	i, j;
+	u8	bit_map;
+	u8	nss = 0;
+
+	for (i = 0; i < 2; i++) {
+		if (pvht_mcs_map[i] != 0xff) {
+			for (j = 0; j < 8; j += 2) {
+				bit_map = (pvht_mcs_map[i] >> j) & 3;
+
+				if (bit_map != 3)
+					nss++;
+			}
+		}
+	}
+
+	/* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */
+	return nss;
+}
+
+void	rtw_vht_nss_to_mcsmap(u8 nss, u8 *target_mcs_map, u8 *cur_mcs_map)
+{
+	u8	i, j;
+	u8	cur_rate, target_rate;
+
+	for (i = 0; i < 2; i++) {
+		target_mcs_map[i] = 0;
+		for (j = 0; j < 8; j += 2) {
+			cur_rate = (cur_mcs_map[i] >> j) & 3;
+			if (cur_rate == 3) /* 0x3 indicates not supported that num of SS */
+				target_rate = 3;
+			else if (nss <= ((j / 2) + i * 4))
+				target_rate = 3;
+			else
+				target_rate = cur_rate;
+
+			target_mcs_map[i] |= (target_rate << j);
+		}
+	}
+
+	/* RTW_INFO("%s : %dSS\n", __FUNCTION__, nss); */
+}
+
+u16	rtw_vht_mcs_to_data_rate(u8 bw, u8 short_GI, u8 vht_mcs_rate)
+{
+	if (vht_mcs_rate > MGN_VHT3SS_MCS9)
+		vht_mcs_rate = MGN_VHT3SS_MCS9;
+	/* RTW_INFO("bw=%d, short_GI=%d, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)=%d\n", bw, short_GI, ((vht_mcs_rate - MGN_VHT1SS_MCS0)&0x3f)); */
+	return VHT_MCS_DATA_RATE[bw][short_GI][((vht_mcs_rate - MGN_VHT1SS_MCS0) & 0x3f)];
+}
+
+void	rtw_vht_use_default_setting(_adapter *padapter)
+{
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	BOOLEAN		bHwLDPCSupport = _FALSE, bHwSTBCSupport = _FALSE;
+#ifdef CONFIG_BEAMFORMING
+	BOOLEAN		bHwSupportBeamformer = _FALSE, bHwSupportBeamformee = _FALSE;
+	u8	mu_bfer, mu_bfee;
+#endif /* CONFIG_BEAMFORMING */
+	u8	rf_type = 0;
+	struct mlme_ext_priv	*pmlmeext = &(padapter->mlmeextpriv);
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	pvhtpriv->sgi_80m = TEST_FLAG(pregistrypriv->short_gi, BIT2) ? _TRUE : _FALSE;
+
+	/* LDPC support */
+	rtw_hal_get_def_var(padapter, HAL_DEF_RX_LDPC, (u8 *)&bHwLDPCSupport);
+	CLEAR_FLAGS(pvhtpriv->ldpc_cap);
+	if (bHwLDPCSupport) {
+		if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT0))
+			SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX);
+	}
+	rtw_hal_get_def_var(padapter, HAL_DEF_TX_LDPC, (u8 *)&bHwLDPCSupport);
+	if (bHwLDPCSupport) {
+		if (TEST_FLAG(pregistrypriv->ldpc_cap, BIT1))
+			SET_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX);
+	}
+	if (pvhtpriv->ldpc_cap)
+		RTW_INFO("[VHT] Support LDPC = 0x%02X\n", pvhtpriv->ldpc_cap);
+
+	/* STBC */
+	rtw_hal_get_def_var(padapter, HAL_DEF_TX_STBC, (u8 *)&bHwSTBCSupport);
+	CLEAR_FLAGS(pvhtpriv->stbc_cap);
+	if (bHwSTBCSupport) {
+		if (TEST_FLAG(pregistrypriv->stbc_cap, BIT1))
+			SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX);
+	}
+	rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)&bHwSTBCSupport);
+	if (bHwSTBCSupport) {
+		if (TEST_FLAG(pregistrypriv->stbc_cap, BIT0))
+			SET_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX);
+	}
+	if (pvhtpriv->stbc_cap)
+		RTW_INFO("[VHT] Support STBC = 0x%02X\n", pvhtpriv->stbc_cap);
+
+	/* Beamforming setting */
+	CLEAR_FLAGS(pvhtpriv->beamform_cap);
+#ifdef CONFIG_BEAMFORMING
+	rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMER, (u8 *)&bHwSupportBeamformer);
+	rtw_hal_get_def_var(padapter, HAL_DEF_EXPLICIT_BEAMFORMEE, (u8 *)&bHwSupportBeamformee);
+	mu_bfer = _FALSE;
+	mu_bfee = _FALSE;
+	rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMER, &mu_bfer);
+	rtw_hal_get_def_var(padapter, HAL_DEF_VHT_MU_BEAMFORMEE, &mu_bfee);
+	if (TEST_FLAG(pregistrypriv->beamform_cap, BIT0) && bHwSupportBeamformer) {
+#ifdef CONFIG_CONCURRENT_MODE
+		if ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE) {
+			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+			RTW_INFO("[VHT] CONCURRENT AP Support Beamformer\n");
+			if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2))
+			    && (_TRUE == mu_bfer)) {
+				SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
+				RTW_INFO("[VHT] Support MU-MIMO AP\n");
+			}
+		} else
+			RTW_INFO("[VHT] CONCURRENT not AP ;not allow  Support Beamformer\n");
+#else
+		SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+		RTW_INFO("[VHT] Support Beamformer\n");
+		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(2))
+		    && (_TRUE == mu_bfer)
+		    && ((pmlmeinfo->state & 0x03) == WIFI_FW_AP_STATE)) {
+			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
+			RTW_INFO("[VHT] Support MU-MIMO AP\n");
+		}
+#endif
+	}
+	if (TEST_FLAG(pregistrypriv->beamform_cap, BIT1) && bHwSupportBeamformee) {
+		SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
+		RTW_INFO("[VHT] Support Beamformee\n");
+		if (TEST_FLAG(pregistrypriv->beamform_cap, BIT(3))
+		    && (_TRUE == mu_bfee)
+		    && ((pmlmeinfo->state & 0x03) != WIFI_FW_AP_STATE)) {
+			SET_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE);
+			RTW_INFO("[VHT] Support MU-MIMO STA\n");
+		}
+	}
+#endif /* CONFIG_BEAMFORMING */
+
+	pvhtpriv->ampdu_len = pregistrypriv->ampdu_factor;
+
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+
+	if (rf_type == RF_3T3R)
+		pvhtpriv->vht_mcs_map[0] = 0xea;	/* support 1SS MCS 0~9 2SS MCS 0~9 3SS MCS 0~9 */
+	else if (rf_type == RF_2T2R)
+		pvhtpriv->vht_mcs_map[0] = 0xfa;	/* support 1SS MCS 0~9 2SS MCS 0~9 */
+	else
+		pvhtpriv->vht_mcs_map[0] = 0xfe;	/* Only support 1SS MCS 0~9; */
+	pvhtpriv->vht_mcs_map[1] = 0xff;
+
+	if (pregistrypriv->vht_rate_sel == 1) {
+		pvhtpriv->vht_mcs_map[0] = 0xfc;	/* support 1SS MCS 0~7 */
+	} else if (pregistrypriv->vht_rate_sel == 2) {
+		pvhtpriv->vht_mcs_map[0] = 0xfd;	/* Support 1SS MCS 0~8 */
+	} else if (pregistrypriv->vht_rate_sel == 3) {
+		pvhtpriv->vht_mcs_map[0] = 0xfe;	/* Support 1SS MCS 0~9 */
+	} else if (pregistrypriv->vht_rate_sel == 4) {
+		pvhtpriv->vht_mcs_map[0] = 0xf0;	/* support 1SS MCS 0~7 2SS MCS 0~7 */
+	} else if (pregistrypriv->vht_rate_sel == 5) {
+		pvhtpriv->vht_mcs_map[0] = 0xf5;	/* support 1SS MCS 0~8 2SS MCS 0~8 */
+	} else if (pregistrypriv->vht_rate_sel == 6) {
+		pvhtpriv->vht_mcs_map[0] = 0xfa;	/* support 1SS MCS 0~9 2SS MCS 0~9 */
+	} else if (pregistrypriv->vht_rate_sel == 7) {
+		pvhtpriv->vht_mcs_map[0] = 0xf8;	/* support 1SS MCS 0-7 2SS MCS 0~9 */
+	} else if (pregistrypriv->vht_rate_sel == 8) {
+		pvhtpriv->vht_mcs_map[0] = 0xf9;	/* support 1SS MCS 0-8 2SS MCS 0~9 */
+	} else if (pregistrypriv->vht_rate_sel == 9) {
+		pvhtpriv->vht_mcs_map[0] = 0xf4;	/* support 1SS MCS 0-7 2SS MCS 0~8 */
+	}
+
+	pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map);
+}
+
+u64	rtw_vht_rate_to_bitmap(u8 *pVHTRate)
+{
+
+	u8	i, j , tmpRate;
+	u64	RateBitmap = 0;
+	u8 Bits_3ss = 6;
+
+	for (i = j = 0; i < Bits_3ss; i += 2, j += 10) {
+		/* every two bits means single sptial stream */
+		tmpRate = (pVHTRate[0] >> i) & 3;
+
+		switch (tmpRate) {
+		case 2:
+			RateBitmap = RateBitmap | (0x03ff << j);
+			break;
+		case 1:
+			RateBitmap = RateBitmap | (0x01ff << j);
+			break;
+
+		case 0:
+			RateBitmap = RateBitmap | (0x00ff << j);
+			break;
+
+		default:
+			break;
+		}
+	}
+	RTW_INFO("RateBitmap=%016llx , pVHTRate[0]=%02x, pVHTRate[1]=%02x\n", RateBitmap, pVHTRate[0], pVHTRate[1]);
+	return RateBitmap;
+}
+
+void	update_sta_vht_info_apmode(_adapter *padapter, PVOID sta)
+{
+	struct sta_info	*psta = (struct sta_info *)sta;
+	struct mlme_priv	*pmlmepriv = &(padapter->mlmepriv);
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct vht_priv	*pvhtpriv_ap = &pmlmepriv->vhtpriv;
+	struct vht_priv	*pvhtpriv_sta = &psta->vhtpriv;
+	struct ht_priv		*phtpriv_sta = &psta->htpriv;
+	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, bw_mode = 0;
+	u16	cur_beamform_cap = 0;
+	u8	*pcap_mcs;
+
+	if (pvhtpriv_sta->vht_option == _FALSE)
+		return;
+
+	bw_mode = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&pvhtpriv_sta->vht_op_mode_notify);
+
+	/* if (bw_mode > psta->bw_mode) */
+	psta->bw_mode = bw_mode;
+
+	/* B4 Rx LDPC */
+	if (TEST_FLAG(pvhtpriv_ap->ldpc_cap, LDPC_VHT_ENABLE_TX) &&
+	    GET_VHT_CAPABILITY_ELE_RX_LDPC(pvhtpriv_sta->vht_cap)) {
+		SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX));
+		RTW_INFO("Current STA(%d) VHT LDPC = %02X\n", psta->aid, cur_ldpc_cap);
+	}
+	pvhtpriv_sta->ldpc_cap = cur_ldpc_cap;
+
+	if (psta->bw_mode > pmlmeext->cur_bwmode)
+		psta->bw_mode = pmlmeext->cur_bwmode;
+
+	if (psta->bw_mode == CHANNEL_WIDTH_80) {
+		/* B5 Short GI for 80 MHz */
+		pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE;
+		/* RTW_INFO("Current STA ShortGI80MHz = %d\n", pvhtpriv_sta->sgi_80m); */
+	} else if (psta->bw_mode >= CHANNEL_WIDTH_160) {
+		/* B5 Short GI for 80 MHz */
+		pvhtpriv_sta->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI160M(pvhtpriv_sta->vht_cap) & pvhtpriv_ap->sgi_80m) ? _TRUE : _FALSE;
+		/* RTW_INFO("Current STA ShortGI160MHz = %d\n", pvhtpriv_sta->sgi_80m); */
+	}
+
+	/* B8 B9 B10 Rx STBC */
+	if (TEST_FLAG(pvhtpriv_ap->stbc_cap, STBC_VHT_ENABLE_TX) &&
+	    GET_VHT_CAPABILITY_ELE_RX_STBC(pvhtpriv_sta->vht_cap)) {
+		SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX));
+		RTW_INFO("Current STA(%d) VHT STBC = %02X\n", psta->aid, cur_stbc_cap);
+	}
+	pvhtpriv_sta->stbc_cap = cur_stbc_cap;
+
+#ifdef CONFIG_BEAMFORMING
+	/* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */
+	if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) &&
+	    GET_VHT_CAPABILITY_ELE_SU_BFEE(pvhtpriv_sta->vht_cap)) {
+		SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
+		/*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/
+		SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pvhtpriv_sta->vht_cap) << 8);
+	}
+
+	/* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */
+	if (TEST_FLAG(pvhtpriv_ap->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) &&
+	    GET_VHT_CAPABILITY_ELE_SU_BFER(pvhtpriv_sta->vht_cap)) {
+		SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+		/*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/
+		SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pvhtpriv_sta->vht_cap) << 12);
+	}
+	pvhtpriv_sta->beamform_cap = cur_beamform_cap;
+	if (cur_beamform_cap)
+		RTW_INFO("Current STA(%d) VHT Beamforming Setting = %02X\n", psta->aid, cur_beamform_cap);
+#endif
+
+	/* B23 B24 B25 Maximum A-MPDU Length Exponent */
+	pvhtpriv_sta->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pvhtpriv_sta->vht_cap);
+
+	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pvhtpriv_sta->vht_cap);
+	_rtw_memcpy(pvhtpriv_sta->vht_mcs_map, pcap_mcs, 2);
+
+	pvhtpriv_sta->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv_sta->vht_mcs_map);
+
+}
+
+void	update_hw_vht_param(_adapter *padapter)
+{
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	ht_AMPDU_len;
+
+	ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03;
+
+	if (pvhtpriv->ampdu_len > ht_AMPDU_len)
+		rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len));
+}
+
+void VHT_caps_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	cur_ldpc_cap = 0, cur_stbc_cap = 0, rf_type = RF_1T1R;
+	u16	cur_beamform_cap = 0;
+	u8	*pcap_mcs;
+	u8	vht_mcs[2];
+
+	if (pIE == NULL)
+		return;
+
+	if (pvhtpriv->vht_option == _FALSE)
+		return;
+
+	pmlmeinfo->VHT_enable = 1;
+
+	/* B4 Rx LDPC */
+	if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_TX) &&
+	    GET_VHT_CAPABILITY_ELE_RX_LDPC(pIE->data)) {
+		SET_FLAG(cur_ldpc_cap, (LDPC_VHT_ENABLE_TX | LDPC_VHT_CAP_TX));
+		RTW_INFO("Current VHT LDPC Setting = %02X\n", cur_ldpc_cap);
+	}
+	pvhtpriv->ldpc_cap = cur_ldpc_cap;
+
+	/* B5 Short GI for 80 MHz */
+	pvhtpriv->sgi_80m = (GET_VHT_CAPABILITY_ELE_SHORT_GI80M(pIE->data) & pvhtpriv->sgi_80m) ? _TRUE : _FALSE;
+	/* RTW_INFO("Current ShortGI80MHz = %d\n", pvhtpriv->sgi_80m); */
+
+	/* B8 B9 B10 Rx STBC */
+	if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX) &&
+	    GET_VHT_CAPABILITY_ELE_RX_STBC(pIE->data)) {
+		SET_FLAG(cur_stbc_cap, (STBC_VHT_ENABLE_TX | STBC_VHT_CAP_TX));
+		RTW_INFO("Current VHT STBC Setting = %02X\n", cur_stbc_cap);
+	}
+	pvhtpriv->stbc_cap = cur_stbc_cap;
+#ifdef CONFIG_BEAMFORMING
+#ifdef RTW_BEAMFORMING_VERSION_2
+	/*
+	 * B11 SU Beamformer Capable,
+	 * the target supports Beamformer and we are Beamformee
+	 */
+	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)
+	    && GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) {
+		SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
+
+		/* Shift to BEAMFORMING_VHT_BEAMFORMEE_STS_CAP */
+		SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8);
+
+		/*
+		 * B19 MU Beamformer Capable,
+		 * the target supports Beamformer and we are Beamformee
+		 */
+		if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE)
+		    && GET_VHT_CAPABILITY_ELE_MU_BFER(pIE->data))
+			SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE);
+	}
+
+	/*
+	 * B12 SU Beamformee Capable,
+	 * the target supports Beamformee and we are Beamformer
+	 */
+	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)
+	    && GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) {
+		SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+
+		/* Shit to BEAMFORMING_VHT_BEAMFORMER_SOUND_DIM */
+		SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12);
+
+		/*
+		 * B20 MU Beamformee Capable,
+		 * the target supports Beamformee and we are Beamformer
+		 */
+		if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE)
+		    && GET_VHT_CAPABILITY_ELE_MU_BFEE(pIE->data))
+			SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE);
+	}
+
+	pvhtpriv->beamform_cap = cur_beamform_cap;
+	RTW_INFO("Current VHT Beamforming Setting=0x%04X\n", cur_beamform_cap);
+#else /* !RTW_BEAMFORMING_VERSION_2 */
+	/* B11 SU Beamformer Capable, the target supports Beamformer and we are Beamformee */
+	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE) &&
+	    GET_VHT_CAPABILITY_ELE_SU_BFEE(pIE->data)) {
+		SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE);
+		/*Shift to BEAMFORMING_VHT_BEAMFORMER_STS_CAP*/
+		SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFEE_STS_CAP(pIE->data) << 8);
+	}
+
+	/* B12 SU Beamformee Capable, the target supports Beamformee and we are Beamformer */
+	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE) &&
+	    GET_VHT_CAPABILITY_ELE_SU_BFER(pIE->data)) {
+		SET_FLAG(cur_beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE);
+		/*Shit to BEAMFORMING_VHT_BEAMFORMEE_SOUND_DIM*/
+		SET_FLAG(cur_beamform_cap, GET_VHT_CAPABILITY_ELE_SU_BFER_SOUND_DIM_NUM(pIE->data) << 12);
+
+	}
+	pvhtpriv->beamform_cap = cur_beamform_cap;
+	if (cur_beamform_cap)
+		RTW_INFO("Current VHT Beamforming Setting = %02X\n", cur_beamform_cap);
+#endif /* !RTW_BEAMFORMING_VERSION_2 */
+#endif /* CONFIG_BEAMFORMING */
+	/* B23 B24 B25 Maximum A-MPDU Length Exponent */
+	pvhtpriv->ampdu_len = GET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pIE->data);
+
+	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pIE->data);
+	_rtw_memcpy(vht_mcs, pcap_mcs, 2);
+
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	if ((rf_type == RF_1T1R) || (rf_type == RF_1T2R))
+		vht_mcs[0] |= 0xfc;
+	else if (rf_type == RF_2T2R)
+		vht_mcs[0] |= 0xf0;
+	else if (rf_type == RF_3T3R)
+		vht_mcs[0] |= 0xc0;
+
+	_rtw_memcpy(pvhtpriv->vht_mcs_map, vht_mcs, 2);
+
+	pvhtpriv->vht_highest_rate = rtw_get_vht_highest_rate(pvhtpriv->vht_mcs_map);
+}
+
+void VHT_operation_handler(_adapter *padapter, PNDIS_802_11_VARIABLE_IEs pIE)
+{
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+
+	if (pIE == NULL)
+		return;
+
+	if (pvhtpriv->vht_option == _FALSE)
+		return;
+}
+
+void rtw_process_vht_op_mode_notify(_adapter *padapter, u8 *pframe, PVOID sta)
+{
+	struct sta_info		*psta = (struct sta_info *)sta;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct registry_priv *regsty = adapter_to_regsty(padapter);
+	u8	target_bw;
+	u8	target_rxss, current_rxss;
+	u8	update_ra = _FALSE;
+	u8	vht_mcs_map[2] = {};
+
+	if (pvhtpriv->vht_option == _FALSE)
+		return;
+
+	target_bw = GET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(pframe);
+	target_rxss = (GET_VHT_OPERATING_MODE_FIELD_RX_NSS(pframe) + 1);
+
+	if (target_bw != psta->bw_mode) {
+		if (hal_is_bw_support(padapter, target_bw)
+		    && REGSTY_IS_BW_5G_SUPPORT(regsty, target_bw)
+		   ) {
+			update_ra = _TRUE;
+			psta->bw_mode = target_bw;
+		}
+	}
+
+	current_rxss = rtw_vht_mcsmap_to_nss(psta->vhtpriv.vht_mcs_map);
+	if (target_rxss != current_rxss) {
+		update_ra = _TRUE;
+
+		rtw_vht_nss_to_mcsmap(target_rxss, vht_mcs_map, psta->vhtpriv.vht_mcs_map);
+		_rtw_memcpy(psta->vhtpriv.vht_mcs_map, vht_mcs_map, 2);
+
+		rtw_hal_update_sta_rate_mask(padapter, psta);
+	}
+
+	if (update_ra)
+		rtw_dm_ra_mask_wk_cmd(padapter, (u8 *)psta);
+}
+
+u32	rtw_build_vht_operation_ie(_adapter *padapter, u8 *pbuf, u8 channel)
+{
+	struct registry_priv	*pregistrypriv = &padapter->registrypriv;
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+	/* struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv; */
+	u8	ChnlWidth, center_freq, bw_mode, rf_type = 0;
+	u32	len = 0;
+	u8	operation[5];
+
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+
+	_rtw_memset(operation, 0, 5);
+
+	bw_mode = REGSTY_BW_5G(pregistrypriv); /* TODO: control op bw with other info */
+
+	if (hal_chk_bw_cap(padapter, BW_CAP_80M | BW_CAP_160M)
+	    && REGSTY_BW_5G(pregistrypriv) >= CHANNEL_WIDTH_80
+	   ) {
+		center_freq = rtw_get_center_ch(channel, bw_mode, HAL_PRIME_CHNL_OFFSET_LOWER);
+		ChnlWidth = 1;
+	} else {
+		center_freq = 0;
+		ChnlWidth = 0;
+	}
+
+
+	SET_VHT_OPERATION_ELE_CHL_WIDTH(operation, ChnlWidth);
+	/* center frequency */
+	SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ1(operation, center_freq);/* Todo: need to set correct center channel */
+	SET_VHT_OPERATION_ELE_CHL_CENTER_FREQ2(operation, 0);
+
+	if (padapter->registrypriv.rf_config != RF_MAX_TYPE)
+		rf_type = padapter->registrypriv.rf_config;
+
+	switch (rf_type) {
+	case RF_1T1R:
+		operation[3] = 0xfe;
+		operation[4] = 0xff;
+		break;
+	case RF_1T2R:
+	case RF_2T2R:
+	case RF_2T2R_GREEN:
+		operation[3] = 0xfa;
+		operation[4] = 0xff;
+		break;
+	case RF_2T3R:
+	case RF_2T4R:
+	case RF_3T3R:
+	case RF_3T4R:
+		operation[3] = 0xea;
+		operation[4] = 0xff;
+		break;
+	case RF_4T4R:
+		operation[3] = 0xaa;
+		operation[4] = 0xff;
+		break;
+	default:
+		RTW_INFO("%s, %d, unknown rf type\n", __func__, __LINE__);
+	}
+
+	rtw_set_ie(pbuf, EID_VHTOperation, 5, operation, &len);
+
+	return len;
+}
+
+u32	rtw_build_vht_op_mode_notify_ie(_adapter *padapter, u8 *pbuf, u8 bw)
+{
+	/* struct registry_priv *pregistrypriv = &padapter->registrypriv; */
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
+	u32	len = 0;
+	u8	opmode = 0, rf_type = 0;
+	u8	chnl_width, rx_nss;
+
+	chnl_width = bw;
+
+	rtw_hal_get_hwreg(padapter, HW_VAR_RF_TYPE, (u8 *)(&rf_type));
+	if (rf_type == RF_3T3R)
+		rx_nss = 3;
+	else if (rf_type == RF_2T2R)
+		rx_nss = 2;
+	else
+		rx_nss = 1;
+
+	SET_VHT_OPERATING_MODE_FIELD_CHNL_WIDTH(&opmode, chnl_width);
+	SET_VHT_OPERATING_MODE_FIELD_RX_NSS(&opmode, (rx_nss - 1));
+	SET_VHT_OPERATING_MODE_FIELD_RX_NSS_TYPE(&opmode, 0); /* Todo */
+
+	pvhtpriv->vht_op_mode_notify = opmode;
+
+	pbuf = rtw_set_ie(pbuf, EID_OpModeNotification, 1, &opmode, &len);
+
+	return len;
+}
+
+u32	rtw_build_vht_cap_ie(_adapter *padapter, u8 *pbuf)
+{
+	u8	bw, rf_type, rf_num, rx_stbc_nss = 0;
+	u16	HighestRate;
+	u8	*pcap, *pcap_mcs;
+	u32	len = 0;
+	u32 rx_packet_offset, max_recvbuf_sz;
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
+
+	pcap = pvhtpriv->vht_cap;
+	_rtw_memset(pcap, 0, 32);
+
+	/* B0 B1 Maximum MPDU Length */
+	rtw_hal_get_def_var(padapter, HAL_DEF_RX_PACKET_OFFSET, &rx_packet_offset);
+	rtw_hal_get_def_var(padapter, HAL_DEF_MAX_RECVBUF_SZ, &max_recvbuf_sz);
+
+	RTW_DBG("%s, line%d, Available RX buf size = %d bytes\n.", __FUNCTION__, __LINE__, max_recvbuf_sz - rx_packet_offset);
+
+	if ((max_recvbuf_sz - rx_packet_offset) >= 11454) {
+		SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 2);
+		RTW_INFO("%s, line%d, Set MAX MPDU len = 11454 bytes\n.", __FUNCTION__, __LINE__);
+	} else if ((max_recvbuf_sz - rx_packet_offset) >= 7991) {
+		SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 1);
+		RTW_INFO("%s, line%d, Set MAX MPDU len = 7991 bytes\n.", __FUNCTION__, __LINE__);
+	} else if ((max_recvbuf_sz - rx_packet_offset) >= 3895) {
+		SET_VHT_CAPABILITY_ELE_MAX_MPDU_LENGTH(pcap, 0);
+		RTW_INFO("%s, line%d, Set MAX MPDU len = 3895 bytes\n.", __FUNCTION__, __LINE__);
+	} else
+		RTW_ERR("%s, line%d, Error!! Available RX buf size < 3895 bytes\n.", __FUNCTION__, __LINE__);
+
+	/* B2 B3 Supported Channel Width Set */
+	if (hal_chk_bw_cap(padapter, BW_CAP_160M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_160)) {
+		if (hal_chk_bw_cap(padapter, BW_CAP_80_80M) && REGSTY_IS_BW_5G_SUPPORT(pregistrypriv, CHANNEL_WIDTH_80_80))
+			SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 2);
+		else
+			SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 1);
+	} else
+		SET_VHT_CAPABILITY_ELE_CHL_WIDTH(pcap, 0);
+
+	/* B4 Rx LDPC */
+	if (TEST_FLAG(pvhtpriv->ldpc_cap, LDPC_VHT_ENABLE_RX))
+		SET_VHT_CAPABILITY_ELE_RX_LDPC(pcap, 1);
+
+	/* B5 ShortGI for 80MHz */
+	SET_VHT_CAPABILITY_ELE_SHORT_GI80M(pcap, pvhtpriv->sgi_80m ? 1 : 0); /* We can receive Short GI of 80M */
+
+	/* B6 ShortGI for 160MHz */
+	/* SET_VHT_CAPABILITY_ELE_SHORT_GI160M(pcap, pvhtpriv->sgi_80m? 1 : 0); */
+
+	/* B7 Tx STBC */
+	if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_TX))
+		SET_VHT_CAPABILITY_ELE_TX_STBC(pcap, 1);
+
+	/* B8 B9 B10 Rx STBC */
+	if (TEST_FLAG(pvhtpriv->stbc_cap, STBC_VHT_ENABLE_RX)) {
+		rtw_hal_get_def_var(padapter, HAL_DEF_RX_STBC, (u8 *)(&rx_stbc_nss));
+
+		SET_VHT_CAPABILITY_ELE_RX_STBC(pcap, rx_stbc_nss);
+	}
+
+	/* B11 SU Beamformer Capable */
+	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMER_ENABLE)) {
+		SET_VHT_CAPABILITY_ELE_SU_BFER(pcap, 1);
+		/* B16 17 18 Number of Sounding Dimensions */
+		rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMER_CAP, (u8 *)&rf_num);
+		SET_VHT_CAPABILITY_ELE_SOUNDING_DIMENSIONS(pcap, rf_num);
+		/* B19 MU Beamformer Capable */
+		if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_AP_ENABLE))
+			SET_VHT_CAPABILITY_ELE_MU_BFER(pcap, 1);
+	}
+
+	/* B12 SU Beamformee Capable */
+	if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_BEAMFORMEE_ENABLE)) {
+		SET_VHT_CAPABILITY_ELE_SU_BFEE(pcap, 1);
+		/* B13 14 15 Compressed Steering Number of Beamformer Antennas Supported */
+		rtw_hal_get_def_var(padapter, HAL_DEF_BEAMFORMEE_CAP, (u8 *)&rf_num);
+		SET_VHT_CAPABILITY_ELE_BFER_ANT_SUPP(pcap, rf_num);
+		/* B20 SU Beamformee Capable */
+		if (TEST_FLAG(pvhtpriv->beamform_cap, BEAMFORMING_VHT_MU_MIMO_STA_ENABLE))
+			SET_VHT_CAPABILITY_ELE_MU_BFEE(pcap, 1);
+	}
+
+	/* B21 VHT TXOP PS */
+	SET_VHT_CAPABILITY_ELE_TXOP_PS(pcap, 0);
+	/* B22 +HTC-VHT Capable */
+	SET_VHT_CAPABILITY_ELE_HTC_VHT(pcap, 1);
+	/* B23 24 25 Maximum A-MPDU Length Exponent */
+	if (pregistrypriv->ampdu_factor != 0xFE)
+		SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, pregistrypriv->ampdu_factor);
+	else
+		SET_VHT_CAPABILITY_ELE_MAX_RXAMPDU_FACTOR(pcap, 7);
+	/* B26 27 VHT Link Adaptation Capable */
+	SET_VHT_CAPABILITY_ELE_LINK_ADAPTION(pcap, 0);
+
+	pcap_mcs = GET_VHT_CAPABILITY_ELE_RX_MCS(pcap);
+	_rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2);
+
+	pcap_mcs = GET_VHT_CAPABILITY_ELE_TX_MCS(pcap);
+	_rtw_memcpy(pcap_mcs, pvhtpriv->vht_mcs_map, 2);
+
+	/* find the largest bw supported by both registry and hal */
+	bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv));
+
+	HighestRate = VHT_MCS_DATA_RATE[bw][pvhtpriv->sgi_80m][((pvhtpriv->vht_highest_rate - MGN_VHT1SS_MCS0) & 0x3f)];
+	HighestRate = (HighestRate + 1) >> 1;
+
+	SET_VHT_CAPABILITY_ELE_MCS_RX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest rx rate is 600Mbps. */
+	SET_VHT_CAPABILITY_ELE_MCS_TX_HIGHEST_RATE(pcap, HighestRate); /* indicate we support highest tx rate is 600Mbps. */
+
+	pbuf = rtw_set_ie(pbuf, EID_VHTCapability, 12, pcap, &len);
+
+	return len;
+}
+
+u32 rtw_restructure_vht_ie(_adapter *padapter, u8 *in_ie, u8 *out_ie, uint in_len, uint *pout_len)
+{
+	u32	ielen = 0, out_len = 0;
+	u8	cap_len = 0, notify_len = 0, notify_bw = 0, operation_bw = 0, supported_chnl_width = 0;
+	u8	*p, *pframe;
+	struct registry_priv *pregistrypriv = &padapter->registrypriv;
+	struct mlme_priv	*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv	*pvhtpriv = &pmlmepriv->vhtpriv;
+
+	rtw_vht_use_default_setting(padapter);
+
+	p = rtw_get_ie(in_ie + 12, EID_VHTCapability, &ielen, in_len - 12);
+	if (p && ielen > 0) {
+		supported_chnl_width = GET_VHT_CAPABILITY_ELE_CHL_WIDTH(p + 2);
+
+		/* VHT Capabilities element */
+		cap_len = rtw_build_vht_cap_ie(padapter, out_ie + *pout_len);
+		*pout_len += cap_len;
+
+		/* Get HT BW */
+		p = rtw_get_ie(in_ie + 12, _HT_EXTRA_INFO_IE_, &ielen, in_len - 12);
+		if (p && ielen > 0) {
+			struct HT_info_element *pht_info = (struct HT_info_element *)(p + 2);
+			if (pht_info->infos[0] & BIT(2))
+				operation_bw = CHANNEL_WIDTH_40;
+			else
+				operation_bw = CHANNEL_WIDTH_20;
+		}
+
+		/* VHT Operation element */
+		p = rtw_get_ie(in_ie + 12, EID_VHTOperation, &ielen, in_len - 12);
+		if (p && ielen > 0) {
+			out_len = *pout_len;
+			if (GET_VHT_OPERATION_ELE_CHL_WIDTH(p + 2) >= 1) {
+				if (supported_chnl_width == 2)
+					operation_bw = CHANNEL_WIDTH_80_80;
+				else if (supported_chnl_width == 1)
+					operation_bw = CHANNEL_WIDTH_160;
+				else
+					operation_bw = CHANNEL_WIDTH_80;
+			}
+			pframe = rtw_set_ie(out_ie + out_len, EID_VHTOperation, ielen, p + 2 , pout_len);
+		}
+
+		/* find the largest bw supported by both registry and hal */
+		notify_bw = hal_largest_bw(padapter, REGSTY_BW_5G(pregistrypriv));
+
+		if (notify_bw > operation_bw)
+			notify_bw = operation_bw;
+
+		/* Operating Mode Notification element */
+		notify_len = rtw_build_vht_op_mode_notify_ie(padapter, out_ie + *pout_len, notify_bw);
+		*pout_len += notify_len;
+
+		pvhtpriv->vht_option = _TRUE;
+	}
+
+	return pvhtpriv->vht_option;
+
+}
+
+void VHTOnAssocRsp(_adapter *padapter)
+{
+	struct mlme_priv		*pmlmepriv = &padapter->mlmepriv;
+	struct vht_priv		*pvhtpriv = &pmlmepriv->vhtpriv;
+	struct mlme_ext_priv	*pmlmeext = &padapter->mlmeextpriv;
+	struct mlme_ext_info	*pmlmeinfo = &(pmlmeext->mlmext_info);
+	u8	ht_AMPDU_len;
+
+	RTW_INFO("%s\n", __FUNCTION__);
+
+	if (!pmlmeinfo->HT_enable)
+		return;
+
+	if (!pmlmeinfo->VHT_enable)
+		return;
+
+	ht_AMPDU_len = pmlmeinfo->HT_caps.u.HT_cap_element.AMPDU_para & 0x03;
+
+	if (pvhtpriv->ampdu_len > ht_AMPDU_len)
+		rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_FACTOR, (u8 *)(&pvhtpriv->ampdu_len));
+
+	rtw_hal_set_hwreg(padapter, HW_VAR_AMPDU_MAX_TIME, (u8 *)(&pvhtpriv->vht_highest_rate));
+}
+
+#endif /* CONFIG_80211AC_VHT */

core/rtw_wapi_sms4.c

@@ -0,0 +1,908 @@
+#ifdef CONFIG_WAPI_SUPPORT
+
+#include <linux/unistd.h>
+#include <linux/etherdevice.h>
+#include <drv_types.h>
+#include <rtw_wapi.h>
+
+
+#ifdef CONFIG_WAPI_SW_SMS4
+
+#define WAPI_LITTLE_ENDIAN
+/* #define BIG_ENDIAN */
+#define ENCRYPT  0
+#define DECRYPT  1
+
+
+/**********************************************************
+ **********************************************************/
+const u8 Sbox[256] = {
+	0xd6, 0x90, 0xe9, 0xfe, 0xcc, 0xe1, 0x3d, 0xb7, 0x16, 0xb6, 0x14, 0xc2, 0x28, 0xfb, 0x2c, 0x05,
+	0x2b, 0x67, 0x9a, 0x76, 0x2a, 0xbe, 0x04, 0xc3, 0xaa, 0x44, 0x13, 0x26, 0x49, 0x86, 0x06, 0x99,
+	0x9c, 0x42, 0x50, 0xf4, 0x91, 0xef, 0x98, 0x7a, 0x33, 0x54, 0x0b, 0x43, 0xed, 0xcf, 0xac, 0x62,
+	0xe4, 0xb3, 0x1c, 0xa9, 0xc9, 0x08, 0xe8, 0x95, 0x80, 0xdf, 0x94, 0xfa, 0x75, 0x8f, 0x3f, 0xa6,
+	0x47, 0x07, 0xa7, 0xfc, 0xf3, 0x73, 0x17, 0xba, 0x83, 0x59, 0x3c, 0x19, 0xe6, 0x85, 0x4f, 0xa8,
+	0x68, 0x6b, 0x81, 0xb2, 0x71, 0x64, 0xda, 0x8b, 0xf8, 0xeb, 0x0f, 0x4b, 0x70, 0x56, 0x9d, 0x35,
+	0x1e, 0x24, 0x0e, 0x5e, 0x63, 0x58, 0xd1, 0xa2, 0x25, 0x22, 0x7c, 0x3b, 0x01, 0x21, 0x78, 0x87,
+	0xd4, 0x00, 0x46, 0x57, 0x9f, 0xd3, 0x27, 0x52, 0x4c, 0x36, 0x02, 0xe7, 0xa0, 0xc4, 0xc8, 0x9e,
+	0xea, 0xbf, 0x8a, 0xd2, 0x40, 0xc7, 0x38, 0xb5, 0xa3, 0xf7, 0xf2, 0xce, 0xf9, 0x61, 0x15, 0xa1,
+	0xe0, 0xae, 0x5d, 0xa4, 0x9b, 0x34, 0x1a, 0x55, 0xad, 0x93, 0x32, 0x30, 0xf5, 0x8c, 0xb1, 0xe3,
+	0x1d, 0xf6, 0xe2, 0x2e, 0x82, 0x66, 0xca, 0x60, 0xc0, 0x29, 0x23, 0xab, 0x0d, 0x53, 0x4e, 0x6f,
+	0xd5, 0xdb, 0x37, 0x45, 0xde, 0xfd, 0x8e, 0x2f, 0x03, 0xff, 0x6a, 0x72, 0x6d, 0x6c, 0x5b, 0x51,
+	0x8d, 0x1b, 0xaf, 0x92, 0xbb, 0xdd, 0xbc, 0x7f, 0x11, 0xd9, 0x5c, 0x41, 0x1f, 0x10, 0x5a, 0xd8,
+	0x0a, 0xc1, 0x31, 0x88, 0xa5, 0xcd, 0x7b, 0xbd, 0x2d, 0x74, 0xd0, 0x12, 0xb8, 0xe5, 0xb4, 0xb0,
+	0x89, 0x69, 0x97, 0x4a, 0x0c, 0x96, 0x77, 0x7e, 0x65, 0xb9, 0xf1, 0x09, 0xc5, 0x6e, 0xc6, 0x84,
+	0x18, 0xf0, 0x7d, 0xec, 0x3a, 0xdc, 0x4d, 0x20, 0x79, 0xee, 0x5f, 0x3e, 0xd7, 0xcb, 0x39, 0x48
+};
+
+const u32 CK[32] = {
+	0x00070e15, 0x1c232a31, 0x383f464d, 0x545b6269,
+	0x70777e85, 0x8c939aa1, 0xa8afb6bd, 0xc4cbd2d9,
+	0xe0e7eef5, 0xfc030a11, 0x181f262d, 0x343b4249,
+	0x50575e65, 0x6c737a81, 0x888f969d, 0xa4abb2b9,
+	0xc0c7ced5, 0xdce3eaf1, 0xf8ff060d, 0x141b2229,
+	0x30373e45, 0x4c535a61, 0x686f767d, 0x848b9299,
+	0xa0a7aeb5, 0xbcc3cad1, 0xd8dfe6ed, 0xf4fb0209,
+	0x10171e25, 0x2c333a41, 0x484f565d, 0x646b7279
+};
+
+#define Rotl(_x, _y) (((_x) << (_y)) | ((_x) >> (32 - (_y))))
+
+#define ByteSub(_A) (Sbox[(_A) >> 24 & 0xFF] << 24 | \
+		     Sbox[(_A) >> 16 & 0xFF] << 16 | \
+		     Sbox[(_A) >>  8 & 0xFF] <<  8 | \
+		     Sbox[(_A) & 0xFF])
+
+#define L1(_B) ((_B) ^ Rotl(_B, 2) ^ Rotl(_B, 10) ^ Rotl(_B, 18) ^ Rotl(_B, 24))
+#define L2(_B) ((_B) ^ Rotl(_B, 13) ^ Rotl(_B, 23))
+
+static void
+xor_block(void *dst, void *src1, void *src2)
+/* 128-bit xor: *dst = *src1 xor *src2. Pointers must be 32-bit aligned */
+{
+	((u32 *)dst)[0] = ((u32 *)src1)[0] ^ ((u32 *)src2)[0];
+	((u32 *)dst)[1] = ((u32 *)src1)[1] ^ ((u32 *)src2)[1];
+	((u32 *)dst)[2] = ((u32 *)src1)[2] ^ ((u32 *)src2)[2];
+	((u32 *)dst)[3] = ((u32 *)src1)[3] ^ ((u32 *)src2)[3];
+}
+
+
+void SMS4Crypt(u8 *Input, u8 *Output, u32 *rk)
+{
+	u32 r, mid, x0, x1, x2, x3, *p;
+	p = (u32 *)Input;
+	x0 = p[0];
+	x1 = p[1];
+	x2 = p[2];
+	x3 = p[3];
+#ifdef WAPI_LITTLE_ENDIAN
+	x0 = Rotl(x0, 16);
+	x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
+	x1 = Rotl(x1, 16);
+	x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
+	x2 = Rotl(x2, 16);
+	x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
+	x3 = Rotl(x3, 16);
+	x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
+#endif
+	for (r = 0; r < 32; r += 4) {
+		mid = x1 ^ x2 ^ x3 ^ rk[r + 0];
+		mid = ByteSub(mid);
+		x0 ^= L1(mid);
+		mid = x2 ^ x3 ^ x0 ^ rk[r + 1];
+		mid = ByteSub(mid);
+		x1 ^= L1(mid);
+		mid = x3 ^ x0 ^ x1 ^ rk[r + 2];
+		mid = ByteSub(mid);
+		x2 ^= L1(mid);
+		mid = x0 ^ x1 ^ x2 ^ rk[r + 3];
+		mid = ByteSub(mid);
+		x3 ^= L1(mid);
+	}
+#ifdef WAPI_LITTLE_ENDIAN
+	x0 = Rotl(x0, 16);
+	x0 = ((x0 & 0x00FF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
+	x1 = Rotl(x1, 16);
+	x1 = ((x1 & 0x00FF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
+	x2 = Rotl(x2, 16);
+	x2 = ((x2 & 0x00FF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
+	x3 = Rotl(x3, 16);
+	x3 = ((x3 & 0x00FF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
+#endif
+	p = (u32 *)Output;
+	p[0] = x3;
+	p[1] = x2;
+	p[2] = x1;
+	p[3] = x0;
+}
+
+
+
+void SMS4KeyExt(u8 *Key, u32 *rk, u32 CryptFlag)
+{
+	u32 r, mid, x0, x1, x2, x3, *p;
+
+	p = (u32 *)Key;
+	x0 = p[0];
+	x1 = p[1];
+	x2 = p[2];
+	x3 = p[3];
+#ifdef WAPI_LITTLE_ENDIAN
+	x0 = Rotl(x0, 16);
+	x0 = ((x0 & 0xFF00FF) << 8) | ((x0 & 0xFF00FF00) >> 8);
+	x1 = Rotl(x1, 16);
+	x1 = ((x1 & 0xFF00FF) << 8) | ((x1 & 0xFF00FF00) >> 8);
+	x2 = Rotl(x2, 16);
+	x2 = ((x2 & 0xFF00FF) << 8) | ((x2 & 0xFF00FF00) >> 8);
+	x3 = Rotl(x3, 16);
+	x3 = ((x3 & 0xFF00FF) << 8) | ((x3 & 0xFF00FF00) >> 8);
+#endif
+
+	x0 ^= 0xa3b1bac6;
+	x1 ^= 0x56aa3350;
+	x2 ^= 0x677d9197;
+	x3 ^= 0xb27022dc;
+	for (r = 0; r < 32; r += 4) {
+		mid = x1 ^ x2 ^ x3 ^ CK[r + 0];
+		mid = ByteSub(mid);
+		rk[r + 0] = x0 ^= L2(mid);
+		mid = x2 ^ x3 ^ x0 ^ CK[r + 1];
+		mid = ByteSub(mid);
+		rk[r + 1] = x1 ^= L2(mid);
+		mid = x3 ^ x0 ^ x1 ^ CK[r + 2];
+		mid = ByteSub(mid);
+		rk[r + 2] = x2 ^= L2(mid);
+		mid = x0 ^ x1 ^ x2 ^ CK[r + 3];
+		mid = ByteSub(mid);
+		rk[r + 3] = x3 ^= L2(mid);
+	}
+	if (CryptFlag == DECRYPT) {
+		for (r = 0; r < 16; r++)
+			mid = rk[r], rk[r] = rk[31 - r], rk[31 - r] = mid;
+	}
+}
+
+
+void WapiSMS4Cryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
+		      u8 *Output, u16 *OutputLength, u32 CryptFlag)
+{
+	u32 blockNum, i, j, rk[32];
+	u16 remainder;
+	u8 blockIn[16], blockOut[16], tempIV[16], k;
+
+	*OutputLength = 0;
+	remainder = InputLength & 0x0F;
+	blockNum = InputLength >> 4;
+	if (remainder != 0)
+		blockNum++;
+	else
+		remainder = 16;
+
+	for (k = 0; k < 16; k++)
+		tempIV[k] = IV[15 - k];
+
+	memcpy(blockIn, tempIV, 16);
+
+	SMS4KeyExt((u8 *)Key, rk, CryptFlag);
+
+	for (i = 0; i < blockNum - 1; i++) {
+		SMS4Crypt((u8 *)blockIn, blockOut, rk);
+		xor_block(&Output[i * 16], &Input[i * 16], blockOut);
+		memcpy(blockIn, blockOut, 16);
+	}
+
+	*OutputLength = i * 16;
+
+	SMS4Crypt((u8 *)blockIn, blockOut, rk);
+
+	for (j = 0; j < remainder; j++)
+		Output[i * 16 + j] = Input[i * 16 + j] ^ blockOut[j];
+	*OutputLength += remainder;
+
+}
+
+void WapiSMS4Encryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
+			u8 *Output, u16 *OutputLength)
+{
+
+	WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
+}
+
+void WapiSMS4Decryption(u8 *Key, u8 *IV, u8 *Input, u16 InputLength,
+			u8 *Output, u16 *OutputLength)
+{
+	/* OFB mode: is also ENCRYPT flag */
+	WapiSMS4Cryption(Key, IV, Input, InputLength, Output, OutputLength, ENCRYPT);
+}
+
+void WapiSMS4CalculateMic(u8 *Key, u8 *IV, u8 *Input1, u8 Input1Length,
+		  u8 *Input2, u16 Input2Length, u8 *Output, u8 *OutputLength)
+{
+	u32 blockNum, i, remainder, rk[32];
+	u8 BlockIn[16], BlockOut[16], TempBlock[16], tempIV[16], k;
+
+	*OutputLength = 0;
+	remainder = Input1Length & 0x0F;
+	blockNum = Input1Length >> 4;
+
+	for (k = 0; k < 16; k++)
+		tempIV[k] = IV[15 - k];
+
+	memcpy(BlockIn, tempIV, 16);
+
+	SMS4KeyExt((u8 *)Key, rk, ENCRYPT);
+
+	SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+
+	for (i = 0; i < blockNum; i++) {
+		xor_block(BlockIn, (Input1 + i * 16), BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+
+	if (remainder != 0) {
+		memset(TempBlock, 0, 16);
+		memcpy(TempBlock, (Input1 + blockNum * 16), remainder);
+
+		xor_block(BlockIn, TempBlock, BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+
+	remainder = Input2Length & 0x0F;
+	blockNum = Input2Length >> 4;
+
+	for (i = 0; i < blockNum; i++) {
+		xor_block(BlockIn, (Input2 + i * 16), BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+
+	if (remainder != 0) {
+		memset(TempBlock, 0, 16);
+		memcpy(TempBlock, (Input2 + blockNum * 16), remainder);
+
+		xor_block(BlockIn, TempBlock, BlockOut);
+		SMS4Crypt((u8 *)BlockIn, BlockOut, rk);
+	}
+
+	memcpy(Output, BlockOut, 16);
+	*OutputLength = 16;
+}
+
+void SecCalculateMicSMS4(
+	u8		KeyIdx,
+	u8        *MicKey,
+	u8        *pHeader,
+	u8        *pData,
+	u16       DataLen,
+	u8        *MicBuffer
+)
+{
+#if 0
+	struct ieee80211_hdr_3addr_qos *header;
+	u8 TempBuf[34], TempLen = 32, MicLen, QosOffset, *IV;
+	u16 *pTemp, fc;
+
+	WAPI_TRACE(WAPI_TX | WAPI_RX, "=========>%s\n", __FUNCTION__);
+
+	header = (struct ieee80211_hdr_3addr_qos *)pHeader;
+	memset(TempBuf, 0, 34);
+	memcpy(TempBuf, pHeader, 2); /* FrameCtrl */
+	pTemp = (u16 *)TempBuf;
+	*pTemp &= 0xc78f;       /* bit4,5,6,11,12,13 */
+
+	memcpy((TempBuf + 2), (pHeader + 4), 12); /* Addr1, Addr2 */
+	memcpy((TempBuf + 14), (pHeader + 22), 2); /* SeqCtrl */
+	pTemp = (u16 *)(TempBuf + 14);
+	*pTemp &= 0x000f;
+
+	memcpy((TempBuf + 16), (pHeader + 16), 6); /* Addr3 */
+
+	fc = le16_to_cpu(header->frame_ctl);
+
+
+
+	if (GetFrDs((u16 *)&fc) && GetToDs((u16 *)&fc)) {
+		memcpy((TempBuf + 22), (pHeader + 24), 6);
+		QosOffset = 30;
+	} else {
+		memset((TempBuf + 22), 0, 6);
+		QosOffset = 24;
+	}
+
+	if ((fc & 0x0088) == 0x0088) {
+		memcpy((TempBuf + 28), (pHeader + QosOffset), 2);
+		TempLen += 2;
+		/* IV = pHeader + QosOffset + 2 + SNAP_SIZE + sizeof(u16) + 2; */
+		IV = pHeader + QosOffset + 2 + 2;
+	} else {
+		IV = pHeader + QosOffset + 2;
+		/* IV = pHeader + QosOffset + SNAP_SIZE + sizeof(u16) + 2; */
+	}
+
+	TempBuf[TempLen - 1] = (u8)(DataLen & 0xff);
+	TempBuf[TempLen - 2] = (u8)((DataLen & 0xff00) >> 8);
+	TempBuf[TempLen - 4] = KeyIdx;
+
+	WAPI_DATA(WAPI_TX, "CalculateMic - KEY", MicKey, 16);
+	WAPI_DATA(WAPI_TX, "CalculateMic - IV", IV, 16);
+	WAPI_DATA(WAPI_TX, "CalculateMic - TempBuf", TempBuf, TempLen);
+	WAPI_DATA(WAPI_TX, "CalculateMic - pData", pData, DataLen);
+
+	WapiSMS4CalculateMic(MicKey, IV, TempBuf, TempLen,
+			     pData, DataLen, MicBuffer, &MicLen);
+
+	if (MicLen != 16)
+		WAPI_TRACE(WAPI_ERR, "%s: MIC Length Error!!\n", __FUNCTION__);
+
+	WAPI_TRACE(WAPI_TX | WAPI_RX, "<=========%s\n", __FUNCTION__);
+#endif
+}
+
+/* AddCount: 1 or 2.
+ *  If overflow, return 1,
+ *  else return 0.
+ */
+u8 WapiIncreasePN(u8 *PN, u8 AddCount)
+{
+	u8  i;
+
+	if (NULL == PN)
+		return 1;
+	/* YJ,test,091102 */
+	/*
+	if(AddCount == 2){
+		RTW_INFO("############################%s(): PN[0]=0x%x\n", __FUNCTION__, PN[0]);
+		if(PN[0] == 0x48){
+			PN[0] += AddCount;
+			return 1;
+		}else{
+			PN[0] += AddCount;
+			return 0;
+		}
+	}
+	*/
+	/* YJ,test,091102,end */
+
+	for (i = 0; i < 16; i++) {
+		if (PN[i] + AddCount <= 0xff) {
+			PN[i] += AddCount;
+			return 0;
+		} else {
+			PN[i] += AddCount;
+			AddCount = 1;
+		}
+	}
+	return 1;
+}
+
+
+void WapiGetLastRxUnicastPNForQoSData(
+	u8			UserPriority,
+	PRT_WAPI_STA_INFO    pWapiStaInfo,
+	u8 *PNOut
+)
+{
+	WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
+	switch (UserPriority) {
+	case 0:
+	case 3:
+		memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBEQueue, 16);
+		break;
+	case 1:
+	case 2:
+		memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNBKQueue, 16);
+		break;
+	case 4:
+	case 5:
+		memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVIQueue, 16);
+		break;
+	case 6:
+	case 7:
+		memcpy(PNOut, pWapiStaInfo->lastRxUnicastPNVOQueue, 16);
+		break;
+	default:
+		WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__);
+		break;
+	}
+	WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
+}
+
+
+void WapiSetLastRxUnicastPNForQoSData(
+	u8		UserPriority,
+	u8           *PNIn,
+	PRT_WAPI_STA_INFO    pWapiStaInfo
+)
+{
+	WAPI_TRACE(WAPI_RX, "===========> %s\n", __FUNCTION__);
+	switch (UserPriority) {
+	case 0:
+	case 3:
+		memcpy(pWapiStaInfo->lastRxUnicastPNBEQueue, PNIn, 16);
+		break;
+	case 1:
+	case 2:
+		memcpy(pWapiStaInfo->lastRxUnicastPNBKQueue, PNIn, 16);
+		break;
+	case 4:
+	case 5:
+		memcpy(pWapiStaInfo->lastRxUnicastPNVIQueue, PNIn, 16);
+		break;
+	case 6:
+	case 7:
+		memcpy(pWapiStaInfo->lastRxUnicastPNVOQueue, PNIn, 16);
+		break;
+	default:
+		WAPI_TRACE(WAPI_ERR, "%s: Unknown TID\n", __FUNCTION__);
+		break;
+	}
+	WAPI_TRACE(WAPI_RX, "<=========== %s\n", __FUNCTION__);
+}
+
+
+/****************************************************************************
+ FALSE not RX-Reorder
+ TRUE do RX Reorder
+add to support WAPI to N-mode
+*****************************************************************************/
+u8 WapiCheckPnInSwDecrypt(
+	_adapter *padapter,
+	struct sk_buff *pskb
+)
+{
+	u8				ret = false;
+
+#if 0
+	struct ieee80211_hdr_3addr_qos *header;
+	u16				fc;
+	u8				*pDaddr, *pTaddr, *pRaddr;
+
+	header = (struct ieee80211_hdr_3addr_qos *)pskb->data;
+	pTaddr = header->addr2;
+	pRaddr = header->addr1;
+	fc = le16_to_cpu(header->frame_ctl);
+
+	if (GetToDs(&fc))
+		pDaddr = header->addr3;
+	else
+		pDaddr = header->addr1;
+
+	if ((_rtw_memcmp(pRaddr, padapter->pnetdev->dev_addr, ETH_ALEN) == 0)
+	    &&	!(pDaddr)
+	    && (GetFrameType(&fc) == WIFI_QOS_DATA_TYPE))
+		/* && ieee->pHTInfo->bCurrentHTSupport && */
+		/* ieee->pHTInfo->bCurRxReorderEnable) */
+		ret = false;
+	else
+		ret = true;
+#endif
+	WAPI_TRACE(WAPI_RX, "%s: return %d\n", __FUNCTION__, ret);
+	return ret;
+}
+
+int SecSMS4HeaderFillIV(_adapter *padapter, u8 *pxmitframe)
+{
+	struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
+	u8 *frame = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
+	u8 *pSecHeader = NULL, *pos = NULL, *pRA = NULL;
+	u8 bPNOverflow = false, bFindMatchPeer = false, hdr_len = 0;
+	PWLAN_HEADER_WAPI_EXTENSION pWapiExt = NULL;
+	PRT_WAPI_T         pWapiInfo = &padapter->wapiInfo;
+	PRT_WAPI_STA_INFO  pWapiSta = NULL;
+	int ret = 0;
+
+	WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
+
+	return ret;
+#if 0
+	hdr_len = sMacHdrLng;
+	if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE)
+		hdr_len += 2;
+	/* hdr_len += SNAP_SIZE + sizeof(u16); */
+
+	pos = skb_push(pskb, padapter->wapiInfo.extra_prefix_len);
+	memmove(pos, pos + padapter->wapiInfo.extra_prefix_len, hdr_len);
+
+	pSecHeader = pskb->data + hdr_len;
+	pWapiExt = (PWLAN_HEADER_WAPI_EXTENSION)pSecHeader;
+	pRA = pskb->data + 4;
+
+	WAPI_DATA(WAPI_TX, "FillIV - Before Fill IV", pskb->data, pskb->len);
+
+	/* Address 1 is always receiver's address */
+	if (IS_MCAST(pRA)) {
+		if (!pWapiInfo->wapiTxMsk.bTxEnable) {
+			WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__);
+			return -2;
+		}
+		if (pWapiInfo->wapiTxMsk.keyId <= 1) {
+			pWapiExt->KeyIdx = pWapiInfo->wapiTxMsk.keyId;
+			pWapiExt->Reserved = 0;
+			bPNOverflow = WapiIncreasePN(pWapiInfo->lastTxMulticastPN, 1);
+			memcpy(pWapiExt->PN, pWapiInfo->lastTxMulticastPN, 16);
+			if (bPNOverflow) {
+				/* Update MSK Notification. */
+				WAPI_TRACE(WAPI_ERR, "===============>%s():multicast PN overflow\n", __FUNCTION__);
+				rtw_wapi_app_event_handler(padapter, NULL, 0, pRA, false, false, true, 0, false);
+			}
+		} else {
+			WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Multicast KeyIdx!!\n", __FUNCTION__);
+			ret = -3;
+		}
+	} else {
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if (!memcmp(pWapiSta->PeerMacAddr, pRA, 6)) {
+				bFindMatchPeer = true;
+				break;
+			}
+		}
+		if (bFindMatchPeer) {
+			if ((!pWapiSta->wapiUskUpdate.bTxEnable) && (!pWapiSta->wapiUsk.bTxEnable)) {
+				WAPI_TRACE(WAPI_ERR, "%s: bTxEnable = 0!!\n", __FUNCTION__);
+				return -4;
+			}
+			if (pWapiSta->wapiUsk.keyId <= 1) {
+				if (pWapiSta->wapiUskUpdate.bTxEnable)
+					pWapiExt->KeyIdx = pWapiSta->wapiUskUpdate.keyId;
+				else
+					pWapiExt->KeyIdx = pWapiSta->wapiUsk.keyId;
+
+				pWapiExt->Reserved = 0;
+				bPNOverflow = WapiIncreasePN(pWapiSta->lastTxUnicastPN, 2);
+				memcpy(pWapiExt->PN, pWapiSta->lastTxUnicastPN, 16);
+				if (bPNOverflow) {
+					/* Update USK Notification. */
+					WAPI_TRACE(WAPI_ERR, "===============>%s():unicast PN overflow\n", __FUNCTION__);
+					rtw_wapi_app_event_handler(padapter, NULL, 0, pWapiSta->PeerMacAddr, false, true, false, 0, false);
+				}
+			} else {
+				WAPI_TRACE(WAPI_ERR, "%s: Invalid Wapi Unicast KeyIdx!!\n", __FUNCTION__);
+				ret = -5;
+			}
+		} else {
+			WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT"!!\n", __FUNCTION__, MAC_ARG(pRA));
+			ret = -6;
+		}
+	}
+
+	WAPI_DATA(WAPI_TX, "FillIV - After Fill IV", pskb->data, pskb->len);
+	WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
+	return ret;
+#endif
+}
+
+/* WAPI SW Enc: must have done Coalesce! */
+void SecSWSMS4Encryption(
+	_adapter *padapter,
+	u8 *pxmitframe
+)
+{
+	PRT_WAPI_T		pWapiInfo = &padapter->wapiInfo;
+	PRT_WAPI_STA_INFO   pWapiSta = NULL;
+	u8 *pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_SIZE;
+	struct pkt_attrib *pattrib = &((struct xmit_frame *)pxmitframe)->attrib;
+
+	u8 *SecPtr = NULL, *pRA, *pMicKey = NULL, *pDataKey = NULL, *pIV = NULL;
+	u8 IVOffset, DataOffset, bFindMatchPeer = false, KeyIdx = 0, MicBuffer[16];
+	u16 OutputLength;
+
+	WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
+
+	WAPI_TRACE(WAPI_TX, "hdrlen: %d\n", pattrib->hdrlen);
+
+	return;
+
+	DataOffset = pattrib->hdrlen + pattrib->iv_len;
+
+	pRA = pframe + 4;
+
+
+	if (IS_MCAST(pRA)) {
+		KeyIdx = pWapiInfo->wapiTxMsk.keyId;
+		pIV = pWapiInfo->lastTxMulticastPN;
+		pMicKey = pWapiInfo->wapiTxMsk.micKey;
+		pDataKey = pWapiInfo->wapiTxMsk.dataKey;
+	} else {
+		if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) {
+			list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+				if (0 == memcmp(pWapiSta->PeerMacAddr, pRA, 6)) {
+					bFindMatchPeer = true;
+					break;
+				}
+			}
+
+			if (bFindMatchPeer) {
+				if (pWapiSta->wapiUskUpdate.bTxEnable) {
+					KeyIdx = pWapiSta->wapiUskUpdate.keyId;
+					WAPI_TRACE(WAPI_TX, "%s(): Use update USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
+					pIV = pWapiSta->lastTxUnicastPN;
+					pMicKey = pWapiSta->wapiUskUpdate.micKey;
+					pDataKey = pWapiSta->wapiUskUpdate.dataKey;
+				} else {
+					KeyIdx = pWapiSta->wapiUsk.keyId;
+					WAPI_TRACE(WAPI_TX, "%s(): Use USK!! KeyIdx=%d\n", __FUNCTION__, KeyIdx);
+					pIV = pWapiSta->lastTxUnicastPN;
+					pMicKey = pWapiSta->wapiUsk.micKey;
+					pDataKey = pWapiSta->wapiUsk.dataKey;
+				}
+			} else {
+				WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta!!\n", __FUNCTION__);
+				return;
+			}
+		} else {
+			WAPI_TRACE(WAPI_ERR, "%s: wapiSTAUsedList is empty!!\n", __FUNCTION__);
+			return;
+		}
+	}
+
+	SecPtr = pframe;
+	SecCalculateMicSMS4(KeyIdx, pMicKey, SecPtr, (SecPtr + DataOffset), pattrib->pktlen, MicBuffer);
+
+	WAPI_DATA(WAPI_TX, "Encryption - MIC", MicBuffer, padapter->wapiInfo.extra_postfix_len);
+
+	memcpy(pframe + pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen - pattrib->icv_len,
+	       (u8 *)MicBuffer,
+	       padapter->wapiInfo.extra_postfix_len
+	      );
+
+
+	WapiSMS4Encryption(pDataKey, pIV, (SecPtr + DataOffset), pattrib->pktlen + pattrib->icv_len, (SecPtr + DataOffset), &OutputLength);
+
+	WAPI_DATA(WAPI_TX, "Encryption - After SMS4 encryption", pframe, pattrib->hdrlen + pattrib->iv_len + pattrib->pktlen);
+
+	WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
+}
+
+u8 SecSWSMS4Decryption(
+	_adapter *padapter,
+	u8		*precv_frame,
+	struct recv_priv *precv_priv
+)
+{
+	PRT_WAPI_T pWapiInfo = &padapter->wapiInfo;
+	struct recv_frame_hdr *precv_hdr;
+	PRT_WAPI_STA_INFO   pWapiSta = NULL;
+	u8 IVOffset, DataOffset, bFindMatchPeer = false, bUseUpdatedKey = false;
+	u8 KeyIdx, MicBuffer[16], lastRxPNforQoS[16];
+	u8 *pRA, *pTA, *pMicKey, *pDataKey, *pLastRxPN, *pRecvPN, *pSecData, *pRecvMic, *pos;
+	u8 TID = 0;
+	u16 OutputLength, DataLen;
+	u8   bQosData;
+	struct sk_buff	*pskb;
+
+	WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__);
+
+	return 0;
+
+	precv_hdr = &((union recv_frame *)precv_frame)->u.hdr;
+	pskb = (struct sk_buff *)(precv_hdr->rx_data);
+	precv_hdr->bWapiCheckPNInDecrypt = WapiCheckPnInSwDecrypt(padapter, pskb);
+	WAPI_TRACE(WAPI_RX, "=========>%s: check PN  %d\n", __FUNCTION__, precv_hdr->bWapiCheckPNInDecrypt);
+	WAPI_DATA(WAPI_RX, "Decryption - Before decryption", pskb->data, pskb->len);
+
+	IVOffset = sMacHdrLng;
+	bQosData = GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE;
+	if (bQosData)
+		IVOffset += 2;
+
+	/* if(GetHTC()) */
+	/*	IVOffset += 4; */
+
+	/* IVOffset += SNAP_SIZE + sizeof(u16); */
+
+	DataOffset = IVOffset + padapter->wapiInfo.extra_prefix_len;
+
+	pRA = pskb->data + 4;
+	pTA = pskb->data + 10;
+	KeyIdx = *(pskb->data + IVOffset);
+	pRecvPN = pskb->data + IVOffset + 2;
+	pSecData = pskb->data + DataOffset;
+	DataLen = pskb->len - DataOffset;
+	pRecvMic = pskb->data + pskb->len - padapter->wapiInfo.extra_postfix_len;
+	TID = GetTid(pskb->data);
+
+	if (!list_empty(&(pWapiInfo->wapiSTAUsedList))) {
+		list_for_each_entry(pWapiSta, &pWapiInfo->wapiSTAUsedList, list) {
+			if (0 == memcmp(pWapiSta->PeerMacAddr, pTA, 6)) {
+				bFindMatchPeer = true;
+				break;
+			}
+		}
+	}
+
+	if (!bFindMatchPeer) {
+		WAPI_TRACE(WAPI_ERR, "%s: Can not find Peer Sta "MAC_FMT" for Key Info!!!\n", __FUNCTION__, MAC_ARG(pTA));
+		return false;
+	}
+
+	if (IS_MCAST(pRA)) {
+		WAPI_TRACE(WAPI_RX, "%s: Multicast decryption !!!\n", __FUNCTION__);
+		if (pWapiSta->wapiMsk.keyId == KeyIdx && pWapiSta->wapiMsk.bSet) {
+			pLastRxPN = pWapiSta->lastRxMulticastPN;
+			if (!WapiComparePN(pRecvPN, pLastRxPN)) {
+				WAPI_TRACE(WAPI_ERR, "%s: MSK PN is not larger than last, Dropped!!!\n", __FUNCTION__);
+				WAPI_DATA(WAPI_ERR, "pRecvPN:", pRecvPN, 16);
+				WAPI_DATA(WAPI_ERR, "pLastRxPN:", pLastRxPN, 16);
+				return false;
+			}
+
+			memcpy(pLastRxPN, pRecvPN, 16);
+			pMicKey = pWapiSta->wapiMsk.micKey;
+			pDataKey = pWapiSta->wapiMsk.dataKey;
+		} else if (pWapiSta->wapiMskUpdate.keyId == KeyIdx && pWapiSta->wapiMskUpdate.bSet) {
+			WAPI_TRACE(WAPI_RX, "%s: Use Updated MSK for Decryption !!!\n", __FUNCTION__);
+			bUseUpdatedKey = true;
+			memcpy(pWapiSta->lastRxMulticastPN, pRecvPN, 16);
+			pMicKey = pWapiSta->wapiMskUpdate.micKey;
+			pDataKey = pWapiSta->wapiMskUpdate.dataKey;
+		} else {
+			WAPI_TRACE(WAPI_ERR, "%s: Can not find MSK with matched KeyIdx(%d), Dropped !!!\n", __FUNCTION__, KeyIdx);
+			return false;
+		}
+	} else {
+		WAPI_TRACE(WAPI_RX, "%s: Unicast decryption !!!\n", __FUNCTION__);
+		if (pWapiSta->wapiUsk.keyId == KeyIdx && pWapiSta->wapiUsk.bSet) {
+			WAPI_TRACE(WAPI_RX, "%s: Use USK for Decryption!!!\n", __FUNCTION__);
+			if (precv_hdr->bWapiCheckPNInDecrypt) {
+				if (GetFrameType(pskb->data) == WIFI_QOS_DATA_TYPE) {
+					WapiGetLastRxUnicastPNForQoSData(TID, pWapiSta, lastRxPNforQoS);
+					pLastRxPN = lastRxPNforQoS;
+				} else
+					pLastRxPN = pWapiSta->lastRxUnicastPN;
+				if (!WapiComparePN(pRecvPN, pLastRxPN))
+					return false;
+				if (bQosData)
+					WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
+				else
+					memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
+			} else
+				memcpy(precv_hdr->WapiTempPN, pRecvPN, 16);
+
+			if (check_fwstate(&padapter->mlmepriv, WIFI_STATION_STATE)) {
+				if ((pRecvPN[0] & 0x1) == 0) {
+					WAPI_TRACE(WAPI_ERR, "%s: Rx USK PN is not odd when Infra STA mode, Dropped !!!\n", __FUNCTION__);
+					return false;
+				}
+			}
+
+			pMicKey = pWapiSta->wapiUsk.micKey;
+			pDataKey = pWapiSta->wapiUsk.dataKey;
+		} else if (pWapiSta->wapiUskUpdate.keyId == KeyIdx && pWapiSta->wapiUskUpdate.bSet) {
+			WAPI_TRACE(WAPI_RX, "%s: Use Updated USK for Decryption!!!\n", __FUNCTION__);
+			if (pWapiSta->bAuthenticatorInUpdata)
+				bUseUpdatedKey = true;
+			else
+				bUseUpdatedKey = false;
+
+			if (bQosData)
+				WapiSetLastRxUnicastPNForQoSData(TID, pRecvPN, pWapiSta);
+			else
+				memcpy(pWapiSta->lastRxUnicastPN, pRecvPN, 16);
+			pMicKey = pWapiSta->wapiUskUpdate.micKey;
+			pDataKey = pWapiSta->wapiUskUpdate.dataKey;
+		} else {
+			WAPI_TRACE(WAPI_ERR, "%s: No valid USK!!!KeyIdx=%d pWapiSta->wapiUsk.keyId=%d pWapiSta->wapiUskUpdate.keyId=%d\n", __FUNCTION__, KeyIdx, pWapiSta->wapiUsk.keyId,
+				   pWapiSta->wapiUskUpdate.keyId);
+			/* dump_buf(pskb->data,pskb->len); */
+			return false;
+		}
+	}
+
+	WAPI_DATA(WAPI_RX, "Decryption - DataKey", pDataKey, 16);
+	WAPI_DATA(WAPI_RX, "Decryption - IV", pRecvPN, 16);
+	WapiSMS4Decryption(pDataKey, pRecvPN, pSecData, DataLen, pSecData, &OutputLength);
+
+	if (OutputLength != DataLen)
+		WAPI_TRACE(WAPI_ERR, "%s:  Output Length Error!!!!\n", __FUNCTION__);
+
+	WAPI_DATA(WAPI_RX, "Decryption - After decryption", pskb->data, pskb->len);
+
+	DataLen -= padapter->wapiInfo.extra_postfix_len;
+
+	SecCalculateMicSMS4(KeyIdx, pMicKey, pskb->data, pSecData, DataLen, MicBuffer);
+
+	WAPI_DATA(WAPI_RX, "Decryption - MIC received", pRecvMic, SMS4_MIC_LEN);
+	WAPI_DATA(WAPI_RX, "Decryption - MIC calculated", MicBuffer, SMS4_MIC_LEN);
+
+	if (0 == memcmp(MicBuffer, pRecvMic, padapter->wapiInfo.extra_postfix_len)) {
+		WAPI_TRACE(WAPI_RX, "%s: Check MIC OK!!\n", __FUNCTION__);
+		if (bUseUpdatedKey) {
+			/* delete the old key */
+			if (IS_MCAST(pRA)) {
+				WAPI_TRACE(WAPI_API, "%s(): AE use new update MSK!!\n", __FUNCTION__);
+				pWapiSta->wapiMsk.keyId = pWapiSta->wapiMskUpdate.keyId;
+				memcpy(pWapiSta->wapiMsk.dataKey, pWapiSta->wapiMskUpdate.dataKey, 16);
+				memcpy(pWapiSta->wapiMsk.micKey, pWapiSta->wapiMskUpdate.micKey, 16);
+				pWapiSta->wapiMskUpdate.bTxEnable = pWapiSta->wapiMskUpdate.bSet = false;
+			} else {
+				WAPI_TRACE(WAPI_API, "%s(): AE use new update USK!!\n", __FUNCTION__);
+				pWapiSta->wapiUsk.keyId = pWapiSta->wapiUskUpdate.keyId;
+				memcpy(pWapiSta->wapiUsk.dataKey, pWapiSta->wapiUskUpdate.dataKey, 16);
+				memcpy(pWapiSta->wapiUsk.micKey, pWapiSta->wapiUskUpdate.micKey, 16);
+				pWapiSta->wapiUskUpdate.bTxEnable = pWapiSta->wapiUskUpdate.bSet = false;
+			}
+		}
+	} else {
+		WAPI_TRACE(WAPI_ERR, "%s:  Check MIC Error, Dropped !!!!\n", __FUNCTION__);
+		return false;
+	}
+
+	pos = pskb->data;
+	memmove(pos + padapter->wapiInfo.extra_prefix_len, pos, IVOffset);
+	skb_pull(pskb, padapter->wapiInfo.extra_prefix_len);
+
+	WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
+
+	return true;
+}
+
+u32	rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
+{
+
+	u8	*pframe;
+	u32 res = _SUCCESS;
+
+	WAPI_TRACE(WAPI_TX, "=========>%s\n", __FUNCTION__);
+
+	if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) {
+		WAPI_TRACE(WAPI_TX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__);
+		return _FAIL;
+	}
+
+	if (((struct xmit_frame *)pxmitframe)->buf_addr == NULL)
+		return _FAIL;
+
+	pframe = ((struct xmit_frame *)pxmitframe)->buf_addr + TXDESC_OFFSET;
+
+	SecSWSMS4Encryption(padapter, pxmitframe);
+
+	WAPI_TRACE(WAPI_TX, "<=========%s\n", __FUNCTION__);
+	return res;
+}
+
+u32	rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
+{
+	u8	*pframe;
+	u32 res = _SUCCESS;
+
+	WAPI_TRACE(WAPI_RX, "=========>%s\n", __FUNCTION__);
+
+	if ((!padapter->WapiSupport) || (!padapter->wapiInfo.bWapiEnable)) {
+		WAPI_TRACE(WAPI_RX, "<========== %s, WAPI not supported or enabled!\n", __FUNCTION__);
+		return _FAIL;
+	}
+
+
+	/* drop packet when hw decrypt fail
+	* return tempraily */
+	return _FAIL;
+
+	/* pframe=(unsigned char *)((union recv_frame*)precvframe)->u.hdr.rx_data; */
+
+	if (false == SecSWSMS4Decryption(padapter, precvframe, &padapter->recvpriv)) {
+		WAPI_TRACE(WAPI_ERR, "%s():SMS4 decrypt frame error\n", __FUNCTION__);
+		return _FAIL;
+	}
+
+	WAPI_TRACE(WAPI_RX, "<=========%s\n", __FUNCTION__);
+	return res;
+}
+
+#else
+
+u32	rtw_sms4_encrypt(_adapter *padapter, u8 *pxmitframe)
+{
+	WAPI_TRACE(WAPI_TX, "=========>Dummy %s\n", __FUNCTION__);
+	WAPI_TRACE(WAPI_TX, "<=========Dummy %s\n", __FUNCTION__);
+	return _SUCCESS;
+}
+
+u32	rtw_sms4_decrypt(_adapter *padapter, u8 *precvframe)
+{
+	WAPI_TRACE(WAPI_RX, "=========>Dummy %s\n", __FUNCTION__);
+	WAPI_TRACE(WAPI_RX, "<=========Dummy %s\n", __FUNCTION__);
+	return _SUCCESS;
+}
+
+#endif
+
+#endif

hal/HalPwrSeqCmd.c

@@ -0,0 +1,177 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+/*++
+Copyright (c) Realtek Semiconductor Corp. All rights reserved.
+
+Module Name:
+	HalPwrSeqCmd.c
+
+Abstract:
+	Implement HW Power sequence configuration CMD handling routine for Realtek devices.
+
+Major Change History:
+	When       Who               What
+	---------- ---------------   -------------------------------
+	2011-10-26 Lucas            Modify to be compatible with SD4-CE driver.
+	2011-07-07 Roger            Create.
+
+--*/
+#include <HalPwrSeqCmd.h>
+
+
+/*
+ *	Description:
+ *		This routine deal with the Power Configuration CMDs parsing for RTL8723/RTL8188E Series IC.
+ *
+ *	Assumption:
+ *		We should follow specific format which was released from HW SD.
+ *
+ *	2011.07.07, added by Roger.
+ *   */
+u8 HalPwrSeqCmdParsing(
+	PADAPTER		padapter,
+	u8				CutVersion,
+	u8				FabVersion,
+	u8				InterfaceType,
+	WLAN_PWR_CFG	PwrSeqCmd[])
+{
+	WLAN_PWR_CFG	PwrCfgCmd = {0};
+	u8				bPollingBit = _FALSE;
+	u32				AryIdx = 0;
+	u8				value = 0;
+	u32				offset = 0;
+	u32				pollingCount = 0; /* polling autoload done. */
+	u32				maxPollingCnt = 5000;
+
+	do {
+		PwrCfgCmd = PwrSeqCmd[AryIdx];
+
+		RT_TRACE(_module_hal_init_c_ , _drv_info_,
+			("HalPwrSeqCmdParsing: offset(%#x) cut_msk(%#x) fab_msk(%#x) interface_msk(%#x) base(%#x) cmd(%#x) msk(%#x) value(%#x)\n",
+			  GET_PWR_CFG_OFFSET(PwrCfgCmd),
+			  GET_PWR_CFG_CUT_MASK(PwrCfgCmd),
+			  GET_PWR_CFG_FAB_MASK(PwrCfgCmd),
+			  GET_PWR_CFG_INTF_MASK(PwrCfgCmd),
+			  GET_PWR_CFG_BASE(PwrCfgCmd),
+			  GET_PWR_CFG_CMD(PwrCfgCmd),
+			  GET_PWR_CFG_MASK(PwrCfgCmd),
+			  GET_PWR_CFG_VALUE(PwrCfgCmd)));
+
+		/* 2 Only Handle the command whose FAB, CUT, and Interface are matched */
+		if ((GET_PWR_CFG_FAB_MASK(PwrCfgCmd) & FabVersion) &&
+		    (GET_PWR_CFG_CUT_MASK(PwrCfgCmd) & CutVersion) &&
+		    (GET_PWR_CFG_INTF_MASK(PwrCfgCmd) & InterfaceType)) {
+			switch (GET_PWR_CFG_CMD(PwrCfgCmd)) {
+			case PWR_CMD_READ:
+				RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_READ\n"));
+				break;
+
+			case PWR_CMD_WRITE:
+				RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_WRITE\n"));
+				offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
+
+#ifdef CONFIG_SDIO_HCI
+				/*  */
+				/* <Roger_Notes> We should deal with interface specific address mapping for some interfaces, e.g., SDIO interface */
+				/* 2011.07.07. */
+				/*  */
+				if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO) {
+					/* Read Back SDIO Local value */
+					value = SdioLocalCmd52Read1Byte(padapter, offset);
+
+					value &= ~(GET_PWR_CFG_MASK(PwrCfgCmd));
+					value |= (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
+
+					/* Write Back SDIO Local value */
+					SdioLocalCmd52Write1Byte(padapter, offset, value);
+				} else
+#endif
+				{
+#ifdef CONFIG_GSPI_HCI
+					if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
+						offset = SPI_LOCAL_OFFSET | offset;
+#endif
+					/* Read the value from system register */
+					value = rtw_read8(padapter, offset);
+
+					value = value & (~(GET_PWR_CFG_MASK(PwrCfgCmd)));
+					value = value | (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd));
+
+					/* Write the value back to sytem register */
+					rtw_write8(padapter, offset, value);
+				}
+				break;
+
+			case PWR_CMD_POLLING:
+				RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_POLLING\n"));
+
+				bPollingBit = _FALSE;
+				offset = GET_PWR_CFG_OFFSET(PwrCfgCmd);
+#ifdef CONFIG_GSPI_HCI
+				if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
+					offset = SPI_LOCAL_OFFSET | offset;
+#endif
+				do {
+#ifdef CONFIG_SDIO_HCI
+					if (GET_PWR_CFG_BASE(PwrCfgCmd) == PWR_BASEADDR_SDIO)
+						value = SdioLocalCmd52Read1Byte(padapter, offset);
+					else
+#endif
+						value = rtw_read8(padapter, offset);
+
+					value = value & GET_PWR_CFG_MASK(PwrCfgCmd);
+					if (value == (GET_PWR_CFG_VALUE(PwrCfgCmd) & GET_PWR_CFG_MASK(PwrCfgCmd)))
+						bPollingBit = _TRUE;
+					else
+						rtw_udelay_os(10);
+
+					if (pollingCount++ > maxPollingCnt) {
+						RTW_ERR("HalPwrSeqCmdParsing: Fail to polling Offset[%#x]=%02x\n", offset, value);
+						return _FALSE;
+					}
+				} while (!bPollingBit);
+
+				break;
+
+			case PWR_CMD_DELAY:
+				RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_DELAY\n"));
+				if (GET_PWR_CFG_VALUE(PwrCfgCmd) == PWRSEQ_DELAY_US)
+					rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd));
+				else
+					rtw_udelay_os(GET_PWR_CFG_OFFSET(PwrCfgCmd) * 1000);
+				break;
+
+			case PWR_CMD_END:
+				/* When this command is parsed, end the process */
+				RT_TRACE(_module_hal_init_c_ , _drv_info_, ("HalPwrSeqCmdParsing: PWR_CMD_END\n"));
+				return _TRUE;
+				break;
+
+			default:
+				RT_TRACE(_module_hal_init_c_ , _drv_err_, ("HalPwrSeqCmdParsing: Unknown CMD!!\n"));
+				break;
+			}
+		}
+
+		AryIdx++;/* Add Array Index */
+	} while (1);
+
+	return _TRUE;
+}

hal/btc/HalBtc8188c2Ant.h

@@ -0,0 +1,149 @@
+//===========================================
+// The following is for 8188C 2Ant BT Co-exist definition
+//===========================================
+#define		BTC_RSSI_COEX_THRESH_TOL_8188C_2ANT		6
+
+typedef enum _BT_INFO_SRC_8188C_2ANT{
+	BT_INFO_SRC_8188C_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8188C_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8188C_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8188C_2ANT_MAX
+}BT_INFO_SRC_8188C_2ANT,*PBT_INFO_SRC_8188C_2ANT;
+
+typedef enum _BT_8188C_2ANT_BT_STATUS{
+	BT_8188C_2ANT_BT_STATUS_IDLE				= 0x0,
+	BT_8188C_2ANT_BT_STATUS_CONNECTED_IDLE	= 0x1,
+	BT_8188C_2ANT_BT_STATUS_NON_IDLE			= 0x2,
+	BT_8188C_2ANT_BT_STATUS_MAX
+}BT_8188C_2ANT_BT_STATUS,*PBT_8188C_2ANT_BT_STATUS;
+
+typedef enum _BT_8188C_2ANT_COEX_ALGO{
+	BT_8188C_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8188C_2ANT_COEX_ALGO_SCO					= 0x1,
+	BT_8188C_2ANT_COEX_ALGO_HID					= 0x2,
+	BT_8188C_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8188C_2ANT_COEX_ALGO_PAN					= 0x4,
+	BT_8188C_2ANT_COEX_ALGO_HID_A2DP			= 0x5,
+	BT_8188C_2ANT_COEX_ALGO_HID_PAN				= 0x6,
+	BT_8188C_2ANT_COEX_ALGO_PAN_A2DP			= 0x7,
+	BT_8188C_2ANT_COEX_ALGO_MAX
+}BT_8188C_2ANT_COEX_ALGO,*PBT_8188C_2ANT_COEX_ALGO;
+
+typedef struct _COEX_DM_8188C_2ANT{
+	// fw mechanism
+	BOOLEAN		bPreBalanceOn;
+	BOOLEAN		bCurBalanceOn;
+
+	// diminishWifi
+	BOOLEAN		bPreDacOn;
+	BOOLEAN		bCurDacOn;
+	BOOLEAN 	bPreInterruptOn;
+	BOOLEAN		bCurInterruptOn;
+	u1Byte		preFwDacSwingLvl;
+	u1Byte		curFwDacSwingLvl;
+	BOOLEAN 	bPreNavOn;
+	BOOLEAN		bCurNavOn;
+
+	// sw mechanism
+	BOOLEAN		bPreRfRxLpfShrink;
+	BOOLEAN		bCurRfRxLpfShrink;
+	u4Byte		btRf0x1eBackup;
+	BOOLEAN 	bPreLowPenaltyRa;
+	BOOLEAN		bCurLowPenaltyRa;
+	BOOLEAN		bPreDacSwingOn;
+	u4Byte		preDacSwingLvl;
+	BOOLEAN		bCurDacSwingOn;
+	u4Byte		curDacSwingLvl;
+	BOOLEAN		bPreAdcBackOff;
+	BOOLEAN		bCurAdcBackOff;
+	BOOLEAN 	bPreAgcTableEn;
+	BOOLEAN		bCurAgcTableEn;
+	//u4Byte		preVal0x6c0;
+	//u4Byte		curVal0x6c0;
+	u4Byte		preVal0x6c4;
+	u4Byte		curVal0x6c4;
+	u4Byte		preVal0x6c8;
+	u4Byte		curVal0x6c8;
+	u4Byte		preVal0x6cc;
+	u4Byte		curVal0x6cc;
+	//BOOLEAN		bLimitedDig;
+
+	// algorithm related
+	u1Byte		preAlgorithm;
+	u1Byte		curAlgorithm;
+	//u1Byte		btStatus;
+	//u1Byte		wifiChnlInfo[3];
+} COEX_DM_8188C_2ANT, *PCOEX_DM_8188C_2ANT;
+
+typedef struct _COEX_STA_8188C_2ANT{
+	u1Byte					preWifiRssiState[4];
+	BOOLEAN					bBtBusy;
+	BOOLEAN					bBtUplink;
+	BOOLEAN					bBtDownLink;
+	BOOLEAN					bA2dpBusy;
+}COEX_STA_8188C_2ANT, *PCOEX_STA_8188C_2ANT;
+
+//===========================================
+// The following is interface which will notify coex module.
+//===========================================
+VOID
+EXhalbtc8188c2ant_PowerOnSetting(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8188c2ant_InitHwConfig(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	BOOLEAN				bWifiOnly
+	);
+VOID
+EXhalbtc8188c2ant_InitCoexDm(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8188c2ant_IpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8188c2ant_LpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8188c2ant_ScanNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8188c2ant_ConnectNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8188c2ant_MediaStatusNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8188c2ant_SpecialPacketNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8188c2ant_HaltNotify(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8188c2ant_Periodical(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8188c2ant_BtInfoNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	pu1Byte			tmpBuf,
+	IN	u1Byte			length
+	);
+VOID
+EXhalbtc8188c2ant_DisplayCoexInfo(
+	IN	PBTC_COEXIST		pBtCoexist
+	);

hal/btc/HalBtc8192d2Ant.h

@@ -0,0 +1,170 @@
+//===========================================
+// The following is for 8192D 2Ant BT Co-exist definition
+//===========================================
+#define		BTC_RSSI_COEX_THRESH_TOL_8192D_2ANT		6
+
+typedef enum _BT_INFO_SRC_8192D_2ANT{
+	BT_INFO_SRC_8192D_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8192D_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8192D_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8192D_2ANT_MAX
+}BT_INFO_SRC_8192D_2ANT,*PBT_INFO_SRC_8192D_2ANT;
+
+typedef enum _BT_8192D_2ANT_BT_STATUS{
+	BT_8192D_2ANT_BT_STATUS_IDLE				= 0x0,
+	BT_8192D_2ANT_BT_STATUS_CONNECTED_IDLE	= 0x1,
+	BT_8192D_2ANT_BT_STATUS_NON_IDLE			= 0x2,
+	BT_8192D_2ANT_BT_STATUS_MAX
+}BT_8192D_2ANT_BT_STATUS,*PBT_8192D_2ANT_BT_STATUS;
+
+typedef enum _BT_8192D_2ANT_COEX_ALGO{
+	BT_8192D_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8192D_2ANT_COEX_ALGO_SCO					= 0x1,
+	BT_8192D_2ANT_COEX_ALGO_HID					= 0x2,
+	BT_8192D_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8192D_2ANT_COEX_ALGO_PAN					= 0x4,
+	BT_8192D_2ANT_COEX_ALGO_HID_A2DP			= 0x5,
+	BT_8192D_2ANT_COEX_ALGO_HID_PAN				= 0x6,
+	BT_8192D_2ANT_COEX_ALGO_PAN_A2DP			= 0x7,
+	BT_8192D_2ANT_COEX_ALGO_MAX
+}BT_8192D_2ANT_COEX_ALGO,*PBT_8192D_2ANT_COEX_ALGO;
+
+typedef struct _COEX_DM_8192D_2ANT{
+	// fw mechanism
+	BOOLEAN		bPreBalanceOn;
+	BOOLEAN		bCurBalanceOn;
+
+	// diminishWifi
+	BOOLEAN		bPreDacOn;
+	BOOLEAN		bCurDacOn;
+	BOOLEAN 	bPreInterruptOn;
+	BOOLEAN		bCurInterruptOn;
+	u1Byte		preFwDacSwingLvl;
+	u1Byte		curFwDacSwingLvl;
+	BOOLEAN 	bPreNavOn;
+	BOOLEAN		bCurNavOn;
+
+
+	
+
+	
+	//BOOLEAN		bPreDecBtPwr;
+	//BOOLEAN		bCurDecBtPwr;
+
+	//u1Byte		preFwDacSwingLvl;
+	//u1Byte		curFwDacSwingLvl;
+	//BOOLEAN		bCurIgnoreWlanAct;
+	//BOOLEAN		bPreIgnoreWlanAct;
+	//u1Byte		prePsTdma;
+	//u1Byte		curPsTdma;
+	//u1Byte		psTdmaPara[5];
+	//u1Byte		psTdmaDuAdjType;
+	//BOOLEAN		bResetTdmaAdjust;
+	//BOOLEAN		bPrePsTdmaOn;
+	//BOOLEAN		bCurPsTdmaOn;
+	//BOOLEAN		bPreBtAutoReport;
+	//BOOLEAN		bCurBtAutoReport;
+
+	// sw mechanism
+	BOOLEAN		bPreRfRxLpfShrink;
+	BOOLEAN		bCurRfRxLpfShrink;
+	u4Byte		btRf0x1eBackup;
+	BOOLEAN 	bPreLowPenaltyRa;
+	BOOLEAN		bCurLowPenaltyRa;
+	BOOLEAN		bPreDacSwingOn;
+	u4Byte		preDacSwingLvl;
+	BOOLEAN		bCurDacSwingOn;
+	u4Byte		curDacSwingLvl;
+	BOOLEAN		bPreAdcBackOff;
+	BOOLEAN		bCurAdcBackOff;
+	BOOLEAN 	bPreAgcTableEn;
+	BOOLEAN		bCurAgcTableEn;
+	//u4Byte		preVal0x6c0;
+	//u4Byte		curVal0x6c0;
+	u4Byte		preVal0x6c4;
+	u4Byte		curVal0x6c4;
+	u4Byte		preVal0x6c8;
+	u4Byte		curVal0x6c8;
+	u4Byte		preVal0x6cc;
+	u4Byte		curVal0x6cc;
+	//BOOLEAN		bLimitedDig;
+
+	// algorithm related
+	u1Byte		preAlgorithm;
+	u1Byte		curAlgorithm;
+	//u1Byte		btStatus;
+	//u1Byte		wifiChnlInfo[3];
+} COEX_DM_8192D_2ANT, *PCOEX_DM_8192D_2ANT;
+
+typedef struct _COEX_STA_8192D_2ANT{
+	u1Byte					preWifiRssiState[4];
+	BOOLEAN					bBtBusy;
+	BOOLEAN					bBtUplink;
+	BOOLEAN					bBtDownLink;
+	BOOLEAN					bA2dpBusy;
+}COEX_STA_8192D_2ANT, *PCOEX_STA_8192D_2ANT;
+
+//===========================================
+// The following is interface which will notify coex module.
+//===========================================
+VOID
+EXhalbtc8192d2ant_PowerOnSetting(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8192d2ant_InitHwConfig(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	BOOLEAN				bWifiOnly
+	);
+VOID
+EXhalbtc8192d2ant_InitCoexDm(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8192d2ant_IpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8192d2ant_LpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8192d2ant_ScanNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8192d2ant_ConnectNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8192d2ant_MediaStatusNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8192d2ant_SpecialPacketNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8192d2ant_HaltNotify(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8192d2ant_Periodical(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8192d2ant_BtInfoNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	pu1Byte			tmpBuf,
+	IN	u1Byte			length
+	);
+VOID
+EXhalbtc8192d2ant_DisplayCoexInfo(
+	IN	PBTC_COEXIST		pBtCoexist
+	);

hal/btc/HalBtc8192e1Ant.h

@@ -0,0 +1,226 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8192E_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8192E 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8192E_1ANT				1
+
+#define	BT_INFO_8192E_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8192E_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8192E_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8192E_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8192E_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8192E_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8192E_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8192E_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8192E_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+		(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8192E_1ANT		2
+
+#define  BT_8192E_1ANT_WIFI_NOISY_THRESH								30   /* max: 255 */
+
+enum bt_info_src_8192e_1ant {
+	BT_INFO_SRC_8192E_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8192E_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8192E_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8192E_1ANT_MAX
+};
+
+enum bt_8192e_1ant_bt_status {
+	BT_8192E_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8192E_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8192E_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8192E_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8192E_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8192E_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8192E_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8192e_1ant_wifi_status {
+	BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8192E_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8192E_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8192E_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8192E_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8192E_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8192e_1ant_coex_algo {
+	BT_8192E_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8192E_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8192E_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8192E_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8192E_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8192E_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8192E_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8192E_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8192E_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8192E_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8192E_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8192E_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8192e_1ant {
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8192e_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	s8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8192E_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8192E_1ANT_MAX];
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	boolean					cck_lock;
+	boolean					pre_ccklock;
+	u8					coex_table_type;
+
+	boolean					force_lps_on;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8192e1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8192e1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8192e1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8192e1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8192e1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8192e1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8192e1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8192e1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8192e1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8192e1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8192e1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e1ant_dbg_control(IN struct btc_coexist *btcoexist,
+				    IN u8 op_code, IN u8 op_len, IN u8 *pdata);
+
+#else	/*  #if (RTL8192E_SUPPORT == 1) */
+#define	ex_halbtc8192e1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8192e1ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8192e1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8192e1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8192e1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8192e1ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8192e1ant_halt_notify(btcoexist)
+#define	ex_halbtc8192e1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8192e1ant_coex_dm_reset(btcoexist)
+#define	ex_halbtc8192e1ant_periodical(btcoexist)
+#define	ex_halbtc8192e1ant_display_coex_info(btcoexist)
+#define	ex_halbtc8192e1ant_dbg_control(btcoexist, op_code, op_len, pdata)
+
+#endif
+
+#endif

hal/btc/HalBtc8192e2Ant.h

@@ -0,0 +1,190 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8192E_SUPPORT == 1)
+/* *******************************************
+ * The following is for 8192E 2Ant BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8192E_2ANT				0
+
+#define	BT_INFO_8192E_2ANT_B_FTP						BIT(7)
+#define	BT_INFO_8192E_2ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8192E_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8192E_2ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8192E_2ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8192E_2ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8192E_2ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8192E_2ANT_B_CONNECTION				BIT(0)
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8192E_2ANT		2
+
+enum bt_info_src_8192e_2ant {
+	BT_INFO_SRC_8192E_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8192E_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8192E_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8192E_2ANT_MAX
+};
+
+enum bt_8192e_2ant_bt_status {
+	BT_8192E_2ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8192E_2ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8192E_2ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8192E_2ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8192E_2ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8192E_2ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8192E_2ANT_BT_STATUS_MAX
+};
+
+enum bt_8192e_2ant_coex_algo {
+	BT_8192E_2ANT_COEX_ALGO_UNDEFINED		= 0x0,
+	BT_8192E_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8192E_2ANT_COEX_ALGO_SCO_PAN			= 0x2,
+	BT_8192E_2ANT_COEX_ALGO_HID				= 0x3,
+	BT_8192E_2ANT_COEX_ALGO_A2DP			= 0x4,
+	BT_8192E_2ANT_COEX_ALGO_A2DP_PANHS		= 0x5,
+	BT_8192E_2ANT_COEX_ALGO_PANEDR			= 0x6,
+	BT_8192E_2ANT_COEX_ALGO_PANHS			= 0x7,
+	BT_8192E_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x8,
+	BT_8192E_2ANT_COEX_ALGO_PANEDR_HID		= 0x9,
+	BT_8192E_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0xa,
+	BT_8192E_2ANT_COEX_ALGO_HID_A2DP		= 0xb,
+	BT_8192E_2ANT_COEX_ALGO_MAX				= 0xc
+};
+
+struct coex_dm_8192e_2ant {
+	/* fw mechanism */
+	u8		pre_bt_dec_pwr_lvl;
+	u8		cur_bt_dec_pwr_lvl;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		reset_tdma_adjust;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+
+	/* sw mechanism */
+	boolean		pre_rf_rx_lpf_shrink;
+	boolean		cur_rf_rx_lpf_shrink;
+	u32		bt_rf_0x1e_backup;
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	boolean		pre_dac_swing_on;
+	u32		pre_dac_swing_lvl;
+	boolean		cur_dac_swing_on;
+	u32		cur_dac_swing_lvl;
+	boolean		pre_adc_back_off;
+	boolean		cur_adc_back_off;
+	boolean	pre_agc_table_en;
+	boolean		cur_agc_table_en;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u8		pre_ss_type;
+	u8		cur_ss_type;
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		cur_ra_mask_type;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+};
+
+struct coex_sta_8192e_2ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8192E_2ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8192E_2ANT_MAX];
+	boolean					c2h_bt_inquiry_page;
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8192e2ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e2ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8192e2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e2ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8192e2ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8192e2ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8192e2ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8192e2ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8192e2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8192e2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8192e2ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e2ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8192e2ant_display_coex_info(IN struct btc_coexist *btcoexist);
+
+#else	/*  #if (RTL8192E_SUPPORT == 1) */
+#define	ex_halbtc8192e2ant_power_on_setting(btcoexist)
+#define	ex_halbtc8192e2ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8192e2ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8192e2ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8192e2ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8192e2ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8192e2ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8192e2ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8192e2ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8192e2ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8192e2ant_halt_notify(btcoexist)
+#define	ex_halbtc8192e2ant_periodical(btcoexist)
+#define	ex_halbtc8192e2ant_display_coex_info(btcoexist)
+
+#endif
+
+#endif
+

hal/btc/HalBtc8703b1Ant.h

@@ -0,0 +1,348 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8703B_SUPPORT == 1)
+/* *******************************************
+ * The following is for 8703B 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8703B_1ANT				1
+#define BT_8703B_1ANT_ENABLE_GNTBT_TO_GPIO14		0
+
+#define	BT_INFO_8703B_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8703B_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8703B_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8703B_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8703B_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8703B_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8703B_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8703B_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8703B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+	(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8703B_1ANT		2
+
+#define  BT_8703B_1ANT_WIFI_NOISY_THRESH							50   /* max: 255 */
+
+/* for Antenna detection */
+#define	BT_8703B_1ANT_ANTDET_PSDTHRES_BACKGROUND					50
+#define	BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
+#define	BT_8703B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			55
+#define	BT_8703B_1ANT_ANTDET_PSDTHRES_1ANT							35
+#define	BT_8703B_1ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
+#define	BT_8703B_1ANT_ANTDET_SWEEPPOINT_DELAY							40000
+#define	BT_8703B_1ANT_ANTDET_ENABLE									0
+#define	BT_8703B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE				0
+
+#define	BT_8703B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT		30000
+
+enum bt_8703b_1ant_signal_state {
+	BT_8703B_1ANT_SIG_STA_SET_TO_LOW		= 0x0,
+	BT_8703B_1ANT_SIG_STA_SET_BY_HW		= 0x0,
+	BT_8703B_1ANT_SIG_STA_SET_TO_HIGH		= 0x1,
+	BT_8703B_1ANT_SIG_STA_MAX
+};
+
+enum bt_8703b_1ant_path_ctrl_owner {
+	BT_8703B_1ANT_PCO_BTSIDE		= 0x0,
+	BT_8703B_1ANT_PCO_WLSIDE	= 0x1,
+	BT_8703B_1ANT_PCO_MAX
+};
+
+enum bt_8703b_1ant_gnt_ctrl_type {
+	BT_8703B_1ANT_GNT_TYPE_CTRL_BY_PTA		= 0x0,
+	BT_8703B_1ANT_GNT_TYPE_CTRL_BY_SW		= 0x1,
+	BT_8703B_1ANT_GNT_TYPE_MAX
+};
+
+enum bt_8703b_1ant_gnt_ctrl_block {
+	BT_8703B_1ANT_GNT_BLOCK_RFC_BB		= 0x0,
+	BT_8703B_1ANT_GNT_BLOCK_RFC			= 0x1,
+	BT_8703B_1ANT_GNT_BLOCK_BB			= 0x2,
+	BT_8703B_1ANT_GNT_BLOCK_MAX
+};
+
+enum bt_8703b_1ant_lte_coex_table_type {
+	BT_8703B_1ANT_CTT_WL_VS_LTE			= 0x0,
+	BT_8703B_1ANT_CTT_BT_VS_LTE			= 0x1,
+	BT_8703B_1ANT_CTT_MAX
+};
+
+enum bt_8703b_1ant_lte_break_table_type {
+	BT_8703B_1ANT_LBTT_WL_BREAK_LTE			= 0x0,
+	BT_8703B_1ANT_LBTT_BT_BREAK_LTE				= 0x1,
+	BT_8703B_1ANT_LBTT_LTE_BREAK_WL			= 0x2,
+	BT_8703B_1ANT_LBTT_LTE_BREAK_BT				= 0x3,
+	BT_8703B_1ANT_LBTT_MAX
+};
+
+enum bt_info_src_8703b_1ant {
+	BT_INFO_SRC_8703B_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8703B_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8703B_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8703B_1ANT_MAX
+};
+
+enum bt_8703b_1ant_bt_status {
+	BT_8703B_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8703B_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8703B_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8703B_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8703B_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8703B_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8703B_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8703b_1ant_wifi_status {
+	BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8703B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8703B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8703B_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8703B_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8703B_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8703b_1ant_coex_algo {
+	BT_8703B_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8703B_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8703B_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8703B_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8703B_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8703B_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8703B_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8703B_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8703B_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8703B_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8703B_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8703B_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8703b_1ant {
+	/* hw setting */
+	u8		pre_ant_pos_type;
+	u8		cur_ant_pos_type;
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8703b_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+	boolean					bt_hi_pri_link_exist;
+	u8					num_of_profile;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	s8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8703B_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8703B_1ANT_MAX];
+	boolean					bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	boolean					cck_lock;
+	boolean					pre_ccklock;
+	boolean					cck_ever_lock;
+	u8					coex_table_type;
+
+	boolean					force_lps_on;
+	u32					wrong_profile_notification;
+
+	boolean					concurrent_rx_mode_on;
+
+	u16					score_board;
+
+	u8					a2dp_bit_pool;
+	u8					cut_version;
+	boolean				acl_busy;
+	boolean				wl_rf_off_on_event;
+	boolean				bt_create_connection;
+	boolean				gnt_control_by_PTA;
+};
+
+#define  BT_8703B_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
+#define  BT_8703B_1ANT_ANTDET_PSD_AVGNUM			1	/* MAX:3 */
+#define	BT_8703B_1ANT_ANTDET_BUF_LEN				16
+
+struct psdscan_sta_8703b_1ant {
+
+	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32			ant_det_bt_tx_time;
+	u32			ant_det_pre_psdscan_peak_val;
+	boolean			ant_det_is_ant_det_available;
+	u32			ant_det_psd_scan_peak_val;
+	boolean			ant_det_is_btreply_available;
+	u32			ant_det_psd_scan_peak_freq;
+
+	u8			ant_det_result;
+	u8			ant_det_peak_val[BT_8703B_1ANT_ANTDET_BUF_LEN];
+	u8			ant_det_peak_freq[BT_8703B_1ANT_ANTDET_BUF_LEN];
+	u32			ant_det_try_count;
+	u32			ant_det_fail_count;
+	u32			ant_det_inteval_count;
+	u32			ant_det_thres_offset;
+
+	u32			real_cent_freq;
+	s32			real_offset;
+	u32			real_span;
+
+	u32			psd_band_width;  /* unit: Hz */
+	u32			psd_point;		/* 128/256/512/1024 */
+	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_start_point;
+	u32			psd_stop_point;
+	u32			psd_max_value_point;
+	u32			psd_max_value;
+	u32			psd_start_base;
+	u32			psd_avg_num;	/* 1/8/16/32 */
+	u32			psd_gen_count;
+	boolean			is_psd_running;
+	boolean			is_psd_show_max_only;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8703b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8703b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8703b1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8703b1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8703b1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8703b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8703b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8703b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8703b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8703b1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8703b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8703b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8703b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+
+void ex_halbtc8703b1ant_psd_scan(IN struct btc_coexist *btcoexist,
+		 IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8703b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8703b1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8703b1ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8703b1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8703b1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8703b1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8703b1ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8703b1ant_halt_notify(btcoexist)
+#define	ex_halbtc8703b1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8703b1ant_coex_dm_reset(btcoexist)
+#define	ex_halbtc8703b1ant_periodical(btcoexist)
+#define	ex_halbtc8703b1ant_display_coex_info(btcoexist)
+#define	ex_halbtc8703b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8703b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8703b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8703b1ant_display_ant_detection(btcoexist)
+
+#endif
+
+
+#endif

hal/btc/HalBtc8723a1Ant.h

@@ -0,0 +1,171 @@
+//===========================================
+// The following is for 8723A 1Ant BT Co-exist definition
+//===========================================
+#define	BT_INFO_8723A_1ANT_B_FTP						BIT7
+#define	BT_INFO_8723A_1ANT_B_A2DP					BIT6
+#define	BT_INFO_8723A_1ANT_B_HID						BIT5
+#define	BT_INFO_8723A_1ANT_B_SCO_BUSY				BIT4
+#define	BT_INFO_8723A_1ANT_B_ACL_BUSY				BIT3
+#define	BT_INFO_8723A_1ANT_B_INQ_PAGE				BIT2
+#define	BT_INFO_8723A_1ANT_B_SCO_ESCO				BIT1
+#define	BT_INFO_8723A_1ANT_B_CONNECTION				BIT0
+
+typedef enum _BT_STATE_8723A_1ANT{
+	BT_STATE_8723A_1ANT_DISABLED				= 0,
+	BT_STATE_8723A_1ANT_NO_CONNECTION		= 1,
+	BT_STATE_8723A_1ANT_CONNECT_IDLE		= 2,
+	BT_STATE_8723A_1ANT_INQ_OR_PAG			= 3,
+	BT_STATE_8723A_1ANT_ACL_ONLY_BUSY		= 4,
+	BT_STATE_8723A_1ANT_SCO_ONLY_BUSY		= 5,
+	BT_STATE_8723A_1ANT_ACL_SCO_BUSY			= 6,
+	BT_STATE_8723A_1ANT_HID_BUSY				= 7,
+	BT_STATE_8723A_1ANT_HID_SCO_BUSY			= 8,
+	BT_STATE_8723A_1ANT_MAX
+}BT_STATE_8723A_1ANT, *PBT_STATE_8723A_1ANT;
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8723A_1ANT		2
+
+typedef enum _BT_INFO_SRC_8723A_1ANT{
+	BT_INFO_SRC_8723A_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8723A_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723A_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723A_1ANT_MAX
+}BT_INFO_SRC_8723A_1ANT,*PBT_INFO_SRC_8723A_1ANT;
+
+typedef enum _BT_8723A_1ANT_BT_STATUS{
+	BT_8723A_1ANT_BT_STATUS_IDLE				= 0x0,
+	BT_8723A_1ANT_BT_STATUS_CONNECTED_IDLE	= 0x1,
+	BT_8723A_1ANT_BT_STATUS_NON_IDLE			= 0x2,
+	BT_8723A_1ANT_BT_STATUS_MAX
+}BT_8723A_1ANT_BT_STATUS,*PBT_8723A_1ANT_BT_STATUS;
+
+typedef enum _BT_8723A_1ANT_COEX_ALGO{
+	BT_8723A_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8723A_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8723A_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8723A_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723A_1ANT_COEX_ALGO_PANEDR			= 0x4,
+	BT_8723A_1ANT_COEX_ALGO_PANHS			= 0x5,
+	BT_8723A_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x6,
+	BT_8723A_1ANT_COEX_ALGO_PANEDR_HID		= 0x7,
+	BT_8723A_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x8,
+	BT_8723A_1ANT_COEX_ALGO_HID_A2DP			= 0x9,
+	BT_8723A_1ANT_COEX_ALGO_MAX
+}BT_8723A_1ANT_COEX_ALGO,*PBT_8723A_1ANT_COEX_ALGO;
+
+typedef struct _COEX_DM_8723A_1ANT{
+	// fw mechanism
+	BOOLEAN		bCurIgnoreWlanAct;
+	BOOLEAN		bPreIgnoreWlanAct;
+	u1Byte		prePsTdma;
+	u1Byte		curPsTdma;
+	u1Byte		psTdmaPara[5];
+	u1Byte		psTdmaDuAdjType;
+	u4Byte		psTdmaMonitorCnt;
+	u4Byte		psTdmaGlobalCnt;
+	BOOLEAN		bResetTdmaAdjust;
+	BOOLEAN		bPrePsTdmaOn;
+	BOOLEAN		bCurPsTdmaOn;
+
+	// sw mechanism
+	BOOLEAN		bPreRfRxLpfShrink;
+	BOOLEAN		bCurRfRxLpfShrink;
+	u4Byte		btRf0x1eBackup;
+	BOOLEAN 	bPreLowPenaltyRa;
+	BOOLEAN		bCurLowPenaltyRa;
+	u4Byte		preVal0x6c0;
+	u4Byte		curVal0x6c0;
+	u4Byte		preVal0x6c8;
+	u4Byte		curVal0x6c8;
+	u1Byte		preVal0x6cc;
+	u1Byte		curVal0x6cc;
+	BOOLEAN		bLimitedDig;
+
+	// algorithm related
+	u1Byte		preAlgorithm;
+	u1Byte		curAlgorithm;
+	u1Byte		btStatus;
+	u1Byte		wifiChnlInfo[3];
+} COEX_DM_8723A_1ANT, *PCOEX_DM_8723A_1ANT;
+
+typedef struct _COEX_STA_8723A_1ANT{
+	u4Byte					highPriorityTx;
+	u4Byte					highPriorityRx;
+	u4Byte					lowPriorityTx;
+	u4Byte					lowPriorityRx;
+	u1Byte					btRssi;
+	u1Byte					preBtRssiState;
+	u1Byte					preBtRssiState1;
+	u1Byte					preWifiRssiState[4];
+	BOOLEAN					bC2hBtInfoReqSent;
+	u1Byte					btInfoC2h[BT_INFO_SRC_8723A_1ANT_MAX][10];
+	u4Byte					btInfoC2hCnt[BT_INFO_SRC_8723A_1ANT_MAX];
+	BOOLEAN					bC2hBtInquiryPage;
+	u1Byte					btRetryCnt;
+	u1Byte					btInfoExt;
+	//BOOLEAN					bHoldForStackOperation;
+	//u1Byte					bHoldPeriodCnt;
+	// this is for c2h hang work-around
+	u4Byte					c2hHangDetectCnt;
+}COEX_STA_8723A_1ANT, *PCOEX_STA_8723A_1ANT;
+
+//===========================================
+// The following is interface which will notify coex module.
+//===========================================
+VOID
+EXhalbtc8723a1ant_InitHwConfig(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8723a1ant_InitCoexDm(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8723a1ant_IpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a1ant_LpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a1ant_ScanNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a1ant_ConnectNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a1ant_MediaStatusNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8723a1ant_SpecialPacketNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8723a1ant_BtInfoNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	pu1Byte			tmpBuf,
+	IN	u1Byte			length
+	);
+VOID
+EXhalbtc8723a1ant_HaltNotify(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8723a1ant_Periodical(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8723a1ant_DisplayCoexInfo(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+

hal/btc/HalBtc8723a2Ant.h

@@ -0,0 +1,184 @@
+//===========================================
+// The following is for 8723A 2Ant BT Co-exist definition
+//===========================================
+#define	BT_INFO_8723A_2ANT_B_FTP						BIT7
+#define	BT_INFO_8723A_2ANT_B_A2DP					BIT6
+#define	BT_INFO_8723A_2ANT_B_HID						BIT5
+#define	BT_INFO_8723A_2ANT_B_SCO_BUSY				BIT4
+#define	BT_INFO_8723A_2ANT_B_ACL_BUSY				BIT3
+#define	BT_INFO_8723A_2ANT_B_INQ_PAGE				BIT2
+#define	BT_INFO_8723A_2ANT_B_SCO_ESCO				BIT1
+#define	BT_INFO_8723A_2ANT_B_CONNECTION				BIT0
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8723A_2ANT		2
+
+typedef enum _BT_INFO_SRC_8723A_2ANT{
+	BT_INFO_SRC_8723A_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8723A_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723A_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723A_2ANT_MAX
+}BT_INFO_SRC_8723A_2ANT,*PBT_INFO_SRC_8723A_2ANT;
+
+typedef enum _BT_8723A_2ANT_BT_STATUS{
+	BT_8723A_2ANT_BT_STATUS_IDLE				= 0x0,
+	BT_8723A_2ANT_BT_STATUS_CONNECTED_IDLE	= 0x1,
+	BT_8723A_2ANT_BT_STATUS_NON_IDLE			= 0x2,
+	BT_8723A_2ANT_BT_STATUS_MAX
+}BT_8723A_2ANT_BT_STATUS,*PBT_8723A_2ANT_BT_STATUS;
+
+typedef enum _BT_8723A_2ANT_COEX_ALGO{
+	BT_8723A_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8723A_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8723A_2ANT_COEX_ALGO_HID				= 0x2,
+	BT_8723A_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723A_2ANT_COEX_ALGO_PANEDR			= 0x4,
+	BT_8723A_2ANT_COEX_ALGO_PANHS			= 0x5,
+	BT_8723A_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x6,
+	BT_8723A_2ANT_COEX_ALGO_PANEDR_HID		= 0x7,
+	BT_8723A_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x8,
+	BT_8723A_2ANT_COEX_ALGO_HID_A2DP			= 0x9,
+	BT_8723A_2ANT_COEX_ALGO_MAX
+}BT_8723A_2ANT_COEX_ALGO,*PBT_8723A_2ANT_COEX_ALGO;
+
+typedef struct _COEX_DM_8723A_2ANT{
+	// fw mechanism
+	BOOLEAN		bPreDecBtPwr;
+	BOOLEAN		bCurDecBtPwr;
+	//BOOLEAN		bPreBtLnaConstrain;
+	//BOOLEAN		bCurBtLnaConstrain;
+	//u1Byte		bPreBtPsdMode;
+	//u1Byte		bCurBtPsdMode;
+	u1Byte		preFwDacSwingLvl;
+	u1Byte		curFwDacSwingLvl;
+	BOOLEAN		bCurIgnoreWlanAct;
+	BOOLEAN		bPreIgnoreWlanAct;
+	u1Byte		prePsTdma;
+	u1Byte		curPsTdma;
+	u1Byte		psTdmaPara[5];
+	u1Byte		psTdmaDuAdjType;
+	BOOLEAN		bResetTdmaAdjust;
+	BOOLEAN		bPrePsTdmaOn;
+	BOOLEAN		bCurPsTdmaOn;
+	//BOOLEAN		bPreBtAutoReport;
+	//BOOLEAN		bCurBtAutoReport;
+
+	// sw mechanism
+	BOOLEAN		bPreRfRxLpfShrink;
+	BOOLEAN		bCurRfRxLpfShrink;
+	u4Byte		btRf0x1eBackup;
+	BOOLEAN 	bPreLowPenaltyRa;
+	BOOLEAN		bCurLowPenaltyRa;
+	BOOLEAN		bPreDacSwingOn;
+	u4Byte		preDacSwingLvl;
+	BOOLEAN		bCurDacSwingOn;
+	u4Byte		curDacSwingLvl;
+	BOOLEAN		bPreAdcBackOff;
+	BOOLEAN		bCurAdcBackOff;
+	BOOLEAN 	bPreAgcTableEn;
+	BOOLEAN		bCurAgcTableEn;
+	u4Byte		preVal0x6c0;
+	u4Byte		curVal0x6c0;
+	u4Byte		preVal0x6c8;
+	u4Byte		curVal0x6c8;
+	u1Byte		preVal0x6cc;
+	u1Byte		curVal0x6cc;
+	BOOLEAN		bLimitedDig;
+
+	// algorithm related
+	u1Byte		preAlgorithm;
+	u1Byte		curAlgorithm;
+	u1Byte		btStatus;
+	u1Byte		wifiChnlInfo[3];
+} COEX_DM_8723A_2ANT, *PCOEX_DM_8723A_2ANT;
+
+typedef struct _COEX_STA_8723A_2ANT{
+	u4Byte					highPriorityTx;
+	u4Byte					highPriorityRx;
+	u4Byte					lowPriorityTx;
+	u4Byte					lowPriorityRx;
+	u1Byte					btRssi;
+	u1Byte					preBtRssiState;
+	u1Byte					preBtRssiState1;
+	u1Byte					preWifiRssiState[4];
+	BOOLEAN					bC2hBtInfoReqSent;
+	u1Byte					btInfoC2h[BT_INFO_SRC_8723A_2ANT_MAX][10];
+	u4Byte					btInfoC2hCnt[BT_INFO_SRC_8723A_2ANT_MAX];
+	BOOLEAN					bC2hBtInquiryPage;
+	u1Byte					btRetryCnt;
+	u1Byte					btInfoExt;
+	BOOLEAN					bHoldForStackOperation;
+	u1Byte					bHoldPeriodCnt;
+	// this is for c2h hang work-around
+	u4Byte					c2hHangDetectCnt;
+}COEX_STA_8723A_2ANT, *PCOEX_STA_8723A_2ANT;
+
+//===========================================
+// The following is interface which will notify coex module.
+//===========================================
+VOID
+EXhalbtc8723a2ant_PowerOnSetting(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8723a2ant_InitHwConfig(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	BOOLEAN				bWifiOnly
+	);
+VOID
+EXhalbtc8723a2ant_InitCoexDm(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtc8723a2ant_IpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a2ant_LpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a2ant_ScanNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a2ant_ConnectNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtc8723a2ant_MediaStatusNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8723a2ant_SpecialPacketNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8723a2ant_HaltNotify(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8723a2ant_Periodical(
+	IN	PBTC_COEXIST			pBtCoexist
+	);
+VOID
+EXhalbtc8723a2ant_BtInfoNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	pu1Byte			tmpBuf,
+	IN	u1Byte			length
+	);
+VOID
+EXhalbtc8723a2ant_StackOperationNotify(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				type
+	);
+VOID
+EXhalbtc8723a2ant_DisplayCoexInfo(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+

hal/btc/HalBtc8723b1Ant.h

@@ -0,0 +1,288 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8723B_SUPPORT == 1)
+/* *******************************************
+ * The following is for 8723B 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8723B_1ANT				1
+
+#define	BT_INFO_8723B_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8723B_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8723B_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8723B_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8723B_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8723B_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8723B_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8723B_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8723B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+		(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8723B_1ANT		2
+
+#define  BT_8723B_1ANT_WIFI_NOISY_THRESH								50 /* 30   //max: 255								 */
+
+/* for Antenna detection */
+#define	BT_8723B_1ANT_ANTDET_PSDTHRES_BACKGROUND						50
+#define	BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
+#define	BT_8723B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			55
+#define	BT_8723B_1ANT_ANTDET_PSDTHRES_1ANT							32
+#define	BT_8723B_1ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
+#define	BT_8723B_1ANT_ANTDET_SWEEPPOINT_DELAY							40000  
+#define	BT_8723B_1ANT_ANTDET_ENABLE										1
+#define	BT_8723B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE				1
+#define	BT_8723B_1ANT_ANTDET_BTTXTIME									100
+#define	BT_8723B_1ANT_ANTDET_BTTXCHANNEL								39
+
+enum bt_info_src_8723b_1ant {
+	BT_INFO_SRC_8723B_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8723B_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723B_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723B_1ANT_MAX
+};
+
+enum bt_8723b_1ant_bt_status {
+	BT_8723B_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8723B_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8723B_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8723B_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8723B_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8723B_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8723B_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8723b_1ant_wifi_status {
+	BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8723B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8723B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8723B_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8723B_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8723B_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8723b_1ant_coex_algo {
+	BT_8723B_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8723B_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8723B_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8723B_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723B_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8723B_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8723B_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8723B_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8723B_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8723B_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8723B_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8723B_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8723b_1ant {
+	/* hw setting */
+	u8		pre_ant_pos_type;
+	u8		cur_ant_pos_type;
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8723b_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+	boolean					bt_hi_pri_link_exist;
+	u8					num_of_profile;
+	boolean					bt_abnormal_scan;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	s8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8723B_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723B_1ANT_MAX];
+	boolean					bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_remote_name_req;
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+	
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	boolean					cck_lock;
+	boolean					pre_ccklock;
+	boolean					cck_ever_lock;
+	u8					coex_table_type;
+
+	boolean					force_lps_on;
+	u32					wrong_profile_notification;
+
+	u8					a2dp_bit_pool;
+	u8					cut_version;
+};
+
+#define BT_8723B_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
+#define BT_8723B_1ANT_ANTDET_PSD_AVGNUM		1	/* MAX:3 */
+#define	BT_8723B_1ANT_ANTDET_BUF_LEN			16
+
+struct psdscan_sta_8723b_1ant {
+
+	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32			ant_det_bt_tx_time;
+	u32			ant_det_pre_psdscan_peak_val;
+	boolean			ant_det_is_ant_det_available;
+	u32			ant_det_psd_scan_peak_val;
+	boolean			ant_det_is_btreply_available;
+	u32			ant_det_psd_scan_peak_freq;
+
+	u8			ant_det_result;
+	u8			ant_det_peak_val[BT_8723B_1ANT_ANTDET_BUF_LEN];
+	u8			ant_det_peak_freq[BT_8723B_1ANT_ANTDET_BUF_LEN];
+	u32			ant_det_try_count;
+	u32			ant_det_fail_count;
+	u32			ant_det_inteval_count;
+	u32			ant_det_thres_offset;
+
+	u32			real_cent_freq;
+	s32			real_offset;
+	u32			real_span;
+	
+	u32			psd_band_width;  /* unit: Hz */
+	u32			psd_point;		/* 128/256/512/1024 */
+	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_start_point;
+	u32			psd_stop_point;
+	u32			psd_max_value_point;
+	u32			psd_max_value;
+	u32			psd_start_base;
+	u32			psd_avg_num;	/* 1/8/16/32 */
+	u32			psd_gen_count;
+	boolean			is_psd_running;
+	boolean			is_psd_show_max_only;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8723b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8723b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723b1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723b1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8723b1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8723b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8723b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723b1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8723b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+
+void ex_halbtc8723b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8723b1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8723b1ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8723b1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8723b1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8723b1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8723b1ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8723b1ant_halt_notify(btcoexist)
+#define	ex_halbtc8723b1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8723b1ant_coex_dm_reset(btcoexist)
+#define	ex_halbtc8723b1ant_periodical(btcoexist)
+#define	ex_halbtc8723b1ant_display_coex_info(btcoexist)
+#define	ex_halbtc8723b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8723b1ant_display_ant_detection(btcoexist)
+
+#endif
+
+#endif

hal/btc/HalBtc8723b2Ant.h

@@ -0,0 +1,214 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8723B_SUPPORT == 1)
+/* *******************************************
+ * The following is for 8723B 2Ant BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8723B_2ANT				1
+
+
+#define	BT_INFO_8723B_2ANT_B_FTP						BIT(7)
+#define	BT_INFO_8723B_2ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8723B_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8723B_2ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8723B_2ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8723B_2ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8723B_2ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8723B_2ANT_B_CONNECTION				BIT(0)
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8723B_2ANT		2
+
+
+#define	BT_8723B_2ANT_WIFI_RSSI_COEXSWITCH_THRES				42  /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
+#define	BT_8723B_2ANT_BT_RSSI_COEXSWITCH_THRES				46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
+
+enum bt_info_src_8723b_2ant {
+	BT_INFO_SRC_8723B_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8723B_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723B_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723B_2ANT_MAX
+};
+
+enum bt_8723b_2ant_bt_status {
+	BT_8723B_2ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8723B_2ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8723B_2ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8723B_2ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8723B_2ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8723B_2ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8723B_2ANT_BT_STATUS_MAX
+};
+
+enum bt_8723b_2ant_coex_algo {
+	BT_8723B_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8723B_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8723B_2ANT_COEX_ALGO_HID				= 0x2,
+	BT_8723B_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723B_2ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8723B_2ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8723B_2ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8723B_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8723B_2ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8723B_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8723B_2ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8723B_2ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8723b_2ant {
+	/* fw mechanism */
+	u8		pre_bt_dec_pwr_lvl;
+	u8		cur_bt_dec_pwr_lvl;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		reset_tdma_adjust;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+
+	/* sw mechanism */
+	boolean		pre_rf_rx_lpf_shrink;
+	boolean		cur_rf_rx_lpf_shrink;
+	u32		bt_rf_0x1e_backup;
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	boolean		pre_dac_swing_on;
+	u32		pre_dac_swing_lvl;
+	boolean		cur_dac_swing_on;
+	u32		cur_dac_swing_lvl;
+	boolean		pre_adc_back_off;
+	boolean		cur_adc_back_off;
+	boolean	pre_agc_table_en;
+	boolean		cur_agc_table_en;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	boolean		need_recover0x948;
+	u32		backup0x948;
+
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	boolean		is_switch_to_1dot5_ant;
+	u8		switch_thres_offset;
+};
+
+struct coex_sta_8723b_2ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+	boolean					bt_abnormal_scan;
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8723B_2ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723B_2ANT_MAX];
+	boolean				bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_remote_name_req;
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	u8					coex_table_type;
+	boolean					force_lps_on;
+
+	u8					dis_ver_info_cnt;
+
+	u8					a2dp_bit_pool;
+	u8					cut_version;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8723b2ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b2ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8723b2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b2ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723b2ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723b2ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8723b2ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8723b2ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723b2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723b2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8723b2ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b2ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8723b2ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723b2ant_display_coex_info(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8723b2ant_power_on_setting(btcoexist)
+#define	ex_halbtc8723b2ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8723b2ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8723b2ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8723b2ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8723b2ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8723b2ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8723b2ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8723b2ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8723b2ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8723b2ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8723b2ant_halt_notify(btcoexist)
+#define	ex_halbtc8723b2ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8723b2ant_periodical(btcoexist)
+#define	ex_halbtc8723b2ant_display_coex_info(btcoexist)
+
+#endif
+
+#endif

hal/btc/HalBtc8812a1Ant.h

@@ -0,0 +1,230 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8812A_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8812A 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8812A_1ANT				1
+
+#define	BT_INFO_8812A_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8812A_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8812A_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8812A_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8812A_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8812A_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8812A_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8812A_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8812A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+		(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8812A_1ANT		2
+
+#define  BT_8812A_1ANT_WIFI_NOISY_THRESH								30   /* max: 255 */
+
+enum bt_info_src_8812a_1ant {
+	BT_INFO_SRC_8812A_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8812A_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8812A_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8812A_1ANT_MAX
+};
+
+enum bt_8812a_1ant_bt_status {
+	BT_8812A_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8812A_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8812A_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8812A_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8812A_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8812A_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8812A_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8812a_1ant_wifi_status {
+	BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8812A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8812A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8812A_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8812A_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8812A_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8812a_1ant_coex_algo {
+	BT_8812A_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8812A_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8812A_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8812A_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8812A_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8812A_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8812A_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8812A_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8812A_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8812A_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8812A_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8812A_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8812a_1ant {
+	/* hw setting */
+	u8		pre_ant_pos_type;
+	u8		cur_ant_pos_type;
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8812a_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	s8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8812A_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8812A_1ANT_MAX];
+	u32					bt_info_query_cnt;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	boolean					cck_lock;
+	boolean					pre_ccklock;
+	u8					coex_table_type;
+
+	boolean					force_lps_on;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8812a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8812a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8812a1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8812a1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8812a1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8812a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8812a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8812a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8812a1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8812a1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8812a1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a1ant_dbg_control(IN struct btc_coexist *btcoexist,
+				    IN u8 op_code, IN u8 op_len, IN u8 *pdata);
+void ex_halbtc8812a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8812a1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8812a1ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8812a1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8812a1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8812a1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8812a1ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8812a1ant_halt_notify(btcoexist)
+#define	ex_halbtc8812a1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8812a1ant_coex_dm_reset(btcoexist)
+#define	ex_halbtc8812a1ant_periodical(btcoexist)
+#define	ex_halbtc8812a1ant_dbg_control(btcoexist, op_code, op_len, pdata)
+#define	ex_halbtc8812a1ant_display_coex_info(btcoexist)
+
+#endif
+
+#endif

hal/btc/HalBtc8812a2Ant.h

@@ -0,0 +1,202 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8812A_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8812A 2Ant BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8812A_2ANT				0
+
+#define	BT_INFO_8812A_2ANT_B_FTP						BIT(7)
+#define	BT_INFO_8812A_2ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8812A_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8812A_2ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8812A_2ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8812A_2ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8812A_2ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8812A_2ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8812A_2ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+		(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8812A_2ANT		2
+
+enum bt_info_src_8812a_2ant {
+	BT_INFO_SRC_8812A_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8812A_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8812A_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8812A_2ANT_MAX
+};
+
+enum bt_8812a_2ant_bt_status {
+	BT_8812A_2ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8812A_2ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8812A_2ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8812A_2ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8812A_2ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8812A_2ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8812A_2ANT_BT_STATUS_MAX
+};
+
+enum bt_8812a_2ant_coex_algo {
+	BT_8812A_2ANT_COEX_ALGO_UNDEFINED		= 0x0,
+	BT_8812A_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8812A_2ANT_COEX_ALGO_SCO_HID		= 0x2,
+	BT_8812A_2ANT_COEX_ALGO_HID				= 0x3,
+	BT_8812A_2ANT_COEX_ALGO_A2DP			= 0x4,
+	BT_8812A_2ANT_COEX_ALGO_A2DP_PANHS		= 0x5,
+	BT_8812A_2ANT_COEX_ALGO_PANEDR			= 0x6,
+	BT_8812A_2ANT_COEX_ALGO_PANHS			= 0x7,
+	BT_8812A_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x8,
+	BT_8812A_2ANT_COEX_ALGO_PANEDR_HID		= 0x9,
+	BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0xa,
+	BT_8812A_2ANT_COEX_ALGO_HID_A2DP_PANHS	= 0xb,
+	BT_8812A_2ANT_COEX_ALGO_HID_A2DP		= 0xc,
+	BT_8812A_2ANT_COEX_ALGO_MAX				= 0xd
+};
+
+struct coex_dm_8812a_2ant {
+	/* fw mechanism */
+	u8		pre_bt_dec_pwr_lvl;
+	u8		cur_bt_dec_pwr_lvl;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		auto_tdma_adjust_low_rssi;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean		pre_rf_rx_lpf_shrink;
+	boolean		cur_rf_rx_lpf_shrink;
+	u32		bt_rf_0x1e_backup;
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	boolean		pre_dac_swing_on;
+	u32		pre_dac_swing_lvl;
+	boolean		cur_dac_swing_on;
+	u32		cur_dac_swing_lvl;
+	boolean		pre_adc_back_off;
+	boolean		cur_adc_back_off;
+	boolean	pre_agc_table_en;
+	boolean		cur_agc_table_en;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		cur_ra_mask_type;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+};
+
+struct coex_sta_8812a_2ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+	boolean					acl_busy;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8812A_2ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8812A_2ANT_MAX];
+	u32					bt_info_query_cnt;
+	boolean					c2h_bt_inquiry_page;
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8812a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8812a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a2ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8812a2ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8812a2ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8812a2ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8812a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8812a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8812a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8812a2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+
+void ex_halbtc8812a2ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a2ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8812a2ant_dbg_control(IN struct btc_coexist *btcoexist,
+				    IN u8 op_code, IN u8 op_len, IN u8 *pdata);
+
+#else
+#define	ex_halbtc8812a2ant_power_on_setting(btcoexist)
+#define	ex_halbtc8812a2ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8812a2ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8812a2ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8812a2ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8812a2ant_halt_notify(btcoexist)
+#define	ex_halbtc8812a2ant_periodical(btcoexist)
+#define	ex_halbtc8812a2ant_display_coex_info(btcoexist)
+#define	ex_halbtc8812a2ant_dbg_control(btcoexist, op_code, op_len, pdata)
+#endif
+
+#endif

hal/btc/HalBtc8821a1Ant.h

@@ -0,0 +1,197 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8821A_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8821A 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8821A_1ANT				1
+
+#define	BT_INFO_8821A_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8821A_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8821A_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8821A_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8821A_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8821A_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8821A_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8821A_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8821A_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+		(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8821A_1ANT		2
+
+enum bt_info_src_8821a_1ant {
+	BT_INFO_SRC_8821A_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8821A_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8821A_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8821A_1ANT_MAX
+};
+
+enum bt_8821a_1ant_bt_status {
+	BT_8821A_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8821A_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8821A_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8821A_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8821A_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8821A_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8821A_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8821a_1ant_wifi_status {
+	BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8821A_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8821A_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8821A_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8821A_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8821A_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8821a_1ant_coex_algo {
+	BT_8821A_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8821A_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8821A_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8821A_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8821A_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8821A_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8821A_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8821A_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8821A_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8821A_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8821A_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8821A_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8821a_1ant {
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8821a_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8821A_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8821A_1ANT_MAX];
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	boolean
+	bt_whck_test;                        /* Add for ASUS WHQL TEST that enable wifi test bt */
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8821a1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8821a1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8821a1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8821a1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8821a1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8821a1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8821a1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8821a1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8821a1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8821a1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8821a1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8821a1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8821a1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8821a1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8821a1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8821a1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8821a1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8821a1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8821a1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8821a1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8821a1ant_halt_notify(btcoexist)
+#define	ex_halbtc8821a1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8821a1ant_periodical(btcoexist)
+#define	ex_halbtc8821a1ant_display_coex_info(btcoexist)
+
+#endif
+
+#endif

hal/btc/HalBtc8821a2Ant.h

@@ -0,0 +1,205 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8821A_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8821A 2Ant BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8821A_2ANT				1
+
+
+#define	BT_INFO_8821A_2ANT_B_FTP						BIT(7)
+#define	BT_INFO_8821A_2ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8821A_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8821A_2ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8821A_2ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8821A_2ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8821A_2ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8821A_2ANT_B_CONNECTION				BIT(0)
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8821A_2ANT		2
+
+
+#define	BT_8821A_2ANT_WIFI_RSSI_COEXSWITCH_THRES				42  /* WiFi RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
+#define	BT_8821A_2ANT_BT_RSSI_COEXSWITCH_THRES				46 /* BT RSSI Threshold for 2-Ant TDMA/1-Ant PS-TDMA translation */
+
+enum bt_info_src_8821a_2ant {
+	BT_INFO_SRC_8821A_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8821A_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8821A_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8821A_2ANT_MAX
+};
+
+enum bt_8821a_2ant_bt_status {
+	BT_8821A_2ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8821A_2ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8821A_2ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8821A_2ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8821A_2ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8821A_2ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8821A_2ANT_BT_STATUS_MAX
+};
+
+enum bt_8821a_2ant_coex_algo {
+	BT_8821A_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8821A_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8821A_2ANT_COEX_ALGO_HID				= 0x2,
+	BT_8821A_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8821A_2ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8821A_2ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8821A_2ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8821A_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8821A_2ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8821A_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8821A_2ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8821A_2ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8821a_2ant {
+	/* fw mechanism */
+	u8		pre_bt_dec_pwr_lvl;
+	u8		cur_bt_dec_pwr_lvl;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		reset_tdma_adjust;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+
+	/* sw mechanism */
+	boolean		pre_rf_rx_lpf_shrink;
+	boolean		cur_rf_rx_lpf_shrink;
+	u32		bt_rf_0x1e_backup;
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	boolean		pre_dac_swing_on;
+	u32		pre_dac_swing_lvl;
+	boolean		cur_dac_swing_on;
+	u32		cur_dac_swing_lvl;
+	boolean		pre_adc_back_off;
+	boolean		cur_adc_back_off;
+	boolean	pre_agc_table_en;
+	boolean		cur_agc_table_en;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	boolean		need_recover0x948;
+	u32		backup0x948;
+
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+};
+
+struct coex_sta_8821a_2ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8821A_2ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8821A_2ANT_MAX];
+	boolean				bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	u8					coex_table_type;
+	boolean					force_lps_on;
+
+	u8					dis_ver_info_cnt;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8821a2ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a2ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8821a2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a2ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8821a2ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8821a2ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8821a2ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8821a2ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8821a2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8821a2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8821a2ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a2ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8821a2ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821a2ant_display_coex_info(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8821a2ant_power_on_setting(btcoexist)
+#define	ex_halbtc8821a2ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8821a2ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8821a2ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8821a2ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8821a2ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8821a2ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8821a2ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8821a2ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8821a2ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8821a2ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8821a2ant_halt_notify(btcoexist)
+#define	ex_halbtc8821a2ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8821a2ant_periodical(btcoexist)
+#define	ex_halbtc8821a2ant_display_coex_info(btcoexist)
+#endif
+
+#endif

hal/btc/HalBtc8821aCsr2Ant.h

@@ -0,0 +1,188 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8821A_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8821A_CSR 2Ant BT Co-exist definition
+ * ******************************************* */
+#define	BT_INFO_8821A_CSR_2ANT_B_FTP						BIT(7)
+#define	BT_INFO_8821A_CSR_2ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8821A_CSR_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8821A_CSR_2ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8821A_CSR_2ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8821A_CSR_2ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8821A_CSR_2ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8821A_CSR_2ANT_B_CONNECTION				BIT(0)
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8821A_CSR_2ANT		2
+
+enum bt_info_src_8821a_csr_2ant {
+	BT_INFO_SRC_8821A_CSR_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8821A_CSR_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8821A_CSR_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8821A_CSR_2ANT_MAX
+};
+
+enum bt_8821a_csr_2ant_bt_status {
+	BT_8821A_CSR_2ANT_BT_STATUS_IDLE				= 0x0,
+	BT_8821A_CSR_2ANT_BT_STATUS_CONNECTED_IDLE	= 0x1,
+	BT_8821A_CSR_2ANT_BT_STATUS_NON_IDLE			= 0x2,
+	BT_8821A_CSR_2ANT_BT_STATUS_MAX
+};
+
+enum bt_8821a_csr_2ant_coex_algo {
+	BT_8821A_CSR_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8821A_CSR_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8821A_CSR_2ANT_COEX_ALGO_HID				= 0x2,
+	BT_8821A_CSR_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8821A_CSR_2ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8821A_CSR_2ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8821A_CSR_2ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8821A_CSR_2ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8821A_CSR_2ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8821a_csr_2ant {
+	/* fw mechanism */
+	boolean		pre_dec_bt_pwr;
+	boolean		cur_dec_bt_pwr;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[6];
+	u8		ps_tdma_du_adj_type;
+	boolean		reset_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+
+	/* sw mechanism */
+	boolean		pre_rf_rx_lpf_shrink;
+	boolean		cur_rf_rx_lpf_shrink;
+	u32		bt_rf_0x1e_backup;
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	boolean		pre_dac_swing_on;
+	u32		pre_dac_swing_lvl;
+	boolean		cur_dac_swing_on;
+	u32		cur_dac_swing_lvl;
+	boolean		pre_adc_back_off;
+	boolean		cur_adc_back_off;
+	boolean	pre_agc_table_en;
+	boolean		cur_agc_table_en;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+
+	u8 cur_ampdu_num_type;
+	u8 pre_ampdu_num_type;
+	u16 backup_ampdu_max_num;
+
+	u8 cur_ampdu_time_type;
+	u8 pre_ampdu_time_type;
+	u8 backup_ampdu_max_time;
+
+	u8		cur_arfr_type;
+	u8		pre_arfr_type;
+	u32		backup_arfr_cnt1;
+	u32		backup_arfr_cnt2;
+
+	u8		cur_retry_limit_type;
+	u8		pre_retry_limit_type;
+	u16		backup_retry_limit;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+};
+
+struct coex_sta_8821a_csr_2ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					slave;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8821A_CSR_2ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8821A_CSR_2ANT_MAX];
+	boolean					c2h_bt_inquiry_page;
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8821aCsr2ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821aCsr2ant_init_hw_config(IN struct btc_coexist *btcoexist,
+		IN boolean wifi_only);
+void ex_halbtc8821aCsr2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821aCsr2ant_ips_notify(IN struct btc_coexist *btcoexist,
+				      IN u8 type);
+void ex_halbtc8821aCsr2ant_lps_notify(IN struct btc_coexist *btcoexist,
+				      IN u8 type);
+void ex_halbtc8821aCsr2ant_scan_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8821aCsr2ant_connect_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8821aCsr2ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8821aCsr2ant_specific_packet_notify(IN struct btc_coexist
+		*btcoexist, IN u8 type);
+void ex_halbtc8821aCsr2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+		IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8821aCsr2ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821aCsr2ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				      IN u8 pnp_state);
+void ex_halbtc8821aCsr2ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8821aCsr2ant_display_coex_info(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8821aCsr2ant_power_on_setting(btcoexist)
+#define	ex_halbtc8821aCsr2ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8821aCsr2ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8821aCsr2ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8821aCsr2ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8821aCsr2ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8821aCsr2ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8821aCsr2ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8821aCsr2ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8821aCsr2ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8821aCsr2ant_halt_notify(btcoexist)
+#define	ex_halbtc8821aCsr2ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8821aCsr2ant_periodical(btcoexist)
+#define	ex_halbtc8821aCsr2ant_display_coex_info(btcoexist)
+#endif
+
+#endif

hal/btc/HalBtc8822b1Ant.h

@@ -0,0 +1,408 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8822B_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8822B 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8822B_1ANT				1
+
+#define	BT_INFO_8822B_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8822B_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8822B_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8822B_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8822B_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8822B_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8822B_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8822B_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8822B_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+		(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8822B_1ANT		2
+
+#define  BT_8822B_1ANT_WIFI_NOISY_THRESH							30   /* max: 255 */
+
+/* for Antenna detection */
+#define	BT_8822B_1ANT_ANTDET_PSDTHRES_BACKGROUND					50
+#define	BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
+#define	BT_8822B_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			55
+#define	BT_8822B_1ANT_ANTDET_PSDTHRES_1ANT							35
+#define	BT_8822B_1ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
+#define	BT_8822B_1ANT_ANTDET_ENABLE									0
+#define	BT_8822B_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE				0
+
+#define	BT_8822B_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT		30000
+#define  BT_8822B_1ANT_WIFI_NOISY_THRESH							30   /* max: 255 */
+
+
+enum bt_8822b_1ant_signal_state {
+	BT_8822B_1ANT_SIG_STA_SET_TO_LOW		= 0x0,
+	BT_8822B_1ANT_SIG_STA_SET_BY_HW		= 0x0,
+	BT_8822B_1ANT_SIG_STA_SET_TO_HIGH		= 0x1,
+	BT_8822B_1ANT_SIG_STA_MAX
+};
+
+enum bt_8822b_1ant_path_ctrl_owner {
+	BT_8822B_1ANT_PCO_BTSIDE		= 0x0,
+	BT_8822B_1ANT_PCO_WLSIDE	= 0x1,
+	BT_8822B_1ANT_PCO_MAX
+};
+
+enum bt_8822b_1ant_gnt_ctrl_type {
+	BT_8822B_1ANT_GNT_CTRL_BY_PTA		= 0x0,
+	BT_8822B_1ANT_GNT_CTRL_BY_SW		= 0x1,
+	BT_8822B_1ANT_GNT_CTRL_MAX
+};
+
+enum bt_8822b_1ant_gnt_ctrl_block {
+	BT_8822B_1ANT_GNT_BLOCK_RFC_BB		= 0x0,
+	BT_8822B_1ANT_GNT_BLOCK_RFC			= 0x1,
+	BT_8822B_1ANT_GNT_BLOCK_BB			= 0x2,
+	BT_8822B_1ANT_GNT_BLOCK_MAX
+};
+
+enum bt_8822b_1ant_lte_coex_table_type {
+	BT_8822B_1ANT_CTT_WL_VS_LTE			= 0x0,
+	BT_8822B_1ANT_CTT_BT_VS_LTE			= 0x1,
+	BT_8822B_1ANT_CTT_MAX
+};
+
+enum bt_8822b_1ant_lte_break_table_type {
+	BT_8822B_1ANT_LBTT_WL_BREAK_LTE			= 0x0,
+	BT_8822B_1ANT_LBTT_BT_BREAK_LTE				= 0x1,
+	BT_8822B_1ANT_LBTT_LTE_BREAK_WL			= 0x2,
+	BT_8822B_1ANT_LBTT_LTE_BREAK_BT				= 0x3,
+	BT_8822B_1ANT_LBTT_MAX
+};
+
+enum bt_info_src_8822b_1ant {
+	BT_INFO_SRC_8822B_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8822B_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8822B_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8822B_1ANT_MAX
+};
+
+enum bt_8822b_1ant_bt_status {
+	BT_8822B_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8822B_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8822B_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8822B_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8822B_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8822B_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8822B_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8822b_1ant_wifi_status {
+	BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8822B_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8822B_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8822B_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8822B_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8822B_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8822b_1ant_coex_algo {
+	BT_8822B_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8822B_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8822B_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8822B_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8822B_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8822B_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8822B_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8822B_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8822B_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8822B_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8822B_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8822B_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+enum bt_8822b_1ant_ext_ant_switch_type {
+	BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SPDT		= 0x0,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_USE_SP3T		= 0x1,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_MAX
+};
+
+enum bt_8822b_1ant_ext_ant_switch_ctrl_type {
+	BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BBSW	= 0x0,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_PTA	= 0x1,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_ANTDIV	= 0x2,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_MAC	= 0x3,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_BY_BT		= 0x4,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_CTRL_MAX
+};
+
+enum bt_8822b_1ant_ext_ant_switch_pos_type {
+	BT_8822B_1ANT_EXT_ANT_SWITCH_TO_BT			= 0x0,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLG			= 0x1,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_TO_WLA			= 0x2,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_TO_NOCARE		= 0x3,
+	BT_8822B_1ANT_EXT_ANT_SWITCH_TO_MAX
+};
+
+enum bt_8822b_1ant_phase{
+	BT_8822B_1ANT_PHASE_COEX_INIT				= 0x0,
+	BT_8822B_1ANT_PHASE_WLANONLY_INIT			= 0x1,	
+	BT_8822B_1ANT_PHASE_WLAN_OFF				= 0x2,
+	BT_8822B_1ANT_PHASE_2G_RUNTIME				= 0x3,
+	BT_8822B_1ANT_PHASE_5G_RUNTIME				= 0x4,
+	BT_8822B_1ANT_PHASE_BTMPMODE				= 0x5,
+	BT_8822B_1ANT_PHASE_MAX
+};
+
+
+struct coex_dm_8822b_1ant {
+	/* hw setting */
+	u32		pre_ant_pos_type;
+	u32		cur_ant_pos_type;
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u32		pre_ext_ant_switch_status;
+	u32		cur_ext_ant_switch_status;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8822b_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+	boolean					bt_hi_pri_link_exist;
+	u8					num_of_profile;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	s8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8822B_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8822B_1ANT_MAX];
+	boolean					bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	boolean					cck_lock;
+	boolean					pre_ccklock;
+	boolean					cck_ever_lock;
+	u8					coex_table_type;
+
+	boolean					force_lps_on;
+	u32					wrong_profile_notification;
+
+	boolean					concurrent_rx_mode_on;
+
+	u32 					special_pkt_period_cnt;
+
+	u16					score_board;
+
+	u8					a2dp_bit_pool;
+	u8					cut_version;
+	boolean				acl_busy;
+	boolean				wl_rf_off_on_event;
+	boolean				bt_create_connection;
+	boolean				run_time_state;
+
+	u32					bt_coex_supported_feature;
+	u32					bt_coex_supported_version;
+};
+
+struct rfe_type_8822b_1ant{
+
+	u8			rfe_module_type;	
+	boolean		ext_ant_switch_exist;
+	u8			ext_ant_switch_type;	
+	u8			ext_ant_switch_ctrl_polarity;		/*  iF 0: ANTSW(rfe_sel9)=0, ANTSWB(rfe_sel8)=1 =>  Ant to BT/5G */
+};
+
+
+#define  BT_8822B_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
+#define  BT_8822B_1ANT_ANTDET_PSD_AVGNUM			1	/* MAX:3 */
+#define	BT_8822B_1ANT_ANTDET_BUF_LEN				16
+
+struct psdscan_sta_8822b_1ant {
+
+	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32			ant_det_bt_tx_time;
+	u32			ant_det_pre_psdscan_peak_val;
+	boolean			ant_det_is_ant_det_available;
+	u32			ant_det_psd_scan_peak_val;
+	boolean			ant_det_is_btreply_available;
+	u32			ant_det_psd_scan_peak_freq;
+
+	u8			ant_det_result;
+	u8			ant_det_peak_val[BT_8822B_1ANT_ANTDET_BUF_LEN];
+	u8			ant_det_peak_freq[BT_8822B_1ANT_ANTDET_BUF_LEN];
+	u32			ant_det_try_count;
+	u32			ant_det_fail_count;
+	u32			ant_det_inteval_count;
+	u32			ant_det_thres_offset;
+
+	u32			real_cent_freq;
+	s32			real_offset;
+	u32			real_span;
+
+	u32			psd_band_width;  /* unit: Hz */
+	u32			psd_point;		/* 128/256/512/1024 */
+	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_start_point;
+	u32			psd_stop_point;
+	u32			psd_max_value_point;
+	u32			psd_max_value;
+	u32			psd_start_base;
+	u32			psd_avg_num;	/* 1/8/16/32 */
+	u32			psd_gen_count;
+	boolean			is_psd_running;
+	boolean			is_psd_show_max_only;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8822b1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8822b1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8822b1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8822b1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8822b1ant_switchband_notify(IN struct btc_coexist *btcoexist,
+					IN u8 type);
+void ex_halbtc8822b1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8822b1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8822b1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8822b1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8822b1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8822b1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8822b1ant_ScoreBoardStatusNotify(IN struct btc_coexist *btcoexist,
+		IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8822b1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8822b1ant_antenna_detection(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8822b1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+
+void ex_halbtc8822b1ant_psd_scan(IN struct btc_coexist *btcoexist,
+		 IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8822b1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
+
+void ex_halbtc8822b1ant_dbg_control(IN struct btc_coexist *btcoexist,
+				    IN u8 op_code, IN u8 op_len, IN u8 *pdata);
+
+#else
+#define	ex_halbtc8822b1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8822b1ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8822b1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8822b1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8822b1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_switchband_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8822b1ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8822b1ant_halt_notify(btcoexist)
+#define	ex_halbtc8822b1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8822b1ant_ScoreBoardStatusNotify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8822b1ant_coex_dm_reset(btcoexist)
+#define	ex_halbtc8822b1ant_periodical(btcoexist)
+#define	ex_halbtc8822b1ant_display_coex_info(btcoexist)
+#define	ex_halbtc8822b1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8822b1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8822b1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8822b1ant_display_ant_detection(btcoexist)
+#define	ex_halbtc8822b1ant_dbg_control(btcoexist, op_code, op_len, pdata)
+#endif
+
+#endif

hal/btc/HalBtcOutSrc.h

@@ -0,0 +1,937 @@
+#ifndef	__HALBTC_OUT_SRC_H__
+#define __HALBTC_OUT_SRC_H__
+
+
+#define		BTC_COEX_OFFLOAD			0
+#define		BTC_TMP_BUF_SHORT		20
+
+extern u1Byte	gl_btc_trace_buf[];
+#define		BTC_SPRINTF			rsprintf
+#define		BTC_TRACE(_MSG_) 		RT_TRACE(COMP_COEX, DBG_LOUD, (_MSG_))
+#define		BT_PrintData(adapter, _MSG_, len, data)	RTW_DBG_DUMP((_MSG_), data, len)
+
+
+#define		NORMAL_EXEC					FALSE
+#define		FORCE_EXEC						TRUE
+
+#define		BTC_RF_OFF					0x0
+#define		BTC_RF_ON					0x1
+
+#define		BTC_RF_A					0x0
+#define		BTC_RF_B					0x1
+#define		BTC_RF_C					0x2
+#define		BTC_RF_D					0x3
+
+#define		BTC_SMSP				SINGLEMAC_SINGLEPHY
+#define		BTC_DMDP				DUALMAC_DUALPHY
+#define		BTC_DMSP				DUALMAC_SINGLEPHY
+#define		BTC_MP_UNKNOWN		0xff
+
+#define		BT_COEX_ANT_TYPE_PG			0
+#define		BT_COEX_ANT_TYPE_ANTDIV		1
+#define		BT_COEX_ANT_TYPE_DETECTED	2
+
+#define		BTC_MIMO_PS_STATIC			0	// 1ss
+#define		BTC_MIMO_PS_DYNAMIC			1	// 2ss
+
+#define		BTC_RATE_DISABLE			0
+#define		BTC_RATE_ENABLE				1
+
+// single Antenna definition
+#define		BTC_ANT_PATH_WIFI			0
+#define		BTC_ANT_PATH_BT				1
+#define		BTC_ANT_PATH_PTA			2
+#define		BTC_ANT_PATH_WIFI5G			3
+#define		BTC_ANT_PATH_AUTO			4
+// dual Antenna definition
+#define		BTC_ANT_WIFI_AT_MAIN		0
+#define		BTC_ANT_WIFI_AT_AUX			1
+#define		BTC_ANT_WIFI_AT_DIVERSITY	2
+// coupler Antenna definition
+#define		BTC_ANT_WIFI_AT_CPL_MAIN	0
+#define		BTC_ANT_WIFI_AT_CPL_AUX		1
+
+typedef enum _BTC_POWERSAVE_TYPE{
+	BTC_PS_WIFI_NATIVE			= 0,	// wifi original power save behavior
+	BTC_PS_LPS_ON				= 1,
+	BTC_PS_LPS_OFF				= 2,
+	BTC_PS_MAX
+} BTC_POWERSAVE_TYPE, *PBTC_POWERSAVE_TYPE;
+
+typedef enum _BTC_BT_REG_TYPE{
+	BTC_BT_REG_RF						= 0,
+	BTC_BT_REG_MODEM					= 1,
+	BTC_BT_REG_BLUEWIZE					= 2,
+	BTC_BT_REG_VENDOR					= 3,
+	BTC_BT_REG_LE						= 4,
+	BTC_BT_REG_MAX
+} BTC_BT_REG_TYPE, *PBTC_BT_REG_TYPE;
+
+typedef enum _BTC_CHIP_INTERFACE{
+	BTC_INTF_UNKNOWN	= 0,
+	BTC_INTF_PCI			= 1,
+	BTC_INTF_USB			= 2,
+	BTC_INTF_SDIO		= 3,
+	BTC_INTF_MAX
+} BTC_CHIP_INTERFACE, *PBTC_CHIP_INTERFACE;
+
+typedef enum _BTC_CHIP_TYPE{
+	BTC_CHIP_UNDEF		= 0,
+	BTC_CHIP_CSR_BC4		= 1,
+	BTC_CHIP_CSR_BC8		= 2,
+	BTC_CHIP_RTL8723A 	= 3,
+	BTC_CHIP_RTL8821	= 4,
+	BTC_CHIP_RTL8723B 	= 5,
+	BTC_CHIP_MAX
+} BTC_CHIP_TYPE, *PBTC_CHIP_TYPE;
+
+// following is for wifi link status
+#define		WIFI_STA_CONNECTED				BIT0
+#define		WIFI_AP_CONNECTED				BIT1
+#define		WIFI_HS_CONNECTED				BIT2
+#define		WIFI_P2P_GO_CONNECTED			BIT3
+#define		WIFI_P2P_GC_CONNECTED			BIT4
+
+// following is for command line utility
+#define	CL_SPRINTF	rsprintf
+#define	CL_PRINTF	DCMD_Printf
+
+struct btc_board_info{
+	/* The following is some board information */
+	u8				bt_chip_type;
+	u8				pg_ant_num;	/* pg ant number */
+	u8				btdm_ant_num;	/* ant number for btdm */
+	u8				btdm_ant_num_by_ant_det;	/* ant number for btdm after antenna detection */
+	u8				btdm_ant_pos;		/* Bryant Add to indicate Antenna Position for (pg_ant_num = 2) && (btdm_ant_num =1)  (DPDT+1Ant case) */
+	u8				single_ant_path;	/* current used for 8723b only, 1=>s0,  0=>s1 */
+	boolean			tfbga_package;    /* for Antenna detect threshold */
+	boolean			btdm_ant_det_finish;
+	u8				ant_type;
+	u8				rfe_type;
+	u8				ant_div_cfg;
+};
+
+typedef enum _BTC_DBG_OPCODE{
+	BTC_DBG_SET_COEX_NORMAL				= 0x0,
+	BTC_DBG_SET_COEX_WIFI_ONLY				= 0x1,
+	BTC_DBG_SET_COEX_BT_ONLY				= 0x2,
+	BTC_DBG_SET_COEX_DEC_BT_PWR				= 0x3,
+	BTC_DBG_SET_COEX_BT_AFH_MAP				= 0x4,
+	BTC_DBG_SET_COEX_BT_IGNORE_WLAN_ACT		= 0x5,
+	BTC_DBG_SET_COEX_MANUAL_CTRL				= 0x6,
+	BTC_DBG_MAX
+}BTC_DBG_OPCODE,*PBTC_DBG_OPCODE;
+
+typedef enum _BTC_RSSI_STATE{
+	BTC_RSSI_STATE_HIGH						= 0x0,
+	BTC_RSSI_STATE_MEDIUM					= 0x1,
+	BTC_RSSI_STATE_LOW						= 0x2,
+	BTC_RSSI_STATE_STAY_HIGH					= 0x3,
+	BTC_RSSI_STATE_STAY_MEDIUM				= 0x4,
+	BTC_RSSI_STATE_STAY_LOW					= 0x5,
+	BTC_RSSI_MAX
+}BTC_RSSI_STATE,*PBTC_RSSI_STATE;
+#define	BTC_RSSI_HIGH(_rssi_)	((_rssi_==BTC_RSSI_STATE_HIGH||_rssi_==BTC_RSSI_STATE_STAY_HIGH)? TRUE:FALSE)
+#define	BTC_RSSI_MEDIUM(_rssi_)	((_rssi_==BTC_RSSI_STATE_MEDIUM||_rssi_==BTC_RSSI_STATE_STAY_MEDIUM)? TRUE:FALSE)
+#define	BTC_RSSI_LOW(_rssi_)	((_rssi_==BTC_RSSI_STATE_LOW||_rssi_==BTC_RSSI_STATE_STAY_LOW)? TRUE:FALSE)
+
+typedef enum _BTC_WIFI_ROLE{
+	BTC_ROLE_STATION						= 0x0,
+	BTC_ROLE_AP								= 0x1,
+	BTC_ROLE_IBSS							= 0x2,
+	BTC_ROLE_HS_MODE						= 0x3,
+	BTC_ROLE_MAX
+}BTC_WIFI_ROLE,*PBTC_WIFI_ROLE;
+
+typedef enum _BTC_WIRELESS_FREQ{
+	BTC_FREQ_2_4G					= 0x0,
+	BTC_FREQ_5G						= 0x1,
+	BTC_FREQ_MAX	
+}BTC_WIRELESS_FREQ,*PBTC_WIRELESS_FREQ;
+
+typedef enum _BTC_WIFI_BW_MODE{
+	BTC_WIFI_BW_LEGACY					= 0x0,
+	BTC_WIFI_BW_HT20					= 0x1,
+	BTC_WIFI_BW_HT40					= 0x2,
+	BTC_WIFI_BW_HT80					= 0x3,
+	BTC_WIFI_BW_HT160					= 0x4,
+	BTC_WIFI_BW_MAX	
+}BTC_WIFI_BW_MODE,*PBTC_WIFI_BW_MODE;
+
+typedef enum _BTC_WIFI_TRAFFIC_DIR{
+	BTC_WIFI_TRAFFIC_TX					= 0x0,
+	BTC_WIFI_TRAFFIC_RX					= 0x1,
+	BTC_WIFI_TRAFFIC_MAX	
+}BTC_WIFI_TRAFFIC_DIR,*PBTC_WIFI_TRAFFIC_DIR;
+
+typedef enum _BTC_WIFI_PNP{
+	BTC_WIFI_PNP_WAKE_UP					= 0x0,
+	BTC_WIFI_PNP_SLEEP						= 0x1,
+	BTC_WIFI_PNP_MAX
+}BTC_WIFI_PNP,*PBTC_WIFI_PNP;
+
+typedef enum _BTC_IOT_PEER
+{
+	BTC_IOT_PEER_UNKNOWN = 0,
+	BTC_IOT_PEER_REALTEK = 1,
+	BTC_IOT_PEER_REALTEK_92SE = 2,
+	BTC_IOT_PEER_BROADCOM = 3,
+	BTC_IOT_PEER_RALINK = 4,
+	BTC_IOT_PEER_ATHEROS = 5,
+	BTC_IOT_PEER_CISCO = 6,
+	BTC_IOT_PEER_MERU = 7,	
+	BTC_IOT_PEER_MARVELL = 8,
+	BTC_IOT_PEER_REALTEK_SOFTAP = 9,// peer is RealTek SOFT_AP, by Bohn, 2009.12.17
+	BTC_IOT_PEER_SELF_SOFTAP = 10, // Self is SoftAP
+	BTC_IOT_PEER_AIRGO = 11,
+	BTC_IOT_PEER_INTEL 				= 12, 
+	BTC_IOT_PEER_RTK_APCLIENT 		= 13, 
+	BTC_IOT_PEER_REALTEK_81XX 		= 14,	
+	BTC_IOT_PEER_REALTEK_WOW 		= 15,
+	BTC_IOT_PEER_REALTEK_JAGUAR_BCUTAP = 16,
+	BTC_IOT_PEER_REALTEK_JAGUAR_CCUTAP = 17,
+	BTC_IOT_PEER_MAX,
+}BTC_IOT_PEER, *PBTC_IOT_PEER;
+
+//for 8723b-d cut large current issue
+typedef enum _BTC_WIFI_COEX_STATE{
+	BTC_WIFI_STAT_INIT,
+	BTC_WIFI_STAT_IQK,
+	BTC_WIFI_STAT_NORMAL_OFF,
+	BTC_WIFI_STAT_MP_OFF,
+	BTC_WIFI_STAT_NORMAL,
+	BTC_WIFI_STAT_ANT_DIV,
+	BTC_WIFI_STAT_MAX
+}BTC_WIFI_COEX_STATE,*PBTC_WIFI_COEX_STATE;
+
+typedef enum _BTC_ANT_TYPE{
+	BTC_ANT_TYPE_0,
+	BTC_ANT_TYPE_1,
+	BTC_ANT_TYPE_2,
+	BTC_ANT_TYPE_3,
+	BTC_ANT_TYPE_4,
+	BTC_ANT_TYPE_MAX
+}BTC_ANT_TYPE,*PBTC_ANT_TYPE;
+
+typedef enum _BTC_VENDOR{
+	BTC_VENDOR_LENOVO,
+	BTC_VENDOR_ASUS,	
+	BTC_VENDOR_OTHER
+}BTC_VENDOR,*PBTC_VENDOR;
+
+
+// defined for BFP_BTC_GET
+typedef enum _BTC_GET_TYPE{
+	// type BOOLEAN
+	BTC_GET_BL_HS_OPERATION,
+	BTC_GET_BL_HS_CONNECTING,
+	BTC_GET_BL_WIFI_CONNECTED,
+	BTC_GET_BL_WIFI_BUSY,
+	BTC_GET_BL_WIFI_SCAN,
+	BTC_GET_BL_WIFI_LINK,
+	BTC_GET_BL_WIFI_ROAM,
+	BTC_GET_BL_WIFI_4_WAY_PROGRESS,
+	BTC_GET_BL_WIFI_UNDER_5G,
+	BTC_GET_BL_WIFI_AP_MODE_ENABLE,
+	BTC_GET_BL_WIFI_ENABLE_ENCRYPTION,
+	BTC_GET_BL_WIFI_UNDER_B_MODE,
+	BTC_GET_BL_EXT_SWITCH,
+	BTC_GET_BL_WIFI_IS_IN_MP_MODE,
+	BTC_GET_BL_IS_ASUS_8723B,
+
+	// type s4Byte
+	BTC_GET_S4_WIFI_RSSI,
+	BTC_GET_S4_HS_RSSI,
+	
+	// type u4Byte
+	BTC_GET_U4_WIFI_BW,
+	BTC_GET_U4_WIFI_TRAFFIC_DIRECTION,
+	BTC_GET_U4_WIFI_FW_VER,
+	BTC_GET_U4_WIFI_LINK_STATUS,
+	BTC_GET_U4_BT_PATCH_VER,
+	BTC_GET_U4_VENDOR,
+	BTC_GET_U4_WIFI_IQK_TOTAL,
+	BTC_GET_U4_WIFI_IQK_OK,
+	BTC_GET_U4_WIFI_IQK_FAIL,
+
+	// type u1Byte
+	BTC_GET_U1_WIFI_DOT11_CHNL,
+	BTC_GET_U1_WIFI_CENTRAL_CHNL,
+	BTC_GET_U1_WIFI_HS_CHNL,
+	BTC_GET_U1_WIFI_P2P_CHNL,
+	BTC_GET_U1_MAC_PHY_MODE,
+	BTC_GET_U1_AP_NUM,
+	BTC_GET_U1_ANT_TYPE,
+	BTC_GET_U1_IOT_PEER,
+
+	//===== for 1Ant ======
+	BTC_GET_U1_LPS_MODE,
+
+	BTC_GET_MAX
+}BTC_GET_TYPE,*PBTC_GET_TYPE;
+
+// defined for BFP_BTC_SET
+typedef enum _BTC_SET_TYPE{
+	// type BOOLEAN
+	BTC_SET_BL_BT_DISABLE,
+	BTC_SET_BL_BT_TRAFFIC_BUSY,
+	BTC_SET_BL_BT_LIMITED_DIG,
+	BTC_SET_BL_FORCE_TO_ROAM,
+	BTC_SET_BL_TO_REJ_AP_AGG_PKT,
+	BTC_SET_BL_BT_CTRL_AGG_SIZE,
+	BTC_SET_BL_INC_SCAN_DEV_NUM,
+	BTC_SET_BL_BT_TX_RX_MASK,
+	BTC_SET_BL_MIRACAST_PLUS_BT,
+
+	// type u1Byte
+	BTC_SET_U1_RSSI_ADJ_VAL_FOR_AGC_TABLE_ON,
+	BTC_SET_U1_AGG_BUF_SIZE,
+
+	// type trigger some action
+	BTC_SET_ACT_GET_BT_RSSI,
+	BTC_SET_ACT_AGGREGATE_CTRL,
+	BTC_SET_ACT_ANTPOSREGRISTRY_CTRL,
+	//===== for 1Ant ======
+	// type BOOLEAN
+
+	// type u1Byte
+	BTC_SET_U1_RSSI_ADJ_VAL_FOR_1ANT_COEX_TYPE,
+	BTC_SET_U1_LPS_VAL,
+	BTC_SET_U1_RPWM_VAL,
+	// type trigger some action
+	BTC_SET_ACT_LEAVE_LPS,
+	BTC_SET_ACT_ENTER_LPS,
+	BTC_SET_ACT_NORMAL_LPS,
+	BTC_SET_ACT_DISABLE_LOW_POWER,
+	BTC_SET_ACT_UPDATE_RAMASK,
+	BTC_SET_ACT_SEND_MIMO_PS,
+	// BT Coex related
+	BTC_SET_ACT_CTRL_BT_INFO,
+	BTC_SET_ACT_CTRL_BT_COEX,
+	BTC_SET_ACT_CTRL_8723B_ANT,
+	//=================
+	BTC_SET_MAX
+}BTC_SET_TYPE,*PBTC_SET_TYPE;
+
+typedef enum _BTC_DBG_DISP_TYPE{
+	BTC_DBG_DISP_COEX_STATISTICS				= 0x0,
+	BTC_DBG_DISP_BT_LINK_INFO				= 0x1,
+	BTC_DBG_DISP_WIFI_STATUS				= 0x2,
+	BTC_DBG_DISP_MAX
+}BTC_DBG_DISP_TYPE,*PBTC_DBG_DISP_TYPE;
+
+typedef enum _BTC_NOTIFY_TYPE_IPS{
+	BTC_IPS_LEAVE							= 0x0,
+	BTC_IPS_ENTER							= 0x1,
+	BTC_IPS_MAX
+}BTC_NOTIFY_TYPE_IPS,*PBTC_NOTIFY_TYPE_IPS;
+typedef enum _BTC_NOTIFY_TYPE_LPS{
+	BTC_LPS_DISABLE							= 0x0,
+	BTC_LPS_ENABLE							= 0x1,
+	BTC_LPS_MAX
+}BTC_NOTIFY_TYPE_LPS,*PBTC_NOTIFY_TYPE_LPS;
+typedef enum _BTC_NOTIFY_TYPE_SCAN{
+	BTC_SCAN_FINISH							= 0x0,
+	BTC_SCAN_START							= 0x1,
+	BTC_SCAN_START_2G						= 0x2,
+	BTC_SCAN_MAX
+}BTC_NOTIFY_TYPE_SCAN,*PBTC_NOTIFY_TYPE_SCAN;
+typedef enum _BTC_NOTIFY_TYPE_SWITCHBAND{
+	BTC_NOT_SWITCH							= 0x0,
+	BTC_SWITCH_TO_24G						= 0x1,
+	BTC_SWITCH_TO_5G						= 0x2,
+	BTC_SWITCH_TO_24G_NoForScan				= 0x3,
+	BTC_SWITCH_MAX
+}BTC_NOTIFY_TYPE_SWITCHBAND,*PBTC_NOTIFY_TYPE_SWITCHBAND;
+typedef enum _BTC_NOTIFY_TYPE_ASSOCIATE{
+	BTC_ASSOCIATE_FINISH						= 0x0,
+	BTC_ASSOCIATE_START						= 0x1,
+	BTC_ASSOCIATE_5G_FINISH						= 0x2,
+	BTC_ASSOCIATE_5G_START						= 0x3,
+	BTC_ASSOCIATE_MAX
+}BTC_NOTIFY_TYPE_ASSOCIATE,*PBTC_NOTIFY_TYPE_ASSOCIATE;
+typedef enum _BTC_NOTIFY_TYPE_MEDIA_STATUS{
+	BTC_MEDIA_DISCONNECT					= 0x0,
+	BTC_MEDIA_CONNECT						= 0x1,
+	BTC_MEDIA_MAX
+}BTC_NOTIFY_TYPE_MEDIA_STATUS,*PBTC_NOTIFY_TYPE_MEDIA_STATUS;
+typedef enum _BTC_NOTIFY_TYPE_SPECIFIC_PACKET{
+	BTC_PACKET_UNKNOWN					= 0x0,
+	BTC_PACKET_DHCP							= 0x1,
+	BTC_PACKET_ARP							= 0x2,
+	BTC_PACKET_EAPOL						= 0x3,
+	BTC_PACKET_MAX
+}BTC_NOTIFY_TYPE_SPECIFIC_PACKET,*PBTC_NOTIFY_TYPE_SPECIFIC_PACKET;
+typedef enum _BTC_NOTIFY_TYPE_STACK_OPERATION{
+	BTC_STACK_OP_NONE					= 0x0,
+	BTC_STACK_OP_INQ_PAGE_PAIR_START		= 0x1,
+	BTC_STACK_OP_INQ_PAGE_PAIR_FINISH	= 0x2,
+	BTC_STACK_OP_MAX
+}BTC_NOTIFY_TYPE_STACK_OPERATION,*PBTC_NOTIFY_TYPE_STACK_OPERATION;
+
+//Bryant Add
+typedef enum _BTC_ANTENNA_POS{
+	BTC_ANTENNA_AT_MAIN_PORT				= 0x1,
+	BTC_ANTENNA_AT_AUX_PORT				= 0x2,
+}BTC_ANTENNA_POS,*PBTC_ANTENNA_POS;
+
+//Bryant Add
+typedef enum _BTC_BT_OFFON{
+	BTC_BT_OFF				= 0x0,
+	BTC_BT_ON				= 0x1,
+}BTC_BTOFFON,*PBTC_BT_OFFON;
+
+//==================================================
+// For following block is for coex offload
+//==================================================
+typedef struct _COL_H2C{
+	u1Byte	opcode;
+	u1Byte	opcode_ver:4;
+	u1Byte	req_num:4;
+	u1Byte	buf[1];
+}COL_H2C, *PCOL_H2C;
+
+#define	COL_C2H_ACK_HDR_LEN	3
+typedef struct _COL_C2H_ACK{
+	u1Byte	status;
+	u1Byte	opcode_ver:4;
+	u1Byte	req_num:4;
+	u1Byte	ret_len;
+	u1Byte	buf[1];
+}COL_C2H_ACK, *PCOL_C2H_ACK;
+
+#define	COL_C2H_IND_HDR_LEN	3
+typedef struct _COL_C2H_IND{
+	u1Byte	type;
+	u1Byte	version;
+	u1Byte	length;
+	u1Byte	data[1];
+}COL_C2H_IND, *PCOL_C2H_IND;
+
+//============================================
+// NOTE: for debug message, the following define should match
+// the strings in coexH2cResultString.
+//============================================
+typedef enum _COL_H2C_STATUS{
+	// c2h status
+	COL_STATUS_C2H_OK								= 0x00, // Wifi received H2C request and check content ok.
+	COL_STATUS_C2H_UNKNOWN							= 0x01,	// Not handled routine
+	COL_STATUS_C2H_UNKNOWN_OPCODE					= 0x02,	// Invalid OP code, It means that wifi firmware received an undefiend OP code.
+	COL_STATUS_C2H_OPCODE_VER_MISMATCH			= 0x03, // Wifi firmware and wifi driver mismatch, need to update wifi driver or wifi or.
+	COL_STATUS_C2H_PARAMETER_ERROR				= 0x04, // Error paraneter.(ex: parameters = NULL but it should have values)
+	COL_STATUS_C2H_PARAMETER_OUT_OF_RANGE		= 0x05, // Wifi firmware needs to check the parameters from H2C request and return the status.(ex: ch = 500, it's wrong)
+	// other COL status start from here
+	COL_STATUS_C2H_REQ_NUM_MISMATCH			, // c2h req_num mismatch, means this c2h is not we expected.
+	COL_STATUS_H2C_HALMAC_FAIL					, // HALMAC return fail.
+	COL_STATUS_H2C_TIMTOUT						, // not received the c2h response from fw
+	COL_STATUS_INVALID_C2H_LEN					, // invalid coex offload c2h ack length, must >= 3
+	COL_STATUS_COEX_DATA_OVERFLOW				, // coex returned length over the c2h ack length.
+	COL_STATUS_MAX
+}COL_H2C_STATUS,*PCOL_H2C_STATUS;
+
+#define	COL_MAX_H2C_REQ_NUM		16
+
+#define	COL_H2C_BUF_LEN			20
+typedef enum _COL_OPCODE{
+	COL_OP_WIFI_STATUS_NOTIFY					= 0x0,
+	COL_OP_WIFI_PROGRESS_NOTIFY					= 0x1,
+	COL_OP_WIFI_INFO_NOTIFY						= 0x2,
+	COL_OP_WIFI_POWER_STATE_NOTIFY				= 0x3,
+	COL_OP_SET_CONTROL							= 0x4,
+	COL_OP_GET_CONTROL							= 0x5,
+	COL_OP_WIFI_OPCODE_MAX
+}COL_OPCODE,*PCOL_OPCODE;
+
+typedef enum _COL_IND_TYPE{
+	COL_IND_BT_INFO								= 0x0,
+	COL_IND_PSTDMA								= 0x1,
+	COL_IND_LIMITED_TX_RX						= 0x2,
+	COL_IND_COEX_TABLE							= 0x3,
+	COL_IND_REQ									= 0x4,
+	COL_IND_MAX
+}COL_IND_TYPE,*PCOL_IND_TYPE;
+
+typedef struct _COL_SINGLE_H2C_RECORD{
+	u1Byte					h2c_buf[COL_H2C_BUF_LEN];	// the latest sent h2c buffer
+	u4Byte					h2c_len;
+	u1Byte					c2h_ack_buf[COL_H2C_BUF_LEN];	// the latest received c2h buffer
+	u4Byte					c2h_ack_len;
+	u4Byte					count;									// the total number of the sent h2c command
+	u4Byte					status[COL_STATUS_MAX];					// the c2h status for the sent h2c command
+} COL_SINGLE_H2C_RECORD, *PCOL_SINGLE_H2C_RECORD;
+
+typedef struct _COL_SINGLE_C2H_IND_RECORD{
+	u1Byte					ind_buf[COL_H2C_BUF_LEN];	// the latest received c2h indication buffer
+	u4Byte					ind_len;
+	u4Byte					count;									// the total number of the rcvd c2h indication
+	u4Byte					status[COL_STATUS_MAX];					// the c2h indication verified status 
+} COL_SINGLE_C2H_IND_RECORD, *PCOL_SINGLE_C2H_IND_RECORD;
+
+typedef struct _BTC_OFFLOAD{
+	// H2C command related
+	u1Byte					h2c_req_num;
+	u4Byte					cnt_h2c_sent;
+	COL_SINGLE_H2C_RECORD	h2c_record[COL_OP_WIFI_OPCODE_MAX];
+
+	// C2H Ack related
+	u4Byte					cnt_c2h_ack;
+	u4Byte					status[COL_STATUS_MAX];
+	struct completion		c2h_event[COL_MAX_H2C_REQ_NUM];	// for req_num = 1~COL_MAX_H2C_REQ_NUM
+	u1Byte					c2h_ack_buf[COL_MAX_H2C_REQ_NUM][COL_H2C_BUF_LEN];
+	u1Byte					c2h_ack_len[COL_MAX_H2C_REQ_NUM];
+
+	// C2H Indication related
+	u4Byte						cnt_c2h_ind;
+	COL_SINGLE_C2H_IND_RECORD	c2h_ind_record[COL_IND_MAX];
+	u4Byte						c2h_ind_status[COL_STATUS_MAX];
+	u1Byte						c2h_ind_buf[COL_H2C_BUF_LEN];
+	u1Byte						c2h_ind_len;
+} BTC_OFFLOAD, *PBTC_OFFLOAD;
+extern BTC_OFFLOAD				gl_coex_offload;
+//==================================================
+
+typedef u1Byte
+(*BFP_BTC_R1)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr
+	);
+typedef u2Byte
+(*BFP_BTC_R2)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr
+	);
+typedef u4Byte
+(*BFP_BTC_R4)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr
+	);
+typedef VOID
+(*BFP_BTC_W1)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr,
+	IN	u1Byte			Data
+	);
+typedef VOID
+(*BFP_BTC_W1_BIT_MASK)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			regAddr,
+	IN	u1Byte			bitMask,
+	IN	u1Byte			data1b
+	);
+typedef VOID
+(*BFP_BTC_W2)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr,
+	IN	u2Byte			Data
+	);
+typedef VOID
+(*BFP_BTC_W4)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr,
+	IN	u4Byte			Data
+	);
+typedef VOID
+(*BFP_BTC_LOCAL_REG_W1)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr,
+	IN	u1Byte			Data
+	);
+typedef VOID
+(*BFP_BTC_SET_BB_REG)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr,
+	IN	u4Byte			BitMask,
+	IN	u4Byte			Data
+	);
+typedef u4Byte 
+(*BFP_BTC_GET_BB_REG)(
+	IN 	PVOID			pBtcContext,
+	IN	u4Byte			RegAddr,
+	IN	u4Byte			BitMask
+	);
+typedef VOID
+(*BFP_BTC_SET_RF_REG)(	
+	IN 	PVOID			pBtcContext,
+	IN	u1Byte			eRFPath,
+	IN	u4Byte			RegAddr,
+	IN	u4Byte			BitMask,
+	IN	u4Byte			Data
+	);
+typedef u4Byte 
+(*BFP_BTC_GET_RF_REG)(
+	IN 	PVOID			pBtcContext,
+	IN	u1Byte			eRFPath,
+	IN	u4Byte			RegAddr,
+	IN	u4Byte			BitMask
+	);
+typedef VOID
+(*BFP_BTC_FILL_H2C)(
+	IN 	PVOID			pBtcContext,
+	IN	u1Byte 			elementId,
+	IN	u4Byte 			cmdLen,
+	IN	pu1Byte			pCmdBuffer
+	);
+
+typedef	BOOLEAN
+(*BFP_BTC_GET)(
+	IN	PVOID			pBtCoexist,
+	IN	u1Byte			getType,
+	OUT	PVOID			pOutBuf
+	);
+
+typedef	BOOLEAN
+(*BFP_BTC_SET)(
+	IN	PVOID			pBtCoexist,
+	IN	u1Byte			setType,
+	OUT	PVOID			pInBuf
+	);
+typedef u2Byte
+(*BFP_BTC_SET_BT_REG)(
+	IN 	PVOID			pBtcContext,
+	IN	u1Byte			regType,
+	IN	u4Byte			offset,
+	IN	u4Byte			value
+	);
+typedef BOOLEAN
+(*BFP_BTC_SET_BT_ANT_DETECTION)(
+	IN 	PVOID			pBtcContext,
+	IN	u1Byte			txTime,
+	IN	u1Byte			btChnl
+	);
+typedef u2Byte 
+(*BFP_BTC_GET_BT_REG)(
+	IN 	PVOID			pBtcContext,
+	IN	u1Byte			regType,
+	IN	u4Byte			offset,
+	IN	pu4Byte			data
+	);
+typedef VOID
+(*BFP_BTC_DISP_DBG_MSG)(
+	IN	PVOID			pBtCoexist,
+	IN	u1Byte			dispType
+	);
+
+typedef COL_H2C_STATUS
+(*BFP_BTC_COEX_H2C_PROCESS)(
+	IN	PVOID			pBtCoexist,
+	IN	u1Byte			opcode,
+	IN	u1Byte			opcode_ver,
+	IN	pu1Byte			ph2c_par,
+	IN	u1Byte			h2c_par_len
+	);
+
+typedef u4Byte 
+(*BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE)(
+	IN 	PVOID			pBtcContext
+	);
+
+typedef u4Byte 
+(*BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION)(
+	IN 	PVOID			pBtcContext
+	);
+
+typedef u4Byte 
+(*BFP_BTC_GET_PHYDM_VERSION)(
+	IN 	PVOID			pBtcContext
+	);
+
+typedef struct _BTC_BT_INFO{
+	BOOLEAN					bBtDisabled;
+	u1Byte					rssiAdjustForAgcTableOn;
+	u1Byte					rssiAdjustFor1AntCoexType;
+	BOOLEAN					bPreBtCtrlAggBufSize;
+	BOOLEAN					bBtCtrlAggBufSize;
+	BOOLEAN					bPreRejectAggPkt;
+	BOOLEAN					bRejectAggPkt;
+	BOOLEAN					bIncreaseScanDevNum;
+	BOOLEAN					bBtTxRxMask;
+	u1Byte					preAggBufSize;
+	u1Byte					aggBufSize;
+	BOOLEAN					bBtBusy;
+	BOOLEAN					bLimitedDig;
+	u2Byte					btHciVer;
+	u2Byte					btRealFwVer;
+	u1Byte					btFwVer;
+	u4Byte					getBtFwVerCnt;
+	BOOLEAN					bMiracastPlusBt;
+
+	BOOLEAN					bBtDisableLowPwr;
+
+	BOOLEAN					bBtCtrlLps;
+	BOOLEAN					bBtLpsOn;
+	BOOLEAN					bForceToRoam;	// for 1Ant solution
+	u1Byte					lpsVal;
+	u1Byte					rpwmVal;
+	u4Byte					raMask;
+} BTC_BT_INFO, *PBTC_BT_INFO;
+
+struct btc_stack_info {
+	boolean					profile_notified;
+	u16					hci_version;	/* stack hci version */
+	u8					num_of_link;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					acl_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	u8					num_of_hid;
+	boolean					pan_exist;
+	boolean					unknown_acl_exist;
+	s8					min_bt_rssi;
+};
+
+struct btc_bt_link_info {
+	boolean					bt_link_exist;
+	boolean					bt_hi_pri_link_exist;
+	boolean					sco_exist;
+	boolean					sco_only;
+	boolean					a2dp_exist;
+	boolean					a2dp_only;
+	boolean					hid_exist;
+	boolean					hid_only;
+	boolean					pan_exist;
+	boolean					pan_only;
+	boolean					slave_role;
+	boolean					acl_busy;
+};
+
+typedef struct _BTC_STATISTICS{
+	u4Byte					cntBind;
+	u4Byte					cntPowerOn;
+	u4Byte					cntPreLoadFirmware;
+	u4Byte					cntInitHwConfig;
+	u4Byte					cntInitCoexDm;
+	u4Byte					cntIpsNotify;
+	u4Byte					cntLpsNotify;
+	u4Byte					cntScanNotify;
+	u4Byte					cntConnectNotify;
+	u4Byte					cntMediaStatusNotify;
+	u4Byte					cntSpecificPacketNotify;
+	u4Byte					cntBtInfoNotify;
+	u4Byte					cntRfStatusNotify;
+	u4Byte					cntPeriodical;
+	u4Byte					cntCoexDmSwitch;
+	u4Byte					cntStackOperationNotify;
+	u4Byte					cntDbgCtrl;
+} BTC_STATISTICS, *PBTC_STATISTICS;
+
+struct btc_coexist{
+	BOOLEAN				bBinded;		// make sure only one adapter can bind the data context
+	PVOID				Adapter;		// default adapter
+	struct  btc_board_info		board_info;
+	BTC_BT_INFO			btInfo;		// some bt info referenced by non-bt module
+	struct  btc_stack_info		stack_info;
+	struct  btc_bt_link_info		bt_link_info;
+	BTC_CHIP_INTERFACE		chip_interface;
+
+	BOOLEAN					initilized;
+	BOOLEAN					stop_coex_dm;
+	BOOLEAN					manual_control;
+	BOOLEAN					bdontenterLPS;
+	pu1Byte					cli_buf;
+	BTC_STATISTICS		statistics;
+	u1Byte				pwrModeVal[10];
+
+	// function pointers
+	// io related
+	BFP_BTC_R1			btc_read_1byte;
+	BFP_BTC_W1			btc_write_1byte;
+	BFP_BTC_W1_BIT_MASK	btc_write_1byte_bitmask;
+	BFP_BTC_R2			btc_read_2byte;
+	BFP_BTC_W2			btc_write_2byte;
+	BFP_BTC_R4			btc_read_4byte;
+	BFP_BTC_W4			btc_write_4byte;
+	BFP_BTC_LOCAL_REG_W1	btc_write_local_reg_1byte;
+	// read/write bb related
+	BFP_BTC_SET_BB_REG	btc_set_bb_reg;
+	BFP_BTC_GET_BB_REG	btc_get_bb_reg;
+
+	// read/write rf related
+	BFP_BTC_SET_RF_REG	btc_set_rf_reg;
+	BFP_BTC_GET_RF_REG	btc_get_rf_reg;
+
+	// fill h2c related
+	BFP_BTC_FILL_H2C		btc_fill_h2c;
+	// other
+	BFP_BTC_DISP_DBG_MSG	btc_disp_dbg_msg;
+	// normal get/set related
+	BFP_BTC_GET			btc_get;
+	BFP_BTC_SET			btc_set;
+
+	BFP_BTC_GET_BT_REG	btc_get_bt_reg;
+	BFP_BTC_SET_BT_REG	btc_set_bt_reg;
+
+	BFP_BTC_SET_BT_ANT_DETECTION	btc_set_bt_ant_detection;
+
+	BFP_BTC_COEX_H2C_PROCESS	btc_coex_h2c_process;
+	BFP_BTC_GET_BT_COEX_SUPPORTED_FEATURE btc_get_bt_coex_supported_feature;
+	BFP_BTC_GET_BT_COEX_SUPPORTED_VERSION btc_get_bt_coex_supported_version;
+	BFP_BTC_GET_PHYDM_VERSION		btc_get_bt_phydm_version;
+};
+typedef struct btc_coexist *PBTC_COEXIST;
+
+extern struct btc_coexist	GLBtCoexist;
+
+BOOLEAN
+EXhalbtcoutsrc_InitlizeVariables(
+	IN	PVOID		Adapter	
+	);
+VOID
+EXhalbtcoutsrc_PowerOnSetting(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_PreLoadFirmware(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_InitHwConfig(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	BOOLEAN				bWifiOnly
+	);
+VOID
+EXhalbtcoutsrc_InitCoexDm(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_IpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtcoutsrc_LpsNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtcoutsrc_ScanNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtcoutsrc_ConnectNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			action
+	);
+VOID
+EXhalbtcoutsrc_MediaStatusNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	RT_MEDIA_STATUS	mediaStatus
+	);
+VOID
+EXhalbtcoutsrc_SpecificPacketNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			pktType
+	);
+VOID
+EXhalbtcoutsrc_BtInfoNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	pu1Byte			tmpBuf,
+	IN	u1Byte			length
+	);
+VOID
+EXhalbtcoutsrc_RfStatusNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte 				type
+	);
+VOID
+EXhalbtcoutsrc_StackOperationNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			type
+	);
+VOID
+EXhalbtcoutsrc_HaltNotify(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_PnpNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	u1Byte			pnpState
+	);
+VOID
+EXhalbtcoutsrc_ScoreBoardStatusNotify(
+	IN	PBTC_COEXIST		pBtCoexist,
+	IN	pu1Byte			tmpBuf,
+	IN	u1Byte			length
+	);
+VOID
+EXhalbtcoutsrc_CoexDmSwitch(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_Periodical(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_DbgControl(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u1Byte				opCode,
+	IN	u1Byte				opLen,
+	IN	pu1Byte				pData
+	);
+VOID
+EXhalbtcoutsrc_AntennaDetection(
+	IN	PBTC_COEXIST			pBtCoexist,
+	IN	u4Byte					centFreq,
+	IN	u4Byte					offset,
+	IN	u4Byte					span,
+	IN	u4Byte					seconds
+	);
+VOID
+EXhalbtcoutsrc_StackUpdateProfileInfo(
+	VOID
+	);
+VOID
+EXhalbtcoutsrc_SetHciVersion(
+	IN	u2Byte	hciVersion
+	);
+VOID
+EXhalbtcoutsrc_SetBtPatchVersion(
+	IN	u2Byte	btHciVersion,
+	IN	u2Byte	btPatchVersion
+	);
+VOID
+EXhalbtcoutsrc_UpdateMinBtRssi(
+	IN	s1Byte	btRssi
+	);
+#if 0
+VOID
+EXhalbtcoutsrc_SetBtExist(
+	IN	BOOLEAN		bBtExist
+	);
+#endif
+VOID
+EXhalbtcoutsrc_SetChipType(
+	IN	u1Byte		chipType
+	);
+VOID
+EXhalbtcoutsrc_SetAntNum(
+	IN	u1Byte		type,
+	IN	u1Byte		antNum
+	);
+VOID
+EXhalbtcoutsrc_SetSingleAntPath(
+	IN	u1Byte		singleAntPath
+	);
+VOID
+EXhalbtcoutsrc_DisplayBtCoexInfo(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+VOID
+EXhalbtcoutsrc_DisplayAntDetection(
+	IN	PBTC_COEXIST		pBtCoexist
+	);
+
+#define	MASKBYTE0		0xff
+#define	MASKBYTE1		0xff00
+#define	MASKBYTE2		0xff0000
+#define	MASKBYTE3		0xff000000
+#define	MASKHWORD	0xffff0000
+#define	MASKLWORD		0x0000ffff
+#define	MASKDWORD	0xffffffff
+#define	MASK12BITS		0xfff
+#define	MASKH4BITS		0xf0000000
+#define	MASKOFDM_D	0xffc00000
+#define	MASKCCK		0x3f3f3f3f
+
+#endif

hal/btc/Mp_Precomp.h

@@ -0,0 +1,102 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2013 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __MP_PRECOMP_H__
+#define __MP_PRECOMP_H__
+
+#include <drv_types.h>
+#include <hal_data.h>
+
+#define BT_TMP_BUF_SIZE	100
+
+#ifdef PLATFORM_LINUX
+#define rsprintf snprintf
+#elif defined(PLATFORM_WINDOWS)
+#define rsprintf sprintf_s
+#endif
+
+#define DCMD_Printf			DBG_BT_INFO
+
+#define delay_ms(ms)		rtw_mdelay_os(ms)
+
+#ifdef bEnable
+#undef bEnable
+#endif
+
+#define WPP_SOFTWARE_TRACE 0
+
+typedef enum _BTC_MSG_COMP_TYPE{
+	COMP_COEX		= 0,
+	COMP_MAX
+}BTC_MSG_COMP_TYPE;
+extern u4Byte GLBtcDbgType[];
+
+#define DBG_OFF			0
+#define DBG_SEC			1
+#define DBG_SERIOUS		2
+#define DBG_WARNING		3
+#define DBG_LOUD		4
+#define DBG_TRACE		5
+
+#if DBG
+#ifdef RT_TRACE
+#undef RT_TRACE
+#define RT_TRACE(dbgtype, dbgflag, printstr)\
+do {\
+	if (GLBtcDbgType[dbgtype] & BIT(dbgflag))\
+	{\
+		DbgPrint printstr;\
+	}\
+} while (0)
+#endif
+#else
+#define RT_TRACE(dbgtype, dbgflag, printstr)
+#endif
+
+#ifdef CONFIG_BT_COEXIST
+#define BT_SUPPORT		1
+#define COEX_SUPPORT	1
+#define HS_SUPPORT		1
+#else
+#define BT_SUPPORT		0
+#define COEX_SUPPORT	0
+#define HS_SUPPORT		0
+#endif
+
+#include "HalBtcOutSrc.h"
+#include "HalBtc8188c2Ant.h"
+#include "HalBtc8192d2Ant.h"
+#include "HalBtc8192e1Ant.h"
+#include "HalBtc8192e2Ant.h"
+#include "HalBtc8723a1Ant.h"
+#include "HalBtc8723a2Ant.h"
+#include "HalBtc8723b1Ant.h"
+#include "HalBtc8723b2Ant.h"
+#include "HalBtc8812a1Ant.h"
+#include "HalBtc8812a2Ant.h"
+#include "HalBtc8821a1Ant.h"
+#include "HalBtc8821a2Ant.h"
+#include "HalBtc8821aCsr2Ant.h"
+#include "HalBtc8703b1Ant.h"
+#include "halbtc8723d1ant.h"
+#include "halbtc8723d2ant.h"
+#include "HalBtc8822b1Ant.h"
+
+
+#endif // __MP_PRECOMP_H__

hal/btc/halbtc8723d1ant.h

@@ -0,0 +1,348 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8723D_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8723D 1ANT BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8723D_1ANT				1
+
+#define	BT_INFO_8723D_1ANT_B_FTP						BIT(7)
+#define	BT_INFO_8723D_1ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8723D_1ANT_B_HID						BIT(5)
+#define	BT_INFO_8723D_1ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8723D_1ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8723D_1ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8723D_1ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8723D_1ANT_B_CONNECTION				BIT(0)
+
+#define	BT_INFO_8723D_1ANT_A2DP_BASIC_RATE(_BT_INFO_EXT_)	\
+	(((_BT_INFO_EXT_&BIT(0))) ? true : false)
+
+#define	BTC_RSSI_COEX_THRESH_TOL_8723D_1ANT		2
+
+#define  BT_8723D_1ANT_WIFI_NOISY_THRESH							30   /* max: 255 */
+
+/* for Antenna detection */
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_BACKGROUND					50
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			55
+#define	BT_8723D_1ANT_ANTDET_PSDTHRES_1ANT							35
+#define	BT_8723D_1ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
+#define	BT_8723D_1ANT_ANTDET_SWEEPPOINT_DELAY							40000
+#define	BT_8723D_1ANT_ANTDET_ENABLE									0
+#define	BT_8723D_1ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE				0
+#define	BT_8723D_1ANT_ANTDET_BTTXTIME									100
+#define	BT_8723D_1ANT_ANTDET_BTTXCHANNEL								39
+
+#define	BT_8723D_1ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT		30000
+
+enum bt_8723d_1ant_signal_state {
+	BT_8723D_1ANT_SIG_STA_SET_TO_LOW		= 0x0,
+	BT_8723D_1ANT_SIG_STA_SET_BY_HW		= 0x0,
+	BT_8723D_1ANT_SIG_STA_SET_TO_HIGH		= 0x1,
+	BT_8723D_1ANT_SIG_STA_MAX
+};
+
+enum bt_8723d_1ant_path_ctrl_owner {
+	BT_8723D_1ANT_PCO_BTSIDE		= 0x0,
+	BT_8723D_1ANT_PCO_WLSIDE	= 0x1,
+	BT_8723D_1ANT_PCO_MAX
+};
+
+enum bt_8723d_1ant_gnt_ctrl_type {
+	BT_8723D_1ANT_GNT_TYPE_CTRL_BY_PTA		= 0x0,
+	BT_8723D_1ANT_GNT_TYPE_CTRL_BY_SW		= 0x1,
+	BT_8723D_1ANT_GNT_TYPE_MAX
+};
+
+enum bt_8723d_1ant_gnt_ctrl_block {
+	BT_8723D_1ANT_GNT_BLOCK_RFC_BB		= 0x0,
+	BT_8723D_1ANT_GNT_BLOCK_RFC			= 0x1,
+	BT_8723D_1ANT_GNT_BLOCK_BB			= 0x2,
+	BT_8723D_1ANT_GNT_BLOCK_MAX
+};
+
+enum bt_8723d_1ant_lte_coex_table_type {
+	BT_8723D_1ANT_CTT_WL_VS_LTE			= 0x0,
+	BT_8723D_1ANT_CTT_BT_VS_LTE			= 0x1,
+	BT_8723D_1ANT_CTT_MAX
+};
+
+enum bt_8723d_1ant_lte_break_table_type {
+	BT_8723D_1ANT_LBTT_WL_BREAK_LTE			= 0x0,
+	BT_8723D_1ANT_LBTT_BT_BREAK_LTE				= 0x1,
+	BT_8723D_1ANT_LBTT_LTE_BREAK_WL			= 0x2,
+	BT_8723D_1ANT_LBTT_LTE_BREAK_BT				= 0x3,
+	BT_8723D_1ANT_LBTT_MAX
+};
+
+enum bt_info_src_8723d_1ant {
+	BT_INFO_SRC_8723D_1ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8723D_1ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723D_1ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723D_1ANT_MAX
+};
+
+enum bt_8723d_1ant_bt_status {
+	BT_8723D_1ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8723D_1ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8723D_1ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8723D_1ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8723D_1ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8723D_1ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8723D_1ANT_BT_STATUS_MAX
+};
+
+enum bt_8723d_1ant_wifi_status {
+	BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_IDLE				= 0x0,
+	BT_8723D_1ANT_WIFI_STATUS_NON_CONNECTED_ASSO_AUTH_SCAN		= 0x1,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SCAN					= 0x2,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_SPECIFIC_PKT				= 0x3,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_IDLE					= 0x4,
+	BT_8723D_1ANT_WIFI_STATUS_CONNECTED_BUSY					= 0x5,
+	BT_8723D_1ANT_WIFI_STATUS_MAX
+};
+
+enum bt_8723d_1ant_coex_algo {
+	BT_8723D_1ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8723D_1ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8723D_1ANT_COEX_ALGO_HID				= 0x2,
+	BT_8723D_1ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723D_1ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8723D_1ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8723D_1ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8723D_1ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8723D_1ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8723D_1ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8723D_1ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8723D_1ANT_COEX_ALGO_MAX				= 0xb,
+};
+
+struct coex_dm_8723d_1ant {
+	/* hw setting */
+	u8		pre_ant_pos_type;
+	u8		cur_ant_pos_type;
+	/* fw mechanism */
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	/* sw mechanism */
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	u32		backup_arfr_cnt1;	/* Auto Rate Fallback Retry cnt */
+	u32		backup_arfr_cnt2;	/* Auto Rate Fallback Retry cnt */
+	u16		backup_retry_limit;
+	u8		backup_ampdu_max_time;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	u32		pre_ra_mask;
+	u32		cur_ra_mask;
+	u8		pre_arfr_type;
+	u8		cur_arfr_type;
+	u8		pre_retry_limit_type;
+	u8		cur_retry_limit_type;
+	u8		pre_ampdu_time_type;
+	u8		cur_ampdu_time_type;
+	u32		arp_cnt;
+
+	u8		error_condition;
+};
+
+struct coex_sta_8723d_1ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+	boolean					bt_hi_pri_link_exist;
+	u8					num_of_profile;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					specific_pkt_period_cnt;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	s8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8723D_1ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723D_1ANT_MAX];
+	boolean					bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_page;				/* Add for win8.1 page out issue */
+	boolean					wifi_is_high_pri_task;		/* Add for win8.1 page out issue */
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	boolean					cck_lock;
+	boolean					pre_ccklock;
+	boolean					cck_ever_lock;
+	u8					coex_table_type;
+
+	boolean					force_lps_on;
+	u32					wrong_profile_notification;
+
+	boolean					concurrent_rx_mode_on;
+
+	u16					score_board;
+
+	u8					a2dp_bit_pool;
+	u8					cut_version;
+	boolean				acl_busy;
+	boolean				wl_rf_off_on_event;
+	boolean				bt_create_connection;
+	boolean				gnt_control_by_PTA;
+};
+
+#define  BT_8723D_1ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
+#define  BT_8723D_1ANT_ANTDET_PSD_AVGNUM			1	/* MAX:3 */
+#define	BT_8723D_1ANT_ANTDET_BUF_LEN				16
+
+struct psdscan_sta_8723d_1ant {
+
+	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32			ant_det_bt_tx_time;
+	u32			ant_det_pre_psdscan_peak_val;
+	boolean			ant_det_is_ant_det_available;
+	u32			ant_det_psd_scan_peak_val;
+	boolean			ant_det_is_btreply_available;
+	u32			ant_det_psd_scan_peak_freq;
+
+	u8			ant_det_result;
+	u8			ant_det_peak_val[BT_8723D_1ANT_ANTDET_BUF_LEN];
+	u8			ant_det_peak_freq[BT_8723D_1ANT_ANTDET_BUF_LEN];
+	u32			ant_det_try_count;
+	u32			ant_det_fail_count;
+	u32			ant_det_inteval_count;
+	u32			ant_det_thres_offset;
+
+	u32			real_cent_freq;
+	s32			real_offset;
+	u32			real_span;
+
+	u32			psd_band_width;  /* unit: Hz */
+	u32			psd_point;		/* 128/256/512/1024 */
+	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_start_point;
+	u32			psd_stop_point;
+	u32			psd_max_value_point;
+	u32			psd_max_value;
+	u32			psd_start_base;
+	u32			psd_avg_num;	/* 1/8/16/32 */
+	u32			psd_gen_count;
+	boolean			is_psd_running;
+	boolean			is_psd_show_max_only;
+};
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8723d1ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8723d1ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723d1ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723d1ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8723d1ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8723d1ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723d1ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723d1ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8723d1ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723d1ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8723d1ant_coex_dm_reset(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d1ant_antenna_detection(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8723d1ant_antenna_isolation(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+
+void ex_halbtc8723d1ant_psd_scan(IN struct btc_coexist *btcoexist,
+		 IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8723d1ant_display_ant_detection(IN struct btc_coexist *btcoexist);
+
+#else
+#define	ex_halbtc8723d1ant_power_on_setting(btcoexist)
+#define	ex_halbtc8723d1ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8723d1ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8723d1ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8723d1ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8723d1ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8723d1ant_halt_notify(btcoexist)
+#define	ex_halbtc8723d1ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8723d1ant_coex_dm_reset(btcoexist)
+#define	ex_halbtc8723d1ant_periodical(btcoexist)
+#define	ex_halbtc8723d1ant_display_coex_info(btcoexist)
+#define	ex_halbtc8723d1ant_antenna_detection(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8723d1ant_antenna_isolation(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8723d1ant_psd_scan(btcoexist, cent_freq, offset, span, seconds)
+#define	ex_halbtc8723d1ant_display_ant_detection(btcoexist)
+#endif
+
+#endif

hal/btc/halbtc8723d2ant.h

@@ -0,0 +1,348 @@
+
+#if (BT_SUPPORT == 1 && COEX_SUPPORT == 1)
+
+#if (RTL8723D_SUPPORT == 1)
+
+/* *******************************************
+ * The following is for 8723D 2Ant BT Co-exist definition
+ * ******************************************* */
+#define	BT_AUTO_REPORT_ONLY_8723D_2ANT				1
+
+
+#define	BT_INFO_8723D_2ANT_B_FTP						BIT(7)
+#define	BT_INFO_8723D_2ANT_B_A2DP					BIT(6)
+#define	BT_INFO_8723D_2ANT_B_HID						BIT(5)
+#define	BT_INFO_8723D_2ANT_B_SCO_BUSY				BIT(4)
+#define	BT_INFO_8723D_2ANT_B_ACL_BUSY				BIT(3)
+#define	BT_INFO_8723D_2ANT_B_INQ_PAGE				BIT(2)
+#define	BT_INFO_8723D_2ANT_B_SCO_ESCO				BIT(1)
+#define	BT_INFO_8723D_2ANT_B_CONNECTION				BIT(0)
+
+#define		BTC_RSSI_COEX_THRESH_TOL_8723D_2ANT		2
+
+
+#define	BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES1				80  /* unit: % WiFi RSSI Threshold for   2-Ant free-run/2-Ant TDMA translation, default = 42 */
+#define	BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES1				80 /*  unit: % BT RSSI Threshold for      2-Ant free-run/2-Ant TDMA translation, default = 46 */
+#define	BT_8723D_2ANT_WIFI_RSSI_COEXSWITCH_THRES2				80  /* unit: % WiFi RSSI Threshold for   1-Ant TDMA/1-Ant PS-TDMA translation, default = 42 */
+#define	BT_8723D_2ANT_BT_RSSI_COEXSWITCH_THRES2				80 /*  unit: % BT RSSI Threshold for      1-Ant TDMA/1-Ant PS-TDMA translation, default = 46 */
+#define	BT_8723D_2ANT_DEFAULT_ISOLATION						15	 /*  unit: dB */
+#define   BT_8723D_2ANT_WIFI_MAX_TX_POWER						15	 /*  unit: dBm */
+#define   BT_8723D_2ANT_BT_MAX_TX_POWER							3	 /*  unit: dBm */
+#define   BT_8723D_2ANT_WIFI_SIR_THRES1							-15  /*  unit: dB */
+#define   BT_8723D_2ANT_WIFI_SIR_THRES2							-30  /*  unit: dB */
+#define   BT_8723D_2ANT_BT_SIR_THRES1							-15		 /*  unit: dB */
+#define   BT_8723D_2ANT_BT_SIR_THRES2							-30		 /*  unit: dB */
+
+
+/* for Antenna detection */
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_BACKGROUND						50
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_BADISOLATION				70
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_2ANT_GOODISOLATION			52
+#define	BT_8723D_2ANT_ANTDET_PSDTHRES_1ANT							40
+#define	BT_8723D_2ANT_ANTDET_RETRY_INTERVAL							10	/* retry timer if ant det is fail, unit: second */
+#define	BT_8723D_2ANT_ANTDET_SWEEPPOINT_DELAY							40000
+#define	BT_8723D_2ANT_ANTDET_ENABLE										0
+#define	BT_8723D_2ANT_ANTDET_COEXMECHANISMSWITCH_ENABLE			0
+#define	BT_8723D_2ANT_ANTDET_BTTXTIME									100
+#define	BT_8723D_2ANT_ANTDET_BTTXCHANNEL								39
+
+#define	BT_8723D_2ANT_LTECOEX_INDIRECTREG_ACCESS_TIMEOUT		30000
+
+enum bt_8723d_2ant_signal_state {
+	BT_8723D_2ANT_SIG_STA_SET_TO_LOW		= 0x0,
+	BT_8723D_2ANT_SIG_STA_SET_BY_HW		= 0x0,
+	BT_8723D_2ANT_SIG_STA_SET_TO_HIGH		= 0x1,
+	BT_8723D_2ANT_SIG_STA_MAX
+};
+
+enum bt_8723d_2ant_path_ctrl_owner {
+	BT_8723D_2ANT_PCO_BTSIDE		= 0x0,
+	BT_8723D_2ANT_PCO_WLSIDE	= 0x1,
+	BT_8723D_2ANT_PCO_MAX
+};
+
+enum bt_8723d_2ant_gnt_ctrl_type {
+	BT_8723D_2ANT_GNT_TYPE_CTRL_BY_PTA		= 0x0,
+	BT_8723D_2ANT_GNT_TYPE_CTRL_BY_SW		= 0x1,
+	BT_8723D_2ANT_GNT_TYPE_MAX
+};
+
+enum bt_8723d_2ant_gnt_ctrl_block {
+	BT_8723D_2ANT_GNT_BLOCK_RFC_BB		= 0x0,
+	BT_8723D_2ANT_GNT_BLOCK_RFC			= 0x1,
+	BT_8723D_2ANT_GNT_BLOCK_BB			= 0x2,
+	BT_8723D_2ANT_GNT_BLOCK_MAX
+};
+
+enum bt_8723d_2ant_lte_coex_table_type {
+	BT_8723D_2ANT_CTT_WL_VS_LTE			= 0x0,
+	BT_8723D_2ANT_CTT_BT_VS_LTE			= 0x1,
+	BT_8723D_2ANT_CTT_MAX
+};
+
+enum bt_8723d_2ant_lte_break_table_type {
+	BT_8723D_2ANT_LBTT_WL_BREAK_LTE			= 0x0,
+	BT_8723D_2ANT_LBTT_BT_BREAK_LTE				= 0x1,
+	BT_8723D_2ANT_LBTT_LTE_BREAK_WL			= 0x2,
+	BT_8723D_2ANT_LBTT_LTE_BREAK_BT				= 0x3,
+	BT_8723D_2ANT_LBTT_MAX
+};
+
+enum bt_info_src_8723d_2ant {
+	BT_INFO_SRC_8723D_2ANT_WIFI_FW			= 0x0,
+	BT_INFO_SRC_8723D_2ANT_BT_RSP				= 0x1,
+	BT_INFO_SRC_8723D_2ANT_BT_ACTIVE_SEND		= 0x2,
+	BT_INFO_SRC_8723D_2ANT_MAX
+};
+
+enum bt_8723d_2ant_bt_status {
+	BT_8723D_2ANT_BT_STATUS_NON_CONNECTED_IDLE	= 0x0,
+	BT_8723D_2ANT_BT_STATUS_CONNECTED_IDLE		= 0x1,
+	BT_8723D_2ANT_BT_STATUS_INQ_PAGE				= 0x2,
+	BT_8723D_2ANT_BT_STATUS_ACL_BUSY				= 0x3,
+	BT_8723D_2ANT_BT_STATUS_SCO_BUSY				= 0x4,
+	BT_8723D_2ANT_BT_STATUS_ACL_SCO_BUSY			= 0x5,
+	BT_8723D_2ANT_BT_STATUS_MAX
+};
+
+enum bt_8723d_2ant_coex_algo {
+	BT_8723D_2ANT_COEX_ALGO_UNDEFINED			= 0x0,
+	BT_8723D_2ANT_COEX_ALGO_SCO				= 0x1,
+	BT_8723D_2ANT_COEX_ALGO_HID				= 0x2,
+	BT_8723D_2ANT_COEX_ALGO_A2DP				= 0x3,
+	BT_8723D_2ANT_COEX_ALGO_A2DP_PANHS		= 0x4,
+	BT_8723D_2ANT_COEX_ALGO_PANEDR			= 0x5,
+	BT_8723D_2ANT_COEX_ALGO_PANHS			= 0x6,
+	BT_8723D_2ANT_COEX_ALGO_PANEDR_A2DP		= 0x7,
+	BT_8723D_2ANT_COEX_ALGO_PANEDR_HID		= 0x8,
+	BT_8723D_2ANT_COEX_ALGO_HID_A2DP_PANEDR	= 0x9,
+	BT_8723D_2ANT_COEX_ALGO_HID_A2DP			= 0xa,
+	BT_8723D_2ANT_COEX_ALGO_NOPROFILEBUSY		= 0xb,
+	BT_8723D_2ANT_COEX_ALGO_MAX
+};
+
+struct coex_dm_8723d_2ant {
+	/* fw mechanism */
+	u8		pre_bt_dec_pwr_lvl;
+	u8		cur_bt_dec_pwr_lvl;
+	u8		pre_fw_dac_swing_lvl;
+	u8		cur_fw_dac_swing_lvl;
+	boolean		cur_ignore_wlan_act;
+	boolean		pre_ignore_wlan_act;
+	u8		pre_ps_tdma;
+	u8		cur_ps_tdma;
+	u8		ps_tdma_para[5];
+	u8		ps_tdma_du_adj_type;
+	boolean		reset_tdma_adjust;
+	boolean		auto_tdma_adjust;
+	boolean		pre_ps_tdma_on;
+	boolean		cur_ps_tdma_on;
+	boolean		pre_bt_auto_report;
+	boolean		cur_bt_auto_report;
+
+	/* sw mechanism */
+	boolean		pre_rf_rx_lpf_shrink;
+	boolean		cur_rf_rx_lpf_shrink;
+	u32		bt_rf_0x1e_backup;
+	boolean	pre_low_penalty_ra;
+	boolean		cur_low_penalty_ra;
+	boolean		pre_dac_swing_on;
+	u32		pre_dac_swing_lvl;
+	boolean		cur_dac_swing_on;
+	u32		cur_dac_swing_lvl;
+	boolean		pre_adc_back_off;
+	boolean		cur_adc_back_off;
+	boolean	pre_agc_table_en;
+	boolean		cur_agc_table_en;
+	u32		pre_val0x6c0;
+	u32		cur_val0x6c0;
+	u32		pre_val0x6c4;
+	u32		cur_val0x6c4;
+	u32		pre_val0x6c8;
+	u32		cur_val0x6c8;
+	u8		pre_val0x6cc;
+	u8		cur_val0x6cc;
+	boolean		limited_dig;
+
+	/* algorithm related */
+	u8		pre_algorithm;
+	u8		cur_algorithm;
+	u8		bt_status;
+	u8		wifi_chnl_info[3];
+
+	boolean		need_recover0x948;
+	u32		backup0x948;
+
+	u8		pre_lps;
+	u8		cur_lps;
+	u8		pre_rpwm;
+	u8		cur_rpwm;
+
+	boolean		is_switch_to_1dot5_ant;
+	u8		switch_thres_offset;
+	u32					arp_cnt;
+};
+
+struct coex_sta_8723d_2ant {
+	boolean					bt_disabled;
+	boolean					bt_link_exist;
+	boolean					sco_exist;
+	boolean					a2dp_exist;
+	boolean					hid_exist;
+	boolean					pan_exist;
+
+	boolean					under_lps;
+	boolean					under_ips;
+	u32					high_priority_tx;
+	u32					high_priority_rx;
+	u32					low_priority_tx;
+	u32					low_priority_rx;
+	u8					bt_rssi;
+	boolean					bt_tx_rx_mask;
+	u8					pre_bt_rssi_state;
+	u8					pre_wifi_rssi_state[4];
+	boolean					c2h_bt_info_req_sent;
+	u8					bt_info_c2h[BT_INFO_SRC_8723D_2ANT_MAX][10];
+	u32					bt_info_c2h_cnt[BT_INFO_SRC_8723D_2ANT_MAX];
+	boolean				bt_whck_test;
+	boolean					c2h_bt_inquiry_page;
+	boolean					c2h_bt_remote_name_req;
+	u8					bt_retry_cnt;
+	u8					bt_info_ext;
+	u32					pop_event_cnt;
+	u8					scan_ap_num;
+
+	u32					crc_ok_cck;
+	u32					crc_ok_11g;
+	u32					crc_ok_11n;
+	u32					crc_ok_11n_agg;
+
+	u32					crc_err_cck;
+	u32					crc_err_11g;
+	u32					crc_err_11n;
+	u32					crc_err_11n_agg;
+
+	u8					coex_table_type;
+	boolean					force_lps_on;
+
+	u8					dis_ver_info_cnt;
+
+	u8					a2dp_bit_pool;
+	u8					cut_version;
+
+	boolean					concurrent_rx_mode_on;
+
+	u16					score_board;
+	u8					isolation_btween_wb;   /* 0~ 50 */
+	u8					wifi_coex_thres;
+	u8					bt_coex_thres;
+	u8					wifi_coex_thres2;
+	u8					bt_coex_thres2;
+
+	u8					num_of_profile;
+	boolean				acl_busy;
+	boolean				wl_rf_off_on_event;
+	boolean				bt_create_connection;
+	boolean				gnt_control_by_PTA;
+	boolean				wifi_is_high_pri_task;
+	u32					specific_pkt_period_cnt;
+};
+
+#define BT_8723D_2ANT_ANTDET_PSD_POINTS			256	/* MAX:1024 */
+#define BT_8723D_2ANT_ANTDET_PSD_AVGNUM		1	/* MAX:3 */
+#define BT_8723D_2ANT_ANTDET_BUF_LEN			16
+
+struct psdscan_sta_8723d_2ant {
+
+	u32			ant_det_bt_le_channel;  /* BT LE Channel ex:2412 */
+	u32			ant_det_bt_tx_time;
+	u32			ant_det_pre_psdscan_peak_val;
+	boolean			ant_det_is_ant_det_available;
+	u32			ant_det_psd_scan_peak_val;
+	boolean			ant_det_is_btreply_available;
+	u32			ant_det_psd_scan_peak_freq;
+
+	u8			ant_det_result;
+	u8			ant_det_peak_val[BT_8723D_2ANT_ANTDET_BUF_LEN];
+	u8			ant_det_peak_freq[BT_8723D_2ANT_ANTDET_BUF_LEN];
+	u32			ant_det_try_count;
+	u32			ant_det_fail_count;
+	u32			ant_det_inteval_count;
+	u32			ant_det_thres_offset;
+
+	u32			real_cent_freq;
+	s32			real_offset;
+	u32			real_span;
+
+	u32			psd_band_width;  /* unit: Hz */
+	u32			psd_point;		/* 128/256/512/1024 */
+	u32			psd_report[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_report_max_hold[1024];  /* unit:dB (20logx), 0~255 */
+	u32			psd_start_point;
+	u32			psd_stop_point;
+	u32			psd_max_value_point;
+	u32			psd_max_value;
+	u32			psd_start_base;
+	u32			psd_avg_num;	/* 1/8/16/32 */
+	u32			psd_gen_count;
+	boolean			is_psd_running;
+	boolean			is_psd_show_max_only;
+};
+
+
+/* *******************************************
+ * The following is interface which will notify coex module.
+ * ******************************************* */
+void ex_halbtc8723d2ant_power_on_setting(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d2ant_pre_load_firmware(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d2ant_init_hw_config(IN struct btc_coexist *btcoexist,
+				       IN boolean wifi_only);
+void ex_halbtc8723d2ant_init_coex_dm(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d2ant_ips_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723d2ant_lps_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 type);
+void ex_halbtc8723d2ant_scan_notify(IN struct btc_coexist *btcoexist,
+				    IN u8 type);
+void ex_halbtc8723d2ant_connect_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 type);
+void ex_halbtc8723d2ant_media_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723d2ant_specific_packet_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723d2ant_bt_info_notify(IN struct btc_coexist *btcoexist,
+				       IN u8 *tmp_buf, IN u8 length);
+void ex_halbtc8723d2ant_rf_status_notify(IN struct btc_coexist *btcoexist,
+		IN u8 type);
+void ex_halbtc8723d2ant_halt_notify(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d2ant_pnp_notify(IN struct btc_coexist *btcoexist,
+				   IN u8 pnp_state);
+void ex_halbtc8723d2ant_periodical(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d2ant_display_coex_info(IN struct btc_coexist *btcoexist);
+void ex_halbtc8723d2ant_antenna_detection(IN struct btc_coexist *btcoexist,
+		IN u32 cent_freq, IN u32 offset, IN u32 span, IN u32 seconds);
+void ex_halbtc8723d2ant_display_ant_detection(IN struct btc_coexist *btcoexist);
+
+
+#else
+#define	ex_halbtc8723d2ant_power_on_setting(btcoexist)
+#define	ex_halbtc8723d2ant_pre_load_firmware(btcoexist)
+#define	ex_halbtc8723d2ant_init_hw_config(btcoexist, wifi_only)
+#define	ex_halbtc8723d2ant_init_coex_dm(btcoexist)
+#define	ex_halbtc8723d2ant_ips_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_lps_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_scan_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_connect_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_media_status_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_specific_packet_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_bt_info_notify(btcoexist, tmp_buf, length)
+#define	ex_halbtc8723d2ant_rf_status_notify(btcoexist, type)
+#define	ex_halbtc8723d2ant_halt_notify(btcoexist)
+#define	ex_halbtc8723d2ant_pnp_notify(btcoexist, pnp_state)
+#define	ex_halbtc8723d2ant_periodical(btcoexist)
+#define	ex_halbtc8723d2ant_display_coex_info(btcoexist)
+#define	ex_halbtc8723d2ant_display_ant_detection(btcoexist)
+#define	ex_halbtc8723d2ant_antenna_detection(btcoexist, centFreq, offset, span, seconds)
+#endif
+
+#endif

hal/efuse/efuse_mask.h

@@ -0,0 +1,98 @@
+
+#if DEV_BUS_TYPE == RT_USB_INTERFACE
+
+#if defined(CONFIG_RTL8188E)
+	#include "rtl8188e/HalEfuseMask8188E_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8812A)
+	#include "rtl8812a/HalEfuseMask8812A_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8821A)
+	#include "rtl8812a/HalEfuseMask8821A_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8192E)
+	#include "rtl8192e/HalEfuseMask8192E_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8723B)
+	#include "rtl8723b/HalEfuseMask8723B_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8814A)
+	#include "rtl8814a/HalEfuseMask8814A_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8703B)
+	#include "rtl8703b/HalEfuseMask8703B_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8723D)
+	#include "rtl8723d/HalEfuseMask8723D_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8188F)
+	#include "rtl8188f/HalEfuseMask8188F_USB.h"
+#endif
+
+#if defined(CONFIG_RTL8822B)
+	#include "rtl8822b/HalEfuseMask8822B_USB.h"
+#endif
+
+#elif DEV_BUS_TYPE == RT_PCI_INTERFACE
+
+#if defined(CONFIG_RTL8188E)
+	#include "rtl8188e/HalEfuseMask8188E_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8812A)
+	#include "rtl8812a/HalEfuseMask8812A_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8821A)
+	#include "rtl8812a/HalEfuseMask8821A_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8192E)
+	#include "rtl8192e/HalEfuseMask8192E_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8723B)
+	#include "rtl8723b/HalEfuseMask8723B_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8814A)
+	#include "rtl8814a/HalEfuseMask8814A_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8703B)
+	#include "rtl8703b/HalEfuseMask8703B_PCIE.h"
+#endif
+
+#if defined(CONFIG_RTL8822B)
+	#include "rtl8822b/HalEfuseMask8822B_PCIE.h"
+#endif
+#if defined(CONFIG_RTL8723D)
+	#include "rtl8723d/HalEfuseMask8723D_PCIE.h"
+#endif
+
+#elif DEV_BUS_TYPE == RT_SDIO_INTERFACE
+
+#if defined(CONFIG_RTL8188E)
+	#include "rtl8188e/HalEfuseMask8188E_SDIO.h"
+#endif
+
+#if defined(CONFIG_RTL8703B)
+	#include "rtl8703b/HalEfuseMask8703B_SDIO.h"
+#endif
+
+#if defined(CONFIG_RTL8188F)
+	#include "rtl8188f/HalEfuseMask8188F_SDIO.h"
+#endif
+
+#if defined(CONFIG_RTL8723D)
+	#include "rtl8723d/HalEfuseMask8723D_SDIO.h"
+#endif
+#endif

hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.c

@@ -0,0 +1,109 @@
+/******************************************************************************
+*
+* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms of version 2 of the GNU General Public License as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful, but WITHOUT
+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+* more details.
+*
+* You should have received a copy of the GNU General Public License along with
+* this program; if not, write to the Free Software Foundation, Inc.,
+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+*
+*
+******************************************************************************/
+#include <drv_types.h>
+
+#include "HalEfuseMask8822B_PCIE.h"
+
+/******************************************************************************
+*                           MPCIE.TXT
+******************************************************************************/
+
+u1Byte Array_MP_8822B_MPCIE[] = {
+	0xFF,
+	0xF7,
+	0xEF,
+	0xDE,
+	0xFC,
+	0xFB,
+	0x10,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x0F,
+	0xF7,
+	0xFF,
+	0xFF,
+	0xFF,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+
+
+};
+
+u2Byte
+EFUSE_GetArrayLen_MP_8822B_MPCIE(VOID)
+{
+	return sizeof(Array_MP_8822B_MPCIE) / sizeof(u1Byte);
+}
+
+VOID
+EFUSE_GetMaskArray_MP_8822B_MPCIE(pu1Byte Array)
+{
+	u2Byte len = EFUSE_GetArrayLen_MP_8822B_MPCIE(), i = 0;
+
+	for (i = 0; i < len; ++i)
+		Array[i] = Array_MP_8822B_MPCIE[i];
+}
+
+BOOLEAN
+EFUSE_IsAddressMasked_MP_8822B_MPCIE(u2Byte  Offset)
+{
+	int r = Offset / 16;
+	int c = (Offset % 16) / 2;
+	int result = 0;
+
+	if (c < 4) /*Upper double word*/
+		result = (Array_MP_8822B_MPCIE[r] & (0x10 << c));
+	else
+		result = (Array_MP_8822B_MPCIE[r] & (0x01 << (c - 4)));
+
+	return (result > 0) ? 0 : 1;
+}

hal/efuse/rtl8822b/HalEfuseMask8822B_PCIE.h

@@ -0,0 +1,31 @@
+/******************************************************************************
+*
+* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms of version 2 of the GNU General Public License as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful, but WITHOUT
+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+* more details.
+*
+* You should have received a copy of the GNU General Public License along with
+* this program; if not, write to the Free Software Foundation, Inc.,
+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+*
+*
+******************************************************************************/
+
+
+/******************************************************************************
+*                           MPCIE.TXT
+******************************************************************************/
+
+
+u2Byte EFUSE_GetArrayLen_MP_8822B_MPCIE(VOID);
+
+VOID EFUSE_GetMaskArray_MP_8822B_MPCIE(pu1Byte Array);
+
+BOOLEAN EFUSE_IsAddressMasked_MP_8822B_MPCIE(u2Byte  Offset);

hal/efuse/rtl8822b/HalEfuseMask8822B_USB.c

@@ -0,0 +1,105 @@
+/******************************************************************************
+*
+* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms of version 2 of the GNU General Public License as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful, but WITHOUT
+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+* more details.
+*
+* You should have received a copy of the GNU General Public License along with
+* this program; if not, write to the Free Software Foundation, Inc.,
+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+*
+*
+******************************************************************************/
+#include <drv_types.h>
+
+#include "HalEfuseMask8822B_USB.h"
+
+/******************************************************************************
+*                           MUSB.TXT
+******************************************************************************/
+
+u1Byte Array_MP_8822B_MUSB[] = {
+	0xFF,
+	0xF7,
+	0xEF,
+	0xDE,
+	0xFC,
+	0xFB,
+	0x10,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x0F,
+	0xF7,
+	0x00,
+	0x00,
+	0x00,
+	0xFF,
+	0xFF,
+	0xF3,
+	0x00,
+	0xF0,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x08,
+	0x00,
+	0x80,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+	0x00,
+
+};
+
+u2Byte EFUSE_GetArrayLen_MP_8822B_MUSB(VOID)
+{
+	return sizeof(Array_MP_8822B_MUSB) / sizeof(u1Byte);
+}
+
+VOID EFUSE_GetMaskArray_MP_8822B_MUSB(pu1Byte Array)
+{
+	u2Byte len = EFUSE_GetArrayLen_MP_8822B_MUSB(), i = 0;
+
+	for (i = 0; i < len; ++i)
+		Array[i] = Array_MP_8822B_MUSB[i];
+}
+
+BOOLEAN EFUSE_IsAddressMasked_MP_8822B_MUSB(u2Byte  Offset)
+{
+	int r = Offset / 16;
+	int c = (Offset % 16) / 2;
+	int result = 0;
+
+	if (c < 4) /*Upper double word*/
+		result = (Array_MP_8822B_MUSB[r] & (0x10 << c));
+	else
+		result = (Array_MP_8822B_MUSB[r] & (0x01 << (c - 4)));
+
+	return (result > 0) ? 0 : 1;
+}

hal/efuse/rtl8822b/HalEfuseMask8822B_USB.h

@@ -0,0 +1,32 @@
+/******************************************************************************
+*
+* Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+*
+* This program is free software; you can redistribute it and/or modify it
+* under the terms of version 2 of the GNU General Public License as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful, but WITHOUT
+* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+* more details.
+*
+* You should have received a copy of the GNU General Public License along with
+* this program; if not, write to the Free Software Foundation, Inc.,
+* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+*
+*
+******************************************************************************/
+
+
+
+/******************************************************************************
+*                           MUSB.TXT
+******************************************************************************/
+
+
+u2Byte EFUSE_GetArrayLen_MP_8822B_MUSB(VOID);
+
+VOID EFUSE_GetMaskArray_MP_8822B_MUSB(pu1Byte Array);
+
+BOOLEAN EFUSE_IsAddressMasked_MP_8822B_MUSB(u2Byte  Offset);

hal/hal_com_c2h.h

@@ -0,0 +1,54 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __COMMON_C2H_H__
+#define __COMMON_C2H_H__
+
+typedef enum _C2H_EVT {
+	C2H_DBG = 0x00,
+	C2H_LB = 0x01,
+	C2H_TXBF = 0x02,
+	C2H_CCX_TX_RPT = 0x03,
+	C2H_FW_SCAN_COMPLETE = 0x7,
+	C2H_BT_INFO = 0x09,
+	C2H_BT_MP_INFO = 0x0B,
+	C2H_RA_RPT = 0x0C,
+	C2H_RA_PARA_RPT = 0x0E,
+	C2H_FW_CHNL_SWITCH_COMPLETE = 0x10,
+	C2H_IQK_FINISH = 0x11,
+	C2H_MAILBOX_STATUS = 0x15,
+	C2H_P2P_RPORT = 0x16,
+#ifdef CONFIG_MCC_MODE
+	C2H_MCC = 0x17,
+#endif /* CONFIG_MCC_MODE */
+	C2H_MAC_HIDDEN_RPT = 0x19,
+	C2H_BCN_EARLY_RPT = 0x1E,
+	C2H_BT_SCOREBOARD_STATUS = 0x20,
+	C2H_EXTEND = 0xff,
+} C2H_EVT;
+
+typedef enum _EXTEND_C2H_EVT {
+	EXTEND_C2H_DBG_PRINT = 0
+} EXTEND_C2H_EVT;
+
+#define MAC_HIDDEN_RPT_LEN 8
+int c2h_mac_hidden_rpt_hdl(_adapter *adapter, u8 *data, u8 len);
+int hal_read_mac_hidden_rpt(_adapter *adapter);
+
+#endif /* __COMMON_C2H_H__ */

hal/hal_dm.c

@@ -0,0 +1,211 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2014 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+
+#include <drv_types.h>
+#include <hal_data.h>
+
+/* A mapping from HalData to ODM. */
+ODM_BOARD_TYPE_E boardType(u8 InterfaceSel)
+{
+	ODM_BOARD_TYPE_E        board	= ODM_BOARD_DEFAULT;
+
+#ifdef CONFIG_PCI_HCI
+	INTERFACE_SELECT_PCIE   pcie	= (INTERFACE_SELECT_PCIE)InterfaceSel;
+	switch (pcie) {
+	case INTF_SEL0_SOLO_MINICARD:
+		board |= ODM_BOARD_MINICARD;
+		break;
+	case INTF_SEL1_BT_COMBO_MINICARD:
+		board |= ODM_BOARD_BT;
+		board |= ODM_BOARD_MINICARD;
+		break;
+	default:
+		board = ODM_BOARD_DEFAULT;
+		break;
+	}
+
+#elif defined(CONFIG_USB_HCI)
+	INTERFACE_SELECT_USB    usb	= (INTERFACE_SELECT_USB)InterfaceSel;
+	switch (usb) {
+	case INTF_SEL1_USB_High_Power:
+		board |= ODM_BOARD_EXT_LNA;
+		board |= ODM_BOARD_EXT_PA;
+		break;
+	case INTF_SEL2_MINICARD:
+		board |= ODM_BOARD_MINICARD;
+		break;
+	case INTF_SEL4_USB_Combo:
+		board |= ODM_BOARD_BT;
+		break;
+	case INTF_SEL5_USB_Combo_MF:
+		board |= ODM_BOARD_BT;
+		break;
+	case INTF_SEL0_USB:
+	case INTF_SEL3_USB_Solo:
+	default:
+		board = ODM_BOARD_DEFAULT;
+		break;
+	}
+
+#endif
+	/* RTW_INFO("===> boardType(): (pHalData->InterfaceSel, pDM_Odm->BoardType) = (%d, %d)\n", InterfaceSel, board); */
+
+	return board;
+}
+
+void Init_ODM_ComInfo(_adapter *adapter)
+{
+	struct dvobj_priv *dvobj = adapter_to_dvobj(adapter);
+	PHAL_DATA_TYPE	pHalData = GET_HAL_DATA(adapter);
+	PDM_ODM_T		pDM_Odm = &(pHalData->odmpriv);
+	struct mlme_ext_priv	*pmlmeext = &adapter->mlmeextpriv;
+	struct mlme_priv	*pmlmepriv = &adapter->mlmepriv;
+	struct pwrctrl_priv *pwrctl = adapter_to_pwrctl(adapter);
+	int i;
+
+	_rtw_memset(pDM_Odm, 0, sizeof(*pDM_Odm));
+
+	pDM_Odm->Adapter = adapter;
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PLATFORM, ODM_CE);
+
+	rtw_odm_init_ic_type(adapter);
+
+	if (rtw_get_intf_type(adapter) == RTW_GSPI)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, ODM_ITRF_SDIO);
+	else
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_INTERFACE, rtw_get_intf_type(adapter));
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_MP_TEST_CHIP, IS_NORMAL_CHIP(pHalData->VersionID));
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_PATCH_ID, pHalData->CustomerID);
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BWIFI_TEST, adapter->registrypriv.wifi_spec);
+
+
+	if (pHalData->rf_type == RF_1T1R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T1R);
+	else if (pHalData->rf_type == RF_1T2R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_1T2R);
+	else if (pHalData->rf_type == RF_2T2R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R);
+	else if (pHalData->rf_type == RF_2T2R_GREEN)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T2R_GREEN);
+	else if (pHalData->rf_type == RF_2T3R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T3R);
+	else if (pHalData->rf_type == RF_2T4R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_2T4R);
+	else if (pHalData->rf_type == RF_3T3R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T3R);
+	else if (pHalData->rf_type == RF_3T4R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_3T4R);
+	else if (pHalData->rf_type == RF_4T4R)
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_4T4R);
+	else
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_TYPE, ODM_XTXR);
+
+
+	{
+		/* 1 ======= BoardType: ODM_CMNINFO_BOARD_TYPE ======= */
+		u8 odm_board_type = ODM_BOARD_DEFAULT;
+
+		if (pHalData->ExternalLNA_2G != 0) {
+			odm_board_type |= ODM_BOARD_EXT_LNA;
+			ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_LNA, 1);
+		}
+		if (pHalData->ExternalLNA_5G != 0) {
+			odm_board_type |= ODM_BOARD_EXT_LNA_5G;
+			ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_LNA, 1);
+		}
+		if (pHalData->ExternalPA_2G != 0) {
+			odm_board_type |= ODM_BOARD_EXT_PA;
+			ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_PA, 1);
+		}
+		if (pHalData->ExternalPA_5G != 0) {
+			odm_board_type |= ODM_BOARD_EXT_PA_5G;
+			ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_5G_EXT_PA, 1);
+		}
+		if (pHalData->EEPROMBluetoothCoexist)
+			odm_board_type |= ODM_BOARD_BT;
+
+		ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_BOARD_TYPE, odm_board_type);
+		/* 1 ============== End of BoardType ============== */
+	}
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_2G, pHalData->Regulation2_4G);
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DOMAIN_CODE_5G, pHalData->Regulation5G);
+
+#ifdef CONFIG_DFS_MASTER
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_DFS_REGION_DOMAIN, adapter->registrypriv.dfs_region_domain);
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_DFS_MASTER_ENABLE, &(adapter_to_rfctl(adapter)->dfs_master_enabled));
+#endif
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GPA, pHalData->TypeGPA);
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_APA, pHalData->TypeAPA);
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_GLNA, pHalData->TypeGLNA);
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_ALNA, pHalData->TypeALNA);
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFE_TYPE, pHalData->RFEType);
+
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_EXT_TRSW, 0);
+
+	/*Add by YuChen for kfree init*/
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_REGRFKFREEENABLE, adapter->registrypriv.RegPwrTrimEnable);
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RFKFREEENABLE, pHalData->RfKFreeEnable);
+	ODM_CmnInfoInit(pDM_Odm, ODM_CMNINFO_RF_ANTENNA_TYPE, pHalData->TRxAntDivType);
+
+	/*Add by YuChen for adaptivity init*/
+	phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_CARRIER_SENSE_ENABLE, (adapter->registrypriv.adaptivity_mode != 0) ? TRUE : FALSE);
+	phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_DCBACKOFF, adapter->registrypriv.adaptivity_dc_backoff);
+	phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_DYNAMICLINKADAPTIVITY, (adapter->registrypriv.adaptivity_dml != 0) ? TRUE : FALSE);
+	phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_TH_L2H_INI, adapter->registrypriv.adaptivity_th_l2h_ini);
+	phydm_adaptivityInfoInit(pDM_Odm, PHYDM_ADAPINFO_TH_EDCCA_HL_DIFF, adapter->registrypriv.adaptivity_th_edcca_hl_diff);
+
+
+	/* Pointer reference */
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_UNI, &(dvobj->traffic_stat.tx_bytes));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_UNI, &(dvobj->traffic_stat.rx_bytes));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_WM_MODE, &(pmlmeext->cur_wireless_mode));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BAND, &(pHalData->CurrentBandType));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_RATE, &(pHalData->ForcedDataRate));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
+
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_CHNL_OFFSET, &(pHalData->nCur40MhzPrimeSC));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SEC_MODE, &(adapter->securitypriv.dot11PrivacyAlgrthm));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BW, &(pHalData->CurrentChannelBW));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_CHNL, &(pHalData->CurrentChannel));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_NET_CLOSED, &(adapter->net_closed));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_FORCED_IGI_LB, &(pHalData->u1ForcedIgiLb));
+
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_SCAN, &(pmlmepriv->bScanInProcess));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_POWER_SAVING, &(pwrctl->bpower_saving));
+	/*Add by Yuchen for phydm beamforming*/
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_TX_TP, &(dvobj->traffic_stat.cur_tx_tp));
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_RX_TP, &(dvobj->traffic_stat.cur_rx_tp));
+#ifdef CONFIG_USB_HCI
+	ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_HUBUSBMODE, &(dvobj->usb_speed));
+#endif
+	for (i = 0; i < ODM_ASSOCIATE_ENTRY_NUM; i++)
+		ODM_CmnInfoPtrArrayHook(pDM_Odm, ODM_CMNINFO_STA_STATUS, i, NULL);
+
+	/* TODO */
+	/* ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BT_OPERATION, _FALSE); */
+	/* ODM_CmnInfoHook(pDM_Odm, ODM_CMNINFO_BT_DISABLE_EDCA, _FALSE); */
+}

hal/hal_dm.h

@@ -0,0 +1,25 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef __HAL_DM_H__
+#define __HAL_DM_H__
+
+void Init_ODM_ComInfo(_adapter *adapter);
+
+#endif /* __HAL_DM_H__ */

hal/hal_halmac.h

@@ -0,0 +1,109 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _HAL_HALMAC_H_
+#define _HAL_HALMAC_H_
+
+#include <drv_types.h>		/* adapter_to_dvobj(), struct intf_hdl and etc. */
+#include "halmac/halmac_api.h"	/* PHALMAC_ADAPTER and etc. */
+
+/* HALMAC Definition for Driver */
+#define RTW_HALMAC_H2C_MAX_SIZE		HALMAC_H2C_CMD_ORIGINAL_SIZE_88XX
+#define RTW_HALMAC_BA_SSN_RPT_SIZE	4
+
+#define dvobj_set_halmac(d, mac)	((d)->halmac = (mac))
+#define dvobj_to_halmac(d)		((PHALMAC_ADAPTER)((d)->halmac))
+#define adapter_to_halmac(p)		dvobj_to_halmac(adapter_to_dvobj(p))
+
+/* for H2C cmd */
+#define MAX_H2C_BOX_NUMS 4
+#define MESSAGE_BOX_SIZE 4
+#define EX_MESSAGE_BOX_SIZE 4
+
+typedef enum _RTW_HALMAC_MODE {
+	RTW_HALMAC_MODE_NORMAL,
+	RTW_HALMAC_MODE_WIFI_TEST,
+} RTW_HALMAC_MODE;
+
+extern HALMAC_PLATFORM_API rtw_halmac_platform_api;
+
+/* HALMAC API for Driver(HAL) */
+u8 rtw_halmac_read8(struct intf_hdl *, u32 addr);
+u16 rtw_halmac_read16(struct intf_hdl *, u32 addr);
+u32 rtw_halmac_read32(struct intf_hdl *, u32 addr);
+int rtw_halmac_write8(struct intf_hdl *, u32 addr, u8 value);
+int rtw_halmac_write16(struct intf_hdl *, u32 addr, u16 value);
+int rtw_halmac_write32(struct intf_hdl *, u32 addr, u32 value);
+
+int rtw_halmac_init_adapter(struct dvobj_priv *, PHALMAC_PLATFORM_API);
+int rtw_halmac_deinit_adapter(struct dvobj_priv *);
+int rtw_halmac_poweron(struct dvobj_priv *);
+int rtw_halmac_poweroff(struct dvobj_priv *);
+int rtw_halmac_init_hal(struct dvobj_priv *);
+int rtw_halmac_init_hal_fw(struct dvobj_priv *, u8 *fw, u32 fwsize);
+int rtw_halmac_init_hal_fw_file(struct dvobj_priv *, u8 *fwpath);
+int rtw_halmac_deinit_hal(struct dvobj_priv *);
+int rtw_halmac_self_verify(struct dvobj_priv *);
+int rtw_halmac_dlfw(struct dvobj_priv *, u8 *fw, u32 fwsize);
+int rtw_halmac_dlfw_from_file(struct dvobj_priv *, u8 *fwpath);
+int rtw_halmac_phy_power_switch(struct dvobj_priv *, u8 enable);
+int rtw_halmac_send_h2c(struct dvobj_priv *, u8 *h2c);
+int rtw_halmac_c2h_handle(struct dvobj_priv *, u8 *c2h, u32 size);
+
+int rtw_halmac_get_physical_efuse_size(struct dvobj_priv *, u32 *size);
+int rtw_halmac_read_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
+int rtw_halmac_read_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
+int rtw_halmac_write_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
+int rtw_halmac_get_logical_efuse_size(struct dvobj_priv *, u32 *size);
+int rtw_halmac_read_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
+int rtw_halmac_write_logical_efuse_map(struct dvobj_priv *, u8 *map, u32 size, u8 *maskmap, u32 masksize);
+int rtw_halmac_read_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
+int rtw_halmac_write_logical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
+
+int rtw_halmac_write_bt_physical_efuse(struct dvobj_priv *, u32 offset, u32 cnt, u8 *data);
+int rtw_halmac_read_bt_physical_efuse_map(struct dvobj_priv *, u8 *map, u32 size);
+
+int rtw_halmac_config_rx_info(struct dvobj_priv *, HALMAC_DRV_INFO);
+int rtw_halmac_set_mac_address(struct dvobj_priv *, enum _hw_port, u8 *addr);
+int rtw_halmac_set_bssid(struct dvobj_priv *d, enum _hw_port hwport, u8 *addr);
+
+int rtw_halmac_set_bandwidth(struct dvobj_priv *, u8 channel, u8 pri_ch_idx, u8 bw);
+int rtw_halmac_rx_agg_switch(struct dvobj_priv *, u8 enable);
+int rtw_halmac_get_hw_value(struct dvobj_priv *d, HALMAC_HW_ID hw_id, VOID *pvalue);
+
+int rtw_halmac_get_wow_reason(struct dvobj_priv *, u8 *reason);
+int rtw_halmac_get_drv_info_sz(struct dvobj_priv *d, u8 *sz);
+
+int rtw_halmac_get_rsvd_drv_pg_bndy(struct dvobj_priv *dvobj, u16 *drv_pg);
+int rtw_halmac_download_rsvd_page(struct dvobj_priv *dvobj, u16 page_idx, u8 *pbuf, u8 length);
+
+#ifdef CONFIG_SDIO_HCI
+int rtw_halmac_query_tx_page_num(struct dvobj_priv *);
+int rtw_halmac_get_tx_queue_page_num(struct dvobj_priv *, u8 queue, u32 *page);
+u32 rtw_halmac_sdio_get_tx_addr(struct dvobj_priv *, u8 *desc, u32 size);
+int rtw_halmac_sdio_tx_allowed(struct dvobj_priv *, u8 *buf, u32 size);
+u32 rtw_halmac_sdio_get_rx_addr(struct dvobj_priv *, u8 *seq);
+#endif /* CONFIG_SDIO_HCI */
+
+#ifdef CONFIG_USB_HCI
+u8 rtw_halmac_usb_get_bulkout_id(struct dvobj_priv *, u8 *buf, u32 size);
+u8 rtw_halmac_switch_usb_mode(struct dvobj_priv *d, enum RTW_USB_SPEED usb_mode);
+#endif /* CONFIG_USB_HCI */
+
+#endif /* _HAL_HALMAC_H_ */

hal/hal_hci/hal_usb.c

@@ -0,0 +1,523 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HAL_USB_C_
+
+#include <drv_types.h>
+#include <hal_data.h>
+
+#ifdef CONFIG_RTL8821C
+	#include <rtl8821cu_hal.h>	/* MAX_RECVBUF_SZ */
+#endif /* CONFIG_RTL8821C */
+
+int	usb_init_recv_priv(_adapter *padapter, u16 ini_in_buf_sz)
+{
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+	int	i, res = _SUCCESS;
+	struct recv_buf *precvbuf;
+
+#ifdef CONFIG_RECV_THREAD_MODE
+	_rtw_init_sema(&precvpriv->recv_sema, 0);/* will be removed */
+	_rtw_init_sema(&precvpriv->terminate_recvthread_sema, 0);/* will be removed */
+#endif /* CONFIG_RECV_THREAD_MODE */
+
+#ifdef PLATFORM_LINUX
+	tasklet_init(&precvpriv->recv_tasklet,
+		     (void(*)(unsigned long))usb_recv_tasklet,
+		     (unsigned long)padapter);
+#endif /* PLATFORM_LINUX */
+
+#ifdef PLATFORM_FREEBSD
+#ifdef CONFIG_RX_INDICATE_QUEUE
+	TASK_INIT(&precvpriv->rx_indicate_tasklet, 0, rtw_rx_indicate_tasklet, padapter);
+#endif /* CONFIG_RX_INDICATE_QUEUE */
+#endif /* PLATFORM_FREEBSD */
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	precvpriv->int_in_urb = usb_alloc_urb(0, GFP_KERNEL);
+	if (precvpriv->int_in_urb == NULL) {
+		res = _FAIL;
+		RTW_INFO("alloc_urb for interrupt in endpoint fail !!!!\n");
+		goto exit;
+	}
+#endif /* PLATFORM_LINUX */
+	precvpriv->int_in_buf = rtw_zmalloc(ini_in_buf_sz);
+	if (precvpriv->int_in_buf == NULL) {
+		res = _FAIL;
+		RTW_INFO("alloc_mem for interrupt in endpoint fail !!!!\n");
+		goto exit;
+	}
+#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */
+
+	/* init recv_buf */
+	_rtw_init_queue(&precvpriv->free_recv_buf_queue);
+	_rtw_init_queue(&precvpriv->recv_buf_pending_queue);
+#ifndef CONFIG_USE_USB_BUFFER_ALLOC_RX
+	/* this is used only when RX_IOBUF is sk_buff */
+	skb_queue_head_init(&precvpriv->free_recv_skb_queue);
+#endif
+
+	RTW_INFO("NR_RECVBUFF: %d\n", NR_RECVBUFF);
+	RTW_INFO("MAX_RECVBUF_SZ: %d\n", MAX_RECVBUF_SZ);
+	precvpriv->pallocated_recv_buf = rtw_zmalloc(NR_RECVBUFF * sizeof(struct recv_buf) + 4);
+	if (precvpriv->pallocated_recv_buf == NULL) {
+		res = _FAIL;
+		RT_TRACE(_module_rtl871x_recv_c_, _drv_err_, ("alloc recv_buf fail!\n"));
+		goto exit;
+	}
+
+	precvpriv->precv_buf = (u8 *)N_BYTE_ALIGMENT((SIZE_PTR)(precvpriv->pallocated_recv_buf), 4);
+
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;
+
+	for (i = 0; i < NR_RECVBUFF ; i++) {
+		_rtw_init_listhead(&precvbuf->list);
+
+		_rtw_spinlock_init(&precvbuf->recvbuf_lock);
+
+		precvbuf->alloc_sz = MAX_RECVBUF_SZ;
+
+		res = rtw_os_recvbuf_resource_alloc(padapter, precvbuf);
+		if (res == _FAIL)
+			break;
+
+		precvbuf->ref_cnt = 0;
+		precvbuf->adapter = padapter;
+
+		/* rtw_list_insert_tail(&precvbuf->list, &(precvpriv->free_recv_buf_queue.queue)); */
+
+		precvbuf++;
+	}
+
+	precvpriv->free_recv_buf_queue_cnt = NR_RECVBUFF;
+
+#if defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD)
+
+	skb_queue_head_init(&precvpriv->rx_skb_queue);
+
+#ifdef CONFIG_RX_INDICATE_QUEUE
+	memset(&precvpriv->rx_indicate_queue, 0, sizeof(struct ifqueue));
+	mtx_init(&precvpriv->rx_indicate_queue.ifq_mtx, "rx_indicate_queue", NULL, MTX_DEF);
+#endif /* CONFIG_RX_INDICATE_QUEUE */
+
+#ifdef CONFIG_PREALLOC_RECV_SKB
+	{
+		int i;
+		SIZE_PTR tmpaddr = 0;
+		SIZE_PTR alignment = 0;
+		struct sk_buff *pskb = NULL;
+
+		RTW_INFO("NR_PREALLOC_RECV_SKB: %d\n", NR_PREALLOC_RECV_SKB);
+#ifdef CONFIG_FIX_NR_BULKIN_BUFFER
+		RTW_INFO("Enable CONFIG_FIX_NR_BULKIN_BUFFER\n");
+#endif
+
+		for (i = 0; i < NR_PREALLOC_RECV_SKB; i++) {
+#ifdef CONFIG_PREALLOC_RX_SKB_BUFFER
+			pskb = rtw_alloc_skb_premem(MAX_RECVBUF_SZ);
+#else
+			pskb = rtw_skb_alloc(MAX_RECVBUF_SZ + RECVBUFF_ALIGN_SZ);
+#endif /* CONFIG_PREALLOC_RX_SKB_BUFFER */
+
+			if (pskb) {
+#ifdef PLATFORM_FREEBSD
+				pskb->dev = padapter->pifp;
+#else
+				pskb->dev = padapter->pnetdev;
+#endif /* PLATFORM_FREEBSD */
+
+#ifndef CONFIG_PREALLOC_RX_SKB_BUFFER
+				tmpaddr = (SIZE_PTR)pskb->data;
+				alignment = tmpaddr & (RECVBUFF_ALIGN_SZ - 1);
+				skb_reserve(pskb, (RECVBUFF_ALIGN_SZ - alignment));
+#endif
+				skb_queue_tail(&precvpriv->free_recv_skb_queue, pskb);
+			}
+		}
+	}
+#endif /* CONFIG_PREALLOC_RECV_SKB */
+
+#endif /* defined(PLATFORM_LINUX) || defined(PLATFORM_FREEBSD) */
+
+exit:
+
+	return res;
+}
+
+void usb_free_recv_priv(_adapter *padapter, u16 ini_in_buf_sz)
+{
+	int i;
+	struct recv_buf *precvbuf;
+	struct recv_priv	*precvpriv = &padapter->recvpriv;
+
+	precvbuf = (struct recv_buf *)precvpriv->precv_buf;
+
+	for (i = 0; i < NR_RECVBUFF ; i++) {
+		rtw_os_recvbuf_resource_free(padapter, precvbuf);
+		precvbuf++;
+	}
+
+	if (precvpriv->pallocated_recv_buf)
+		rtw_mfree(precvpriv->pallocated_recv_buf, NR_RECVBUFF * sizeof(struct recv_buf) + 4);
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+#ifdef PLATFORM_LINUX
+	if (precvpriv->int_in_urb)
+		usb_free_urb(precvpriv->int_in_urb);
+#endif
+	if (precvpriv->int_in_buf)
+		rtw_mfree(precvpriv->int_in_buf, ini_in_buf_sz);
+#endif /* CONFIG_USB_INTERRUPT_IN_PIPE */
+
+#ifdef PLATFORM_LINUX
+
+	if (skb_queue_len(&precvpriv->rx_skb_queue))
+		RTW_WARN("rx_skb_queue not empty\n");
+
+	rtw_skb_queue_purge(&precvpriv->rx_skb_queue);
+
+	if (skb_queue_len(&precvpriv->free_recv_skb_queue))
+		RTW_WARN("free_recv_skb_queue not empty, %d\n", skb_queue_len(&precvpriv->free_recv_skb_queue));
+
+#if !defined(CONFIG_USE_USB_BUFFER_ALLOC_RX)
+#if defined(CONFIG_PREALLOC_RECV_SKB) && defined(CONFIG_PREALLOC_RX_SKB_BUFFER)
+	{
+		struct sk_buff *skb;
+
+		while ((skb = skb_dequeue(&precvpriv->free_recv_skb_queue)) != NULL) {
+			if (rtw_free_skb_premem(skb) != 0)
+				rtw_skb_free(skb);
+		}
+	}
+#else
+	rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue);
+#endif /* defined(CONFIG_PREALLOC_RX_SKB_BUFFER) && defined(CONFIG_PREALLOC_RECV_SKB) */
+#endif /* !defined(CONFIG_USE_USB_BUFFER_ALLOC_RX) */
+
+#endif /* PLATFORM_LINUX */
+
+#ifdef PLATFORM_FREEBSD
+	struct sk_buff  *pskb;
+	while (NULL != (pskb = skb_dequeue(&precvpriv->rx_skb_queue)))
+		rtw_skb_free(pskb);
+
+#if !defined(CONFIG_USE_USB_BUFFER_ALLOC_RX)
+	rtw_skb_queue_purge(&precvpriv->free_recv_skb_queue);
+#endif
+
+#ifdef CONFIG_RX_INDICATE_QUEUE
+	struct mbuf *m;
+	for (;;) {
+		IF_DEQUEUE(&precvpriv->rx_indicate_queue, m);
+		if (m == NULL)
+			break;
+		m_freem(m);
+	}
+	mtx_destroy(&precvpriv->rx_indicate_queue.ifq_mtx);
+#endif /* CONFIG_RX_INDICATE_QUEUE */
+
+#endif /* PLATFORM_FREEBSD */
+}
+
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
+int usb_write_async(struct usb_device *udev, u32 addr, void *pdata, u16 len)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	int ret;
+
+	requesttype = VENDOR_WRITE;/* write_out */
+	request = REALTEK_USB_VENQT_CMD_REQ;
+	index = REALTEK_USB_VENQT_CMD_IDX;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+
+	ret = _usbctrl_vendorreq_async_write(udev, request, wvalue, index, pdata, len, requesttype);
+
+	return ret;
+}
+
+int usb_async_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{
+	u8 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	struct usb_device *udev = pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = val;
+	ret = usb_write_async(udev, addr, &data, 1);
+	_func_exit_;
+
+	return ret;
+}
+
+int usb_async_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{
+	u16 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	struct usb_device *udev = pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = val;
+	ret = usb_write_async(udev, addr, &data, 2);
+	_func_exit_;
+
+	return ret;
+}
+
+int usb_async_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{
+	u32 data;
+	int ret;
+	struct dvobj_priv  *pdvobjpriv = (struct dvobj_priv *)pintfhdl->pintf_dev;
+	struct usb_device *udev = pdvobjpriv->pusbdev;
+
+	_func_enter_;
+	data = val;
+	ret = usb_write_async(udev, addr, &data, 4);
+	_func_exit_;
+
+	return ret;
+}
+#endif /* CONFIG_USB_SUPPORT_ASYNC_VDN_REQ */
+
+u8 usb_read8(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u8 data = 0;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;/* read_in */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = 1;
+	usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+			  &data, len, requesttype);
+
+	_func_exit_;
+
+	return data;
+}
+
+u16 usb_read16(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u16 data = 0;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;/* read_in */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = 2;
+	usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+			  &data, len, requesttype);
+
+	_func_exit_;
+
+	return data;
+
+}
+
+u32 usb_read32(struct intf_hdl *pintfhdl, u32 addr)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data = 0;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x01;/* read_in */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = 4;
+	usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+			  &data, len, requesttype);
+
+	_func_exit_;
+
+	return data;
+}
+
+int usb_write8(struct intf_hdl *pintfhdl, u32 addr, u8 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u8 data;
+	int ret;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;/* write_out */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = 1;
+
+	data = val;
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+				&data, len, requesttype);
+
+	_func_exit_;
+
+	return ret;
+}
+
+int usb_write16(struct intf_hdl *pintfhdl, u32 addr, u16 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u16 data;
+	int ret;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;/* write_out */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = 2;
+
+	data = val;
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+				&data, len, requesttype);
+
+	_func_exit_;
+
+	return ret;
+
+}
+
+int usb_write32(struct intf_hdl *pintfhdl, u32 addr, u32 val)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u32 data;
+	int ret;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;/* write_out */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = 4;
+	data = val;
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+				&data, len, requesttype);
+
+	_func_exit_;
+
+	return ret;
+
+}
+
+int usb_writeN(struct intf_hdl *pintfhdl, u32 addr, u32 length, u8 *pdata)
+{
+	u8 request;
+	u8 requesttype;
+	u16 wvalue;
+	u16 index;
+	u16 len;
+	u8 buf[VENDOR_CMD_MAX_DATA_LEN] = {0};
+	int ret;
+
+	_func_enter_;
+
+	request = 0x05;
+	requesttype = 0x00;/* write_out */
+	index = 0;/* n/a */
+
+	wvalue = (u16)(addr & 0x0000ffff);
+	len = length;
+	_rtw_memcpy(buf, pdata, len);
+	ret = usbctrl_vendorreq(pintfhdl, request, wvalue, index,
+				buf, len, requesttype);
+
+	_func_exit_;
+
+	return ret;
+}
+
+void usb_set_intf_ops(_adapter *padapter, struct _io_ops *pops)
+{
+	_rtw_memset((u8 *)pops, 0, sizeof(struct _io_ops));
+
+	pops->_read8 = &usb_read8;
+	pops->_read16 = &usb_read16;
+	pops->_read32 = &usb_read32;
+	pops->_read_mem = &usb_read_mem;
+	pops->_read_port = &usb_read_port;
+
+	pops->_write8 = &usb_write8;
+	pops->_write16 = &usb_write16;
+	pops->_write32 = &usb_write32;
+	pops->_writeN = &usb_writeN;
+
+#ifdef CONFIG_USB_SUPPORT_ASYNC_VDN_REQ
+	pops->_write8_async = &usb_async_write8;
+	pops->_write16_async = &usb_async_write16;
+	pops->_write32_async = &usb_async_write32;
+#endif
+	pops->_write_mem = &usb_write_mem;
+	pops->_write_port = &usb_write_port;
+
+	pops->_read_port_cancel = &usb_read_port_cancel;
+	pops->_write_port_cancel = &usb_write_port_cancel;
+
+#ifdef CONFIG_USB_INTERRUPT_IN_PIPE
+	pops->_read_interrupt = &usb_read_interrupt;
+#endif
+
+}

hal/hal_phy.c

@@ -0,0 +1,266 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#define _HAL_PHY_C_
+
+#include <drv_types.h>
+
+/* ********************************************************************************
+ *	Constant.
+ * ********************************************************************************
+ * 2008/11/20 MH For Debug only, RF */
+static RF_SHADOW_T RF_Shadow[RF6052_MAX_PATH][RF6052_MAX_REG];
+
+/**
+* Function:	PHY_CalculateBitShift
+*
+* OverView:	Get shifted position of the BitMask
+*
+* Input:
+*			u4Byte		BitMask,
+*
+* Output:	none
+* Return:		u4Byte		Return the shift bit bit position of the mask
+*/
+u32
+PHY_CalculateBitShift(
+	u32 BitMask
+)
+{
+	u32 i;
+
+	for (i = 0; i <= 31; i++) {
+		if (((BitMask >> i) &  0x1) == 1)
+			break;
+	}
+
+	return i;
+}
+
+
+/*
+ * ==> RF shadow Operation API Code Section!!!
+ *
+ *-----------------------------------------------------------------------------
+ * Function:	PHY_RFShadowRead
+ *				PHY_RFShadowWrite
+ *				PHY_RFShadowCompare
+ *				PHY_RFShadowRecorver
+ *				PHY_RFShadowCompareAll
+ *				PHY_RFShadowRecorverAll
+ *				PHY_RFShadowCompareFlagSet
+ *				PHY_RFShadowRecorverFlagSet
+ *
+ * Overview:	When we set RF register, we must write shadow at first.
+ *			When we are running, we must compare shadow abd locate error addr.
+ *			Decide to recorver or not.
+ *
+ * Input:       NONE
+ *
+ * Output:      NONE
+ *
+ * Return:      NONE
+ *
+ * Revised History:
+ * When			Who		Remark
+ * 11/20/2008	MHC		Create Version 0.
+ *
+ *---------------------------------------------------------------------------*/
+u32
+PHY_RFShadowRead(
+	IN	PADAPTER		Adapter,
+	IN	u8				eRFPath,
+	IN	u32				Offset)
+{
+	return	RF_Shadow[eRFPath][Offset].Value;
+
+}	/* PHY_RFShadowRead */
+
+
+VOID
+PHY_RFShadowWrite(
+	IN	PADAPTER		Adapter,
+	IN	u8				eRFPath,
+	IN	u32				Offset,
+	IN	u32				Data)
+{
+	RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask);
+	RF_Shadow[eRFPath][Offset].Driver_Write = _TRUE;
+
+}	/* PHY_RFShadowWrite */
+
+
+BOOLEAN
+PHY_RFShadowCompare(
+	IN	PADAPTER		Adapter,
+	IN	u8				eRFPath,
+	IN	u32				Offset)
+{
+	u32	reg;
+	/* Check if we need to check the register */
+	if (RF_Shadow[eRFPath][Offset].Compare == _TRUE) {
+		reg = rtw_hal_read_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask);
+		/* Compare shadow and real rf register for 20bits!! */
+		if (RF_Shadow[eRFPath][Offset].Value != reg) {
+			/* Locate error position. */
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _TRUE;
+			/* RT_TRACE(COMP_INIT, DBG_LOUD, */
+			/* ("PHY_RFShadowCompare RF-%d Addr%02lx Err = %05lx\n", */
+			/* eRFPath, Offset, reg)); */
+		}
+		return RF_Shadow[eRFPath][Offset].ErrorOrNot ;
+	}
+	return _FALSE;
+}	/* PHY_RFShadowCompare */
+
+
+VOID
+PHY_RFShadowRecorver(
+	IN	PADAPTER		Adapter,
+	IN	u8				eRFPath,
+	IN	u32				Offset)
+{
+	/* Check if the address is error */
+	if (RF_Shadow[eRFPath][Offset].ErrorOrNot == _TRUE) {
+		/* Check if we need to recorver the register. */
+		if (RF_Shadow[eRFPath][Offset].Recorver == _TRUE) {
+			rtw_hal_write_rfreg(Adapter, eRFPath, Offset, bRFRegOffsetMask,
+					    RF_Shadow[eRFPath][Offset].Value);
+			/* RT_TRACE(COMP_INIT, DBG_LOUD, */
+			/* ("PHY_RFShadowRecorver RF-%d Addr%02lx=%05lx", */
+			/* eRFPath, Offset, RF_Shadow[eRFPath][Offset].Value)); */
+		}
+	}
+
+}	/* PHY_RFShadowRecorver */
+
+
+VOID
+PHY_RFShadowCompareAll(
+	IN	PADAPTER			Adapter)
+{
+	u8		eRFPath = 0 ;
+	u32		Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
+		for (Offset = 0; Offset < maxReg; Offset++)
+			PHY_RFShadowCompare(Adapter, eRFPath, Offset);
+	}
+
+}	/* PHY_RFShadowCompareAll */
+
+
+VOID
+PHY_RFShadowRecorverAll(
+	IN	PADAPTER			Adapter)
+{
+	u8		eRFPath = 0;
+	u32		Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
+		for (Offset = 0; Offset < maxReg; Offset++)
+			PHY_RFShadowRecorver(Adapter, eRFPath, Offset);
+	}
+
+}	/* PHY_RFShadowRecorverAll */
+
+
+VOID
+PHY_RFShadowCompareFlagSet(
+	IN	PADAPTER		Adapter,
+	IN	u8				eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	/* Set True or False!!! */
+	RF_Shadow[eRFPath][Offset].Compare = Type;
+
+}	/* PHY_RFShadowCompareFlagSet */
+
+
+VOID
+PHY_RFShadowRecorverFlagSet(
+	IN	PADAPTER		Adapter,
+	IN	u8				eRFPath,
+	IN	u32				Offset,
+	IN	u8				Type)
+{
+	/* Set True or False!!! */
+	RF_Shadow[eRFPath][Offset].Recorver = Type;
+
+}	/* PHY_RFShadowRecorverFlagSet */
+
+
+VOID
+PHY_RFShadowCompareFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u8		eRFPath = 0;
+	u32		Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
+		for (Offset = 0; Offset < maxReg; Offset++) {
+			/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowCompareFlagSet(Adapter, eRFPath, Offset, _TRUE);
+		}
+	}
+
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+
+VOID
+PHY_RFShadowRecorverFlagSetAll(
+	IN	PADAPTER			Adapter)
+{
+	u8		eRFPath = 0;
+	u32		Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
+		for (Offset = 0; Offset < maxReg; Offset++) {
+			/* 2008/11/20 MH For S3S4 test, we only check reg 26/27 now!!!! */
+			if (Offset != 0x26 && Offset != 0x27)
+				PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _FALSE);
+			else
+				PHY_RFShadowRecorverFlagSet(Adapter, eRFPath, Offset, _TRUE);
+		}
+	}
+
+}	/* PHY_RFShadowCompareFlagSetAll */
+
+VOID
+PHY_RFShadowRefresh(
+	IN	PADAPTER			Adapter)
+{
+	u8		eRFPath = 0;
+	u32		Offset = 0, maxReg = GET_RF6052_REAL_MAX_REG(Adapter);
+
+	for (eRFPath = 0; eRFPath < RF6052_MAX_PATH; eRFPath++) {
+		for (Offset = 0; Offset < maxReg; Offset++) {
+			RF_Shadow[eRFPath][Offset].Value = 0;
+			RF_Shadow[eRFPath][Offset].Compare = _FALSE;
+			RF_Shadow[eRFPath][Offset].Recorver  = _FALSE;
+			RF_Shadow[eRFPath][Offset].ErrorOrNot = _FALSE;
+			RF_Shadow[eRFPath][Offset].Driver_Write = _FALSE;
+		}
+	}
+
+}	/* PHY_RFShadowRead */

hal/halmac/halmac_2_platform.h

@@ -0,0 +1,81 @@
+/******************************************************************************
+ *
+ * Copyright(c) 2015 - 2016 Realtek Corporation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of version 2 of the GNU General Public License as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
+ *
+ *
+ ******************************************************************************/
+#ifndef _HALMAC_2_PLATFORM_H_
+#define _HALMAC_2_PLATFORM_H_
+
+/*[Driver] always set BUILD_TEST =0*/
+#define BUILD_TEST	0
+
+#if BUILD_TEST
+#include "../Platform/App/Test/halmac_2_platformapi.h"
+#else
+/*[Driver] use their own header files*/
+#include <drv_conf.h>			/* for basic_types.h and osdep_service.h */
+#include <basic_types.h>		/* u8, u16, u32 and etc.*/
+#include <osdep_service.h>		/* __BIG_ENDIAN, __LITTLE_ENDIAN, _sema, _mutex */
+#endif
+
+/*[Driver] provide the define of _TRUE, _FALSE, NULL, u8, u16, u32*/
+#ifndef NULL
+#define NULL		((void *)0)
+#endif
+
+#define HALMAC_INLINE	inline
+
+typedef u8	*pu8;
+typedef u16	*pu16;
+typedef u32	*pu32;
+typedef s8	*ps8;
+typedef s16	*ps16;
+typedef s32	*ps32;
+
+
+#define HALMAC_PLATFORM_LITTLE_ENDIAN	1
+#define HALMAC_PLATFORM_BIG_ENDIAN	0
+
+/* Note : Named HALMAC_PLATFORM_LITTLE_ENDIAN / HALMAC_PLATFORM_BIG_ENDIAN
+ * is not mandatory. But Little endian must be '1'. Big endian must be '0'
+ */
+/*[Driver] config the system endian*/
+#ifdef __LITTLE_ENDIAN
+#define HALMAC_SYSTEM_ENDIAN	HALMAC_PLATFORM_LITTLE_ENDIAN
+#else /* !__LITTLE_ENDIAN */
+#define HALMAC_SYSTEM_ENDIAN	HALMAC_PLATFORM_BIG_ENDIAN
+#endif /* !__LITTLE_ENDIAN */
+
+/*[Driver] config if the operating platform*/
+#define HALMAC_PLATFORM_WINDOWS		0
+#define HALMAC_PLATFORM_LINUX		1
+#define HALMAC_PLATFORM_AP		0
+/*[Driver] must set HALMAC_PLATFORM_TESTPROGRAM = 0*/
+#define HALMAC_PLATFORM_TESTPROGRAM	0
+
+/*[Driver] config if enable the dbg msg or notl*/
+#define HALMAC_DBG_MSG_ENABLE		1
+
+/*[Driver] define the Platform SDIO Bus CLK */
+#define PLATFORM_SD_CLK	50000000 /*50MHz*/
+
+/*[Driver] provide the type mutex*/
+/* Mutex type */
+typedef _mutex		HALMAC_MUTEX;
+
+#endif /* _HALMAC_2_PLATFORM_H_ */
+

hal/halmac/halmac_88xx/halmac_8197f/halmac_8197f_cfg.h

@@ -0,0 +1,112 @@
+#ifndef _HALMAC_8197F_CFG_H_
+#define _HALMAC_8197F_CFG_H_
+
+#include "halmac_8197f_pwr_seq.h"
+#include "halmac_api_8197f.h"
+#include "halmac_api_8197f_usb.h"
+#include "halmac_api_8197f_sdio.h"
+#include "halmac_api_8197f_pcie.h"
+
+#if HALMAC_PLATFORM_TESTPROGRAM
+#include "halmisc_api_8197f.h"
+#include "halmisc_api_8197f_usb.h"
+#include "halmisc_api_8197f_sdio.h"
+#include "halmisc_api_8197f_pcie.h"
+#endif
+
+#define HALMAC_TX_FIFO_SIZE_8197F					262144 /* 64k */
+#define HALMAC_RX_FIFO_SIZE_8197F					32768 /* 32k */
+#define HALMAC_TX_PAGE_SIZE_8197F					128 /* PageSize 128Byte */
+#define HALMAC_SECURITY_CAM_ENTRY_NUM_8197F			64 /* CAM Entry Size */
+#define HALMAC_TX_DESC_SIZE_8197F					48
+#define HALMAC_RX_DESC_SIZE_8197F					24
+
+/* H2C/C2hH*/
+#define HALMAC_H2C_CMD_SIZE_8197F					32
+
+/* Efuse size */
+#define HALMAC_EFUSE_SIZE_8197F						512/* 0x2000 */
+#define HALMAC_EEPROM_SIZE_8197F					0x300
+#define HALMAC_BT_EFUSE_SIZE_8197F					128
+
+/* Rx aggregation parameters */
+typedef enum _HALMAC_NORMAL_RXAGG_TH_TO_8197F {
+	HALMAC_NORMAL_RXAGG_THRESHOLD_8197F	= 0xFF,
+	HALMAC_NORMAL_RXAGG_TIMEOUT_8197F = 0x01,
+} HALMAC_NORMAL_RXAGG_TH_TO_8197F;
+
+typedef enum _HALMAC_LOOPBACK_RXAGG_TH_TO_8197F {
+	HALMAC_LOOPBACK_RXAGG_THRESHOLD_8197F = 0xFF,
+	HALMAC_LOOPBACK_RXAGG_TIMEOUT_8197F = 0x01,
+} HALMAC_LOOPBACK_RXAGG_TH_TO_8197F;
+
+/* FIFO size & packet size */
+#define HALMAC_BASIC_RXFF_SIZE_8197F			24576 /* 24K */
+#define HALMAC_WOWLAN_PATTERN_SIZE_8197F		256
+
+/* Normal mode */
+typedef enum _HALMAC_NORMAL_PAGE_NUM_8197F {
+	HALMAC_NORMAL_PAGE_NUM_HPQ_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_NPQ_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_LPQ_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_EXPQ_8197F = 0x4A,
+	HALMAC_NORMAL_PAGE_NUM_PUBQ_8197F = 0x6C0,
+	HALMAC_NORMAL_TX_PAGE_BOUNDARY_8197F = 2032,
+} HALMAC_NORMAL_PAGE_NUM_8197F;
+
+/* Loop back mode */
+typedef enum _HALMAC_LOOBACK_PAGE_NUM_8197F {
+	HALMAC_LOOPBACK_PAGE_NUM_HPQ_8197F = 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_LPQ_8197F = 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_NPQ_8197F = 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_EXPQ_8197F = 0x4A,
+	HALMAC_LOOPBACK_PAGE_NUM_PUBQ_8197F = 0x2C0,
+	HALMAC_LOOPBACK_TX_PAGE_BOUNDARY_8197F = 1008,
+	HALMAC_LOOPBACK_LB_BUF_PAGE_NUM_8197F = 0x600,
+} HALMAC_LOOBACK_PAGE_NUM_8197F;
+
+
+/* Normal mode */
+typedef enum _HALMAC_NORMAL_PAGE_NUM_2BULKOUT_8197F {
+	HALMAC_NORMAL_PAGE_NUM_HPQ_2BULKOUT_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_NPQ_2BULKOUT_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_LPQ_2BULKOUT_8197F = 0x00,
+	HALMAC_NORMAL_PAGE_NUM_EXPQ_2BULKOUT_8197F = 0x00,
+	HALMAC_NORMAL_PAGE_NUM_PUBQ_2BULKOUT_8197F = 0x756,
+	HALMAC_NORMAL_TX_PAGE_BOUNDARY_2BULKOUT_8197F = 2032,
+} HALMAC_NORMAL_PAGE_NUM_2BULKOUT_8197F;
+
+/* Loop back mode */
+typedef enum _HALMAC_LOOBACK_PAGE_NUM_2BULKOUT_8197F {
+	HALMAC_LOOPBACK_PAGE_NUM_HPQ_2BULKOUT_8197F	= 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_NPQ_2BULKOUT_8197F	= 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_LPQ_2BULKOUT_8197F	= 0x00,
+	HALMAC_LOOPBACK_PAGE_NUM_EXPQ_2BULKOUT_8197F = 0x00,
+	HALMAC_LOOPBACK_PAGE_NUM_PUBQ_2BULKOUT_8197F = 0x356,
+	HALMAC_LOOPBACK_TX_PAGE_BOUNDARY_2BULKOUT_8197F = 1008,
+	HALMAC_LOOPBACK_LB_BUF_PAGE_NUM_2BULKOUT_8197F = 0x600,
+} HALMAC_LOOBACK_PAGE_NUM_2BULKOUT_8197F;
+
+/* Normal mode */
+typedef enum _HALMAC_NORMAL_PAGE_NUM_3BULKOUT_8197F {
+	HALMAC_NORMAL_PAGE_NUM_HPQ_3BULKOUT_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_NPQ_3BULKOUT_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_LPQ_3BULKOUT_8197F = 0x4C,
+	HALMAC_NORMAL_PAGE_NUM_EXPQ_3BULKOUT_8197F = 0x00,
+	HALMAC_NORMAL_PAGE_NUM_PUBQ_3BULKOUT_8197F = 0x70A,
+	HALMAC_NORMAL_TX_PAGE_BOUNDARY_3BULKOUT_8197F = 2032,
+} HALMAC_NORMAL_PAGE_NUM_3BULKOUT_8197F;
+
+/* Loop back mode */
+typedef enum _HALMAC_LOOBACK_PAGE_NUM_3BULKOUT_8197F {
+	HALMAC_LOOPBACK_PAGE_NUM_HPQ_3BULKOUT_8197F = 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_NPQ_3BULKOUT_8197F = 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_LPQ_3BULKOUT_8197F = 0x4C,
+	HALMAC_LOOPBACK_PAGE_NUM_EXPQ_3BULKOUT_8197F = 0x00,
+	HALMAC_LOOPBACK_PAGE_NUM_PUBQ_3BULKOUT_8197F = 0x30A,
+	HALMAC_LOOPBACK_TX_PAGE_BOUNDARY_3BULKOUT_8197F = 1008,
+	HALMAC_LOOPBACK_LB_BUF_PAGE_NUM_3BULKOUT_8197F = 0x600,
+} HALMAC_LOOBACK_PAGE_NUM_3BULKOUT_8197F;
+
+
+#endif

hal/halmac/halmac_88xx/halmac_8197f/halmac_8197f_pwr_seq.h

@@ -0,0 +1,161 @@
+#ifndef HALMAC_POWER_SEQUENCE_8197F
+#define HALMAC_POWER_SEQUENCE_8197F
+
+#include "../../halmac_pwr_seq_cmd.h"
+
+/*
+ *      There are 6 HW Power States:
+ *      0: POFF--Power Off
+ *      1: PDN--Power Down
+ *      2: CARDEMU--Card Emulation
+ *      3: ACT--Active Mode
+ *      4: LPS--Low Power State
+ *      5: SUS--Suspend
+ *
+ *      The transition from different states are defined below
+ *      TRANS_CARDEMU_TO_ACT
+ *      TRANS_ACT_TO_CARDEMU
+ *      TRANS_CARDEMU_TO_SUS
+ *      TRANS_SUS_TO_CARDEMU
+ *      TRANS_CARDEMU_TO_PDN
+ *      TRANS_ACT_TO_LPS
+ *      TRANS_LPS_TO_ACT
+ *
+ *      TRANS_END
+ */
+
+#define HALMAC_8197f_TRANS_CARDEMU_TO_ACT_STEPS 15
+#define HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS 15
+#define HALMAC_8197f_TRANS_CARDEMU_TO_SUS_STEPS 15
+#define HALMAC_8197f_TRANS_SUS_TO_CARDEMU_STEPS 15
+#define HALMAC_8197f_TRANS_CARDEMU_TO_PDN_STEPS 15
+#define HALMAC_8197f_TRANS_PDN_TO_CARDEMU_STEPS 15
+#define HALMAC_8197f_TRANS_ACT_TO_LPS_STEPS             20
+#define HALMAC_8197f_TRANS_LPS_TO_ACT_STEPS             15
+#define HALMAC_8197f_TRANS_END_STEPS                    1
+
+
+#define RTL8197f_TRANS_CARDEMU_TO_ACT                                                                                                           \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), 0 },                  /* disable SW LPS 0x04[10]=0*/      \
+	{ 0x0006, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1) },           /* wait till 0x04[17] = 1    power ready*/   \
+	{ 0x0006, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0) },             /* release WLON reset  0x04[16]=1*/    \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), 0 },                  /* disable HWPDN 0x04[15]=0*/       \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, (BIT(4) | BIT(3)), 0 },       /* disable WL suspend*/    \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0) },             /* polling until return 0*/    \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, BIT(0), 0 },                /**/      \
+	{ 0x0026, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4) },             /*MAC CLK = 40M*/      \
+	{ 0x0073, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2) },             /**/
+
+#define RTL8197f_TRANS_ACT_TO_CARDEMU                                                                                                   \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x001F, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0 },            /*0x1F[7:0] = 0 turn off RF*/ \
+	{ 0x004E, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), 0 },          /*0x4C[23] = 0x4E[7] = 0, switch DPDT_SEL_P output from register 0x65[2] */ \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1) },     /*0x04[9] = 1 turn off MAC by HW state machine*/      \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, BIT(1), 0 },        /*wait till 0x04[9] = 0 polling until return 0 to disable*/
+
+#define RTL8197f_TRANS_CARDEMU_TO_SUS                                                                                                   \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4) | BIT(3), (BIT(4) | BIT(3)) },                 /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/    \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) }, /*0x04[12:11] = 2b'01 enable WL suspend*/     \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) | BIT(4) },                   /*0x04[12:11] = 2b'11 enable WL suspend for PCIe*/      \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0) },                                   /*Set SDIO suspend local register*/ \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_POLLING, BIT(1), 0 },                                      /*wait power state to suspend*/
+
+#define RTL8197f_TRANS_SUS_TO_CARDEMU                                                                                                   \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(0), 0 },        /*Set SDIO suspend local register*/      \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1) }, /*wait power state to suspend*/ \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0 }, /*0x04[12:11] = 2b'01enable WL suspend*/
+
+#define RTL8197f_TRANS_CARDEMU_TO_CARDDIS                                                                                                       \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0007, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x20 },                                        /*0x07=0x20 , SOP option to disable BG/MB*/      \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK | HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), BIT(3) }, /*0x04[12:11] = 2b'01 enable WL suspend*/     \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(2), BIT(2) },                                     /*0x04[10] = 1, enable SW LPS*/       \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0) },                                   /*Set SDIO suspend local register*/ \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_POLLING, BIT(1), 0 },                                      /*wait power state to suspend*/
+
+#define RTL8197f_TRANS_CARDDIS_TO_CARDEMU                                                                                                       \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(0), 0 },        /*Set SDIO suspend local register*/      \
+	{ 0x0086, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_POLLING, BIT(1), BIT(1) }, /*wait power state to suspend*/ \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(3) | BIT(4), 0 }, /*0x04[12:11] = 2b'01enable WL suspend*/ \
+	{ 0x0301, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0 },            /*PCIe DMA start*/
+
+
+#define RTL8197f_TRANS_CARDEMU_TO_PDN                                                                                           \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0006, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), 0 },          /* 0x04[16] = 0*/ \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7) },     /* 0x04[15] = 1*/
+
+#define RTL8197f_TRANS_PDN_TO_CARDEMU                                                                                           \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x0005, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(7), 0 },/* 0x04[15] = 0*/
+
+#define RTL8197f_TRANS_ACT_TO_LPS                                                                                                               \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0x1138, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, BIT(0) | BIT(1) },      /*set RPWM IMR*/  \
+	{ 0x0194, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0) },             /* enable 32K CLK*/ \
+	/*{0x0093, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK,HALMAC_PWR_BASEADDR_MAC,HALMAC_PWR_CMD_WRITE, 0xff, 0x42}, *//* LPS Option WL partial ON*/ \
+	{ 0x0093, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xff, 0x40 },                 /* LPS Option WL partial ON disable*/ \
+	{ 0x0522, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF },                 /*Tx Pause*/       \
+	{ 0x05F8, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, 0xFF, 0 },                  /*Should be zero if no packet is transmitting*/     \
+	{ 0x05F9, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, 0xFF, 0 },                  /*Should be zero if no packet is transmitting*/     \
+	{ 0x05FA, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, 0xFF, 0 },                  /*Should be zero if no packet is transmitting*/     \
+	{ 0x0002, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), 0 },                  /*CCK and OFDM are disabled,and clock are gated*/   \
+	{ 0x0002, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWRSEQ_DELAY_US },  /*Delay 1us*/       \
+	{ 0x0002, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), 0 },                  /*Whole BB is reset*/       \
+	{ 0x0100, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x3F },                 /*Reset MAC TRX*/  \
+	{ 0x0101, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), 0 },                  /*check if removed later*/  \
+	{ 0x0553, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(5), BIT(5) },             /*Respond TxOK to scheduler*/  \
+	{ 0x0029, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(6) | BIT(7), 0x00 },      /*gated BB clock*/        \
+	{ 0x0008, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4), BIT(4) },             /* switch TSF clock to 32K*/   \
+	{ 0x0090, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(0), BIT(0) },             /* enable WL_LPS_EN*/
+
+
+#define RTL8197f_TRANS_LPS_TO_ACT                                                                                                                       \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	/*{0x0080, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK,HALMAC_PWR_BASEADDR_SDIO,HALMAC_PWR_CMD_WRITE, 0xFF, 0x84}, *//*SDIO RPWM*/ \
+	{ 0x0080, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(7), BIT(7) },                   /*SDIO RPWM*/ \
+	{ 0x0080, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_SDIO_MSK, HALMAC_PWR_BASEADDR_SDIO, HALMAC_PWR_CMD_WRITE, BIT(7), 0 },                        /*SDIO RPWM*/ \
+	{ 0xFE58, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_USB_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x84 },                         /*USB RPWM*/ \
+	{ 0x0361, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_PCI_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0x84 },                         /*PCIe RPWM*/ \
+	{ 0x0002, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWRSEQ_DELAY_MS },          /*Delay*/ \
+	{ 0x0008, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(4), 0 },                          /*.	0x08[4] = 0		 switch TSF to 40M*/ \
+	{ 0x0002, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_DELAY, 0, HALMAC_PWRSEQ_DELAY_MS },          /*Delay*/ \
+	{ 0x0109, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_POLLING, BIT(7), 0 },                        /*Polling 0x109[7]=0  TSF in 40M*/ \
+	{ 0x0029, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(6) | BIT(7), BIT(6) | BIT(7) },   /*.	0x29[7:6] = 2b'00	 enable BB clock*/ \
+	{ 0x0101, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1), BIT(1) },                     /*.	0x101[1] = 1*/ \
+	{ 0x0100, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0xFF },                         /*.	0x100[7:0] = 0xFF	 enable WMAC TRX*/ \
+	{ 0x0002, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, BIT(1) | BIT(0), BIT(1) | BIT(0) },   /*.	0x02[1:0] = 2b'11	 enable BB macro*/ \
+	{ 0x0522, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0 },                            /*.	0x522 = 0*/ \
+	{ 0x113C, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, HALMAC_PWR_BASEADDR_MAC, HALMAC_PWR_CMD_WRITE, 0xFF, 0 },                            /*clear RPWM INT*/
+
+#define RTL8197f_TRANS_END                                                                                                                      \
+	/* format */                                                                                                                            \
+	/* { offset, cut_msk, fab_msk|interface_msk, base|cmd, msk, value }, // comments here*/                                                         \
+	{ 0xFFFF, HALMAC_PWR_CUT_ALL_MSK, HALMAC_PWR_FAB_ALL_MSK, HALMAC_PWR_INTF_ALL_MSK, 0, HALMAC_PWR_CMD_END, 0, 0 },
+
+
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_power_on_flow[HALMAC_8197f_TRANS_CARDEMU_TO_ACT_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_radio_off_flow[HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_card_disable_flow[HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS + HALMAC_8197f_TRANS_CARDEMU_TO_PDN_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_card_enable_flow[HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS + HALMAC_8197f_TRANS_CARDEMU_TO_PDN_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_suspend_flow[HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS + HALMAC_8197f_TRANS_CARDEMU_TO_SUS_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_resume_flow[HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS + HALMAC_8197f_TRANS_CARDEMU_TO_SUS_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_hwpdn_flow[HALMAC_8197f_TRANS_ACT_TO_CARDEMU_STEPS + HALMAC_8197f_TRANS_CARDEMU_TO_PDN_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_enter_lps_flow[HALMAC_8197f_TRANS_ACT_TO_LPS_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+extern HALMAC_WLAN_PWR_CFG halmac_8197f_leave_lps_flow[HALMAC_8197f_TRANS_LPS_TO_ACT_STEPS + HALMAC_8197f_TRANS_END_STEPS];
+
+#endif