Add IRQ with SM/DC sync0 support
parent
7715a2fffd
commit
148cdba265
383
soes/esc.c
383
soes/esc.c
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@ -52,6 +52,51 @@ void ESC_ALstatus (uint8_t status)
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ESC_write (ESCREG_ALSTATUS, &dummy, sizeof (dummy));
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}
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/** Write ALeventMask register 0x204.
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*
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* @param[in] n = AL Event Mask
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*/
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void ESC_ALeventmaskwrite (uint32_t mask)
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{
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uint32_t aleventmask;
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aleventmask = htoel(mask);
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ESC_write (ESCREG_ALEVENTMASK, &aleventmask, sizeof(aleventmask));
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}
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/** Read AleventMask register 0x204.
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*
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* @return value of register AL Event Mask
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*/
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uint32_t ESC_ALeventmaskread (void)
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{
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uint32_t aleventmask;
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ESC_read (ESCREG_ALEVENTMASK, &aleventmask, sizeof(aleventmask));
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return htoel(aleventmask);
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}
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/** Write ALevent register 0x220.
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*
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* @param[in] n = AL Event Mask
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*/
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void ESC_ALeventwrite (uint32_t event)
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{
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uint32_t alevent;
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alevent = htoel(event);
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ESC_write (ESCREG_ALEVENT, &alevent, sizeof(alevent));
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}
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/** Read Alevent register 0x220.
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*
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* @return value of register AL Event Mask
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*/
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uint32_t ESC_ALeventread (void)
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{
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uint32_t alevent;
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ESC_read (ESCREG_ALEVENT, &alevent, sizeof(alevent));
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return htoel(alevent);
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}
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/** Read SM Status register 0x805(+ offset to SyncManager n) to acknowledge a
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* Sync Manager event Bit 3 in ALevent. The result is not used.
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*
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@ -139,6 +184,107 @@ uint8_t ESC_WDstatus (void)
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return (uint8_t) wdstatus;
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}
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/** Read SYNC Out Unit activation registers 0x981
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*
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* @return value of register Activation.
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*/
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uint8_t ESC_SYNCactivation (void)
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{
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uint8_t activation;
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ESC_read (ESCREG_SYNC_ACT, &activation, sizeof(activation));
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return activation;
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}
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/** Read SYNC0 cycle time
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*
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* @return value of register SYNC0 cycle time
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*/
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uint32_t ESC_SYNC0cycletime (void)
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{
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uint32_t cycletime;
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ESC_read (ESCREG_SYNC0_CYCLE_TIME, &cycletime, sizeof(cycletime));
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cycletime = etohl (cycletime);
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return cycletime;
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}
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/** Read SYNC1 cycle time
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*
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* @return value of register SYNC1 cycle time
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*/
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uint32_t ESC_SYNC1cycletime (void)
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{
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uint32_t cycletime;
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ESC_read (ESCREG_SYNC1_CYCLE_TIME, &cycletime, 4);
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cycletime = etohl (cycletime);
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return cycletime;
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}
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/** Validate the DC values if the SYNC unit is activated.
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*
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* @return = 0 if OK, else ERROR code to be set by caller.
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*/
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uint16_t ESC_checkDC (void)
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{
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uint16_t ret = 0;
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uint8_t sync_act = ESC_SYNCactivation();
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uint32_t sync0_cycletime = ESC_SYNC0cycletime();
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uint16_t sync_type_supported1c32 = 0;
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uint32_t mincycletime = 0;
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/* Do we need to check sync settings? */
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if((sync_act & (ESCREG_SYNC_ACT_ACTIVATED | ESCREG_SYNC_AUTO_ACTIVATED)) > 0)
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{
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/* If the sync unit is active at least on signal should be activated */
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if(COE_getSyncMgrPara(0x1c32, 0x4, &sync_type_supported1c32, DTYPE_UNSIGNED16) == 0)
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{
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ret = ALERR_DCINVALIDSYNCCFG;
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}
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else if(COE_getSyncMgrPara(0x1c32, 0x5, &mincycletime, DTYPE_UNSIGNED32) == 0)
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{
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ret = ALERR_DCINVALIDSYNCCFG;
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}
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else if(COE_getSyncMgrPara(0x10F1, 0x2, &sync_counter_limit, DTYPE_UNSIGNED16) == 0)
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{
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ret = ALERR_DCINVALIDSYNCCFG;
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}
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else if((sync_act & (ESCREG_SYNC_SYNC0_EN | ESCREG_SYNC_SYNC1_EN)) == 0)
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{
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ret = ALERR_DCINVALIDSYNCCFG;
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}
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/* Do we support activated signals */
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else if(((sync_type_supported1c32 & SYNCTYPE_SUPPORT_DCSYNC0) == 0) &&
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((sync_act & ESCREG_SYNC_SYNC0_EN) > 0))
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{
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ret = ALERR_DCINVALIDSYNCCFG;
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}
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/* Do we support activated signals */
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else if(((sync_type_supported1c32 & SYNCTYPE_SUPPORT_DCSYNC1) == 0) &&
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((sync_act & ESCREG_SYNC_SYNC1_EN) > 0))
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{
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ret = ALERR_DCINVALIDSYNCCFG;
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}
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else if((sync0_cycletime != 0) && (sync0_cycletime < mincycletime))
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{
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ret = ALERR_DCSYNC0CYCLETIME;
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}
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else
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{
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dc_sync = 1;
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sync_counter = 0;
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}
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}
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else
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{
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dc_sync = 0;
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sync_counter = 0;
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}
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return ret;
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}
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/** Check mailbox status by reading all SyncManager 0 and 1 data. The read values
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* are compared with local definitions for SM Physical Address, SM Length and SM Control.
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* If we check fails we disable Mailboxes by disabling SyncManager 0 and 1 and return
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@ -459,7 +605,7 @@ uint8_t ESC_mbxprocess (void)
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if (ESCvar.mbxoutpost || ESCvar.mbxbackup)
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{
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/* if outmbx empty */
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if (!ESCvar.mbxoutpost)
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if (ESCvar.mbxoutpost == 0)
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{
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/* use backup mbx */
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ESC_writembx (ESCvar.mbxbackup);
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@ -502,8 +648,8 @@ uint8_t ESC_mbxprocess (void)
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}
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/* read mailbox if full and no xoe in progress */
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if (ESCvar.SM[0].MBXstat && !MBXcontrol[0].state && !ESCvar.mbxoutpost
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&& !ESCvar.xoe)
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if ((ESCvar.SM[0].MBXstat != 0) && (MBXcontrol[0].state == 0)
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&& (ESCvar.mbxoutpost == 0) && (ESCvar.xoe == 0))
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{
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ESC_readmbx ();
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ESCvar.SM[0].MBXstat = 0;
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@ -522,15 +668,6 @@ uint8_t ESC_mbxprocess (void)
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return 1;
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}
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/* ack changes in non used SM */
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if (ESCvar.ALevent & ESCREG_ALEVENT_SMCHANGE)
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{
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ESC_SMack (4);
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ESC_SMack (5);
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ESC_SMack (6);
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ESC_SMack (7);
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}
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return 0;
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}
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/** Handler for incorrect or unsupported mailbox data. Write error response
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@ -598,11 +735,13 @@ uint8_t ESC_checkSM23 (uint8_t state)
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*/
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uint8_t ESC_startinput (uint8_t state)
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{
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state = ESC_checkSM23 (state);
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if (state != (ESCpreop | ESCerror))
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{
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ESC_SMenable (3);
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App.state = APPSTATE_INPUT;
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CC_ATOMIC_SET(App.state, APPSTATE_INPUT);
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}
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else
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{
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@ -617,6 +756,42 @@ uint8_t ESC_startinput (uint8_t state)
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ESC_ALerror (ALERR_INVALIDOUTPUTSM);
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}
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}
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/* Exit here if polling */
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if (esc_cfg->use_interrupt == 0)
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{
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return state;
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}
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if (state != (ESCpreop | ESCerror))
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{
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uint16_t dc_check_result;
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dc_check_result = ESC_checkDC();
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if(dc_check_result > 0)
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{
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ESC_ALerror (dc_check_result);
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state = (ESCpreop | ESCerror);
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ESC_SMdisable (2);
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ESC_SMdisable (3);
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CC_ATOMIC_SET(App.state, APPSTATE_IDLE);
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}
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else
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{
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if (esc_cfg->esc_hw_interrupt_enable != NULL)
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{
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if(dc_sync > 0)
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{
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esc_cfg->esc_hw_interrupt_enable(ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM2);
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}
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else
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{
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esc_cfg->esc_hw_interrupt_enable(ESCREG_ALEVENT_SM2);
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}
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}
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}
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}
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return state;
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}
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@ -626,9 +801,16 @@ uint8_t ESC_startinput (uint8_t state)
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*/
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void ESC_stopinput (void)
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{
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App.state = APPSTATE_IDLE;
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CC_ATOMIC_SET(App.state, APPSTATE_IDLE);
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ESC_SMdisable (3);
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ESC_SMdisable (2);
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/* Call interrupt disable hook case it have been configured */
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if ((esc_cfg->use_interrupt != 0) &&
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(esc_cfg->esc_hw_interrupt_disable != NULL))
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{
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esc_cfg->esc_hw_interrupt_disable (ESCREG_ALEVENT_DC_SYNC0 | ESCREG_ALEVENT_SM2);
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}
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}
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@ -641,30 +823,121 @@ void ESC_stopinput (void)
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*/
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uint8_t ESC_startoutput (uint8_t state)
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{
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ESC_SMenable (2);
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App.state |= APPSTATE_OUTPUT;
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CC_ATOMIC_OR(App.state, APPSTATE_OUTPUT);
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return state;
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}
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/** Unconditional stop of updating outputs by disabling Sync Manager 2.
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* Set the App.state to APPSTATE_ONPUT. Call application hook APP_safeoutput
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* Set the App.state to APPSTATE_INPUT. Call application hook APP_safeoutput
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* letting the user to set safe state values on outputs.
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*
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*/
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void ESC_stopoutput (void)
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{
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App.state &= APPSTATE_INPUT;
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CC_ATOMIC_AND(App.state, APPSTATE_INPUT);
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ESC_SMdisable (2);
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APP_safeoutput ();
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}
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/** The state handler acting on ALControl Bit(0) and SyncManager Activation BIT(4)
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/** The state handler acting on SyncManager Activation BIT(4)
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* events in the Al Event Request register 0x220.
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*
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*/
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void ESC_sm_act_event (void)
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{
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uint8_t ac, an, as, ax, ax23;
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/* Have at least on Sync Manager changed */
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if ((ESCvar.ALevent & ESCREG_ALEVENT_SMCHANGE) == 0)
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{
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/* nothing to do */
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return;
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}
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/* Mask state request bits + Error ACK */
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ac = ESCvar.ALcontrol & ESCREG_AL_STATEMASK;
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as = ESCvar.ALstatus & ESCREG_AL_STATEMASK;
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an = as;
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if (((ac & ESCerror) || (ac == ESCinit)))
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{
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/* if error bit confirmed reset */
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ac &= ESCREG_AL_ERRACKMASK;
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an &= ESCREG_AL_ERRACKMASK;
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}
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/* Enter SM changed handling for all steps but Init and Boot when Mailboxes
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* is up and running
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*/
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if ((as & ESCREG_AL_ALLBUTINITMASK) &&
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((as == ESCboot) == 0) && MBXrun)
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{
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/* Validate Sync Managers, reading the Activation register will
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* acknowledge the SyncManager Activation event making us enter
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* this execution path.
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*/
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ax = ESC_checkmbx (as);
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ax23 = ESC_checkSM23 (as);
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if ((an & ESCerror) && ((ac & ESCerror) == 0))
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{
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/* if in error then stay there */
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}
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/* Have we been forced to step down to INIT we will stop mailboxes,
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* update AL Status Code and exit ESC_state
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*/
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else if (ax == (ESCinit | ESCerror))
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{
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/* If we have activated Inputs and Outputs we need to disable them */
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if (CC_ATOMIC_GET(App.state))
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{
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ESC_stopoutput ();
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ESC_stopinput ();
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}
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/* Stop mailboxes and update ALStatus code */
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ESC_stopmbx ();
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ESC_ALerror (ALERR_INVALIDMBXCONFIG);
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MBXrun = 0;
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ESC_ALstatus (ax);
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return;
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}
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/* Have we been forced to step down to PREOP we will stop inputs
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* and outputs, update AL Status Code and exit ESC_state
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*/
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else if (CC_ATOMIC_GET(App.state) && (ax23 == (ESCpreop | ESCerror)))
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{
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ESC_stopoutput ();
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ESC_stopinput ();
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if (ESCvar.SMtestresult & SMRESULT_ERRSM3)
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{
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ESC_ALerror (ALERR_INVALIDINPUTSM);
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}
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else
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{
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ESC_ALerror (ALERR_INVALIDOUTPUTSM);
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}
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ESC_ALstatus (ax23);
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}
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}
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else
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{
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ESC_SMack (0);
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ESC_SMack (1);
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ESC_SMack (2);
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ESC_SMack (3);
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ESC_SMack (4);
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ESC_SMack (5);
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ESC_SMack (6);
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ESC_SMack (7);
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}
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}
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/** The state handler acting on ALControl Bit(0)
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* events in the Al Event Request register 0x220.
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*
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*/
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void ESC_state (void)
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{
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uint8_t ac, an, as, ax, ax23;
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uint8_t handle_smchanged = 0;
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uint8_t ac, an, as;
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/* Do we have a state change request pending */
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if (ESCvar.ALevent & ESCREG_ALEVENT_CONTROL)
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@ -673,11 +946,6 @@ void ESC_state (void)
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sizeof (ESCvar.ALcontrol));
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ESCvar.ALcontrol = etohs (ESCvar.ALcontrol);
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}
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/* Have at least on Sync Manager changed */
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else if (ESCvar.ALevent & ESCREG_ALEVENT_SMCHANGE)
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{
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handle_smchanged = 1;
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}
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else
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{
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/* nothing to do */
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@ -693,60 +961,6 @@ void ESC_state (void)
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ac &= ESCREG_AL_ERRACKMASK;
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an &= ESCREG_AL_ERRACKMASK;
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}
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/* Enter SM changed handling for all steps but Init and Boot when Mailboxes
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* is up and running
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*/
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if (handle_smchanged && (as & ESCREG_AL_ALLBUTINITMASK) &&
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!(as == ESCboot) && MBXrun)
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{
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/* Validate Sync Managers, reading the Activation register will
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* acknowledge the SyncManager Activation event making us enter
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* this execution path.
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*/
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ax = ESC_checkmbx (as);
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ax23 = ESC_checkSM23 (as);
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if ((an & ESCerror) && !(ac & ESCerror))
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{
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/* if in error then stay there */
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return;
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}
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/* Have we been forced to step down to INIT we will stop mailboxes,
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* update AL Status Code and exit ESC_state
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*/
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if (ax == (ESCinit | ESCerror))
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{
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/* If we have activated Inputs and Outputs we need to disable them */
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if (App.state)
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{
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ESC_stopoutput ();
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ESC_stopinput ();
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}
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/* Stop mailboxes and update ALStatus code */
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ESC_stopmbx ();
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ESC_ALerror (ALERR_INVALIDMBXCONFIG);
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MBXrun = 0;
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ESC_ALstatus (ax);
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return;
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}
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/* Have we been forced to step down to PREOP we will stop inputs
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* and outputs, update AL Status Code and exit ESC_state
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*/
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if ((App.state) && (ax23 == (ESCpreop | ESCerror)))
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{
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ESC_stopoutput ();
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ESC_stopinput ();
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if (ESCvar.SMtestresult & SMRESULT_ERRSM3)
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{
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ESC_ALerror (ALERR_INVALIDINPUTSM);
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}
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else
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{
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ESC_ALerror (ALERR_INVALIDOUTPUTSM);
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}
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ESC_ALstatus (ax23);
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return;
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}
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}
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/* Error state not acked, leave original */
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if ((an & ESCerror) && ((ac & ESCerror) == 0))
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@ -778,6 +992,7 @@ void ESC_state (void)
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{
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/* get station address */
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ESC_address ();
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COE_initDefaultSyncMgrPara ();
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an = ESC_startmbx (ac);
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break;
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}
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@ -799,10 +1014,17 @@ void ESC_state (void)
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case OP_TO_INIT:
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{
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ESC_stopoutput ();
|
||||
ESC_stopinput ();
|
||||
ESC_stopmbx ();
|
||||
an = ESCinit;
|
||||
break;
|
||||
}
|
||||
case SAFEOP_TO_INIT:
|
||||
{
|
||||
ESC_stopinput ();
|
||||
ESC_stopmbx ();
|
||||
an = ESCinit;
|
||||
break;
|
||||
}
|
||||
case PREOP_TO_INIT:
|
||||
{
|
||||
|
@ -846,6 +1068,9 @@ void ESC_state (void)
|
|||
case OP_TO_PREOP:
|
||||
{
|
||||
ESC_stopoutput ();
|
||||
ESC_stopinput ();
|
||||
an = ESCpreop;
|
||||
break;
|
||||
}
|
||||
case SAFEOP_TO_PREOP:
|
||||
{
|
||||
|
|
115
soes/esc.h
115
soes/esc.h
|
@ -13,29 +13,51 @@
|
|||
|
||||
#include <cc.h>
|
||||
|
||||
#define ESCREG_ADDRESS 0x0010
|
||||
#define ESCREG_DLSTATUS 0x0110
|
||||
#define ESCREG_ALCONTROL 0x0120
|
||||
#define ESCREG_ALSTATUS 0x0130
|
||||
#define ESCREG_ALERROR 0x0134
|
||||
#define ESCREG_ALEVENT 0x0220
|
||||
#define ESCREG_ALEVENT_SM_MASK 0x0310
|
||||
#define ESCREG_ALEVENT_SMCHANGE 0x0010
|
||||
#define ESCREG_ALEVENT_CONTROL 0x0001
|
||||
#define ESCREG_ALEVENT_SM2 0x0400
|
||||
#define ESCREG_ALEVENT_SM3 0x0800
|
||||
#define ESCREG_WDSTATUS 0x0440
|
||||
#define ESCREG_SM0 0x0800
|
||||
#define ESCREG_SM0STATUS (ESCREG_SM0 + 5)
|
||||
#define ESCREG_SM0PDI (ESCREG_SM0 + 7)
|
||||
#define ESCREG_SM1 (ESCREG_SM0 + 0x08)
|
||||
#define ESCREG_SM2 (ESCREG_SM0 + 0x10)
|
||||
#define ESCREG_SM3 (ESCREG_SM0 + 0x18)
|
||||
#define ESCREG_LOCALTIME 0x0910
|
||||
#define ESCREG_SMENABLE_BIT 0x01
|
||||
#define ESCREG_AL_STATEMASK 0x001f
|
||||
#define ESCREG_AL_ALLBUTINITMASK 0x0e
|
||||
#define ESCREG_AL_ERRACKMASK 0x0f
|
||||
#define ESCREG_ADDRESS 0x0010
|
||||
#define ESCREG_DLSTATUS 0x0110
|
||||
#define ESCREG_ALCONTROL 0x0120
|
||||
#define ESCREG_ALSTATUS 0x0130
|
||||
#define ESCREG_ALERROR 0x0134
|
||||
#define ESCREG_ALEVENTMASK 0x0204
|
||||
#define ESCREG_ALEVENT 0x0220
|
||||
#define ESCREG_ALEVENT_SM_MASK 0x0310
|
||||
#define ESCREG_ALEVENT_SMCHANGE 0x0010
|
||||
#define ESCREG_ALEVENT_CONTROL 0x0001
|
||||
#define ESCREG_ALEVENT_DC_LATCH 0x0002
|
||||
#define ESCREG_ALEVENT_DC_SYNC0 0x0004
|
||||
#define ESCREG_ALEVENT_DC_SYNC1 0x0008
|
||||
#define ESCREG_ALEVENT_EEP 0x0020
|
||||
#define ESCREG_ALEVENT_SM0 0x0100
|
||||
#define ESCREG_ALEVENT_SM1 0x0200
|
||||
#define ESCREG_ALEVENT_SM2 0x0400
|
||||
#define ESCREG_ALEVENT_SM3 0x0800
|
||||
#define ESCREG_WDSTATUS 0x0440
|
||||
#define ESCREG_EECONTSTAT 0x0502
|
||||
#define ESCREG_EEDATA 0x0508
|
||||
#define ESCREG_SM0 0x0800
|
||||
#define ESCREG_SM0STATUS (ESCREG_SM0 + 5)
|
||||
#define ESCREG_SM0PDI (ESCREG_SM0 + 7)
|
||||
#define ESCREG_SM1 (ESCREG_SM0 + 0x08)
|
||||
#define ESCREG_SM2 (ESCREG_SM0 + 0x10)
|
||||
#define ESCREG_SM3 (ESCREG_SM0 + 0x18)
|
||||
#define ESCREG_LOCALTIME 0x0910
|
||||
#define ESCREG_SYNC_ACT 0x0981
|
||||
#define ESCREG_SYNC_ACT_ACTIVATED 0x01
|
||||
#define ESCREG_SYNC_SYNC0_EN 0x02
|
||||
#define ESCREG_SYNC_SYNC1_EN 0x04
|
||||
#define ESCREG_SYNC_AUTO_ACTIVATED 0x08
|
||||
#define ESCREG_SYNC0_CYCLE_TIME 0x09A0
|
||||
#define ESCREG_SYNC1_CYCLE_TIME 0x09A4
|
||||
#define ESCREG_SMENABLE_BIT 0x01
|
||||
#define ESCREG_AL_STATEMASK 0x001f
|
||||
#define ESCREG_AL_ALLBUTINITMASK 0x0e
|
||||
#define ESCREG_AL_ERRACKMASK 0x0f
|
||||
|
||||
#define SYNCTYPE_SUPPORT_FREERUN 0x01
|
||||
#define SYNCTYPE_SUPPORT_SYNCHRON 0x02
|
||||
#define SYNCTYPE_SUPPORT_DCSYNC0 0x04
|
||||
#define SYNCTYPE_SUPPORT_DCSYNC1 0x08
|
||||
#define SYNCTYPE_SUPPORT_SUBCYCLE 0x10
|
||||
|
||||
#define ESCinit 0x01
|
||||
#define ESCpreop 0x02
|
||||
|
@ -74,12 +96,16 @@
|
|||
#define ALERR_INVALIDSTATECHANGE 0x0011
|
||||
#define ALERR_UNKNOWNSTATE 0x0012
|
||||
#define ALERR_BOOTNOTSUPPORTED 0x0013
|
||||
#define ALERR_NOVALIDFIRMWARE 0x0014
|
||||
#define ALERR_INVALIDBOOTMBXCONFIG 0x0015
|
||||
#define ALERR_INVALIDMBXCONFIG 0x0016
|
||||
#define ALERR_INVALIDSMCONFIG 0x0017
|
||||
#define ALERR_SYNCERROR 0x001A
|
||||
#define ALERR_WATCHDOG 0x001B
|
||||
#define ALERR_INVALIDOUTPUTSM 0x001D
|
||||
#define ALERR_INVALIDINPUTSM 0x001E
|
||||
#define ALERR_DCINVALIDSYNCCFG 0x0030
|
||||
#define ALERR_DCSYNC0CYCLETIME 0x0036
|
||||
|
||||
#define MBXERR_SYNTAX 0x0001
|
||||
#define MBXERR_UNSUPPORTEDPROTOCOL 0x0002
|
||||
|
@ -488,6 +514,10 @@ extern uint8_t ESC_MBX1_smc;
|
|||
|
||||
void ESC_config (esc_cfg_t * cfg);
|
||||
void ESC_ALerror (uint16_t errornumber);
|
||||
void ESC_ALeventwrite (uint32_t event);
|
||||
uint32_t ESC_ALeventread (void);
|
||||
void ESC_ALeventmaskwrite (uint32_t mask);
|
||||
uint32_t ESC_ALeventmaskread (void);
|
||||
void ESC_ALstatus (uint8_t status);
|
||||
void ESC_SMstatus (uint8_t n);
|
||||
uint8_t ESC_WDstatus (void);
|
||||
|
@ -502,6 +532,7 @@ void ESC_stopinput (void);
|
|||
uint8_t ESC_startoutput (uint8_t state);
|
||||
void ESC_stopoutput (void);
|
||||
void ESC_state (void);
|
||||
void ESC_sm_act_event (void);
|
||||
|
||||
/* From hardware file */
|
||||
void ESC_read (uint16_t address, void *buf, uint16_t len);
|
||||
|
@ -516,6 +547,11 @@ extern uint8_t MBX[];
|
|||
extern _MBXcontrol MBXcontrol[];
|
||||
extern uint8_t MBXrun;
|
||||
extern uint16_t ESC_SM2_sml, ESC_SM3_sml;
|
||||
extern uint8_t dc_sync;
|
||||
extern int8_t sync_counter;
|
||||
extern uint16_t sync_counter_limit;
|
||||
extern uint16_t TXPDOsize;
|
||||
extern uint16_t RXPDOsize;
|
||||
|
||||
typedef struct
|
||||
{
|
||||
|
@ -528,4 +564,37 @@ typedef struct
|
|||
|
||||
extern _App App;
|
||||
|
||||
void DIG_process (uint8_t flags);
|
||||
|
||||
#define DIG_PROCESS_INPUTS_FLAG 0x01
|
||||
#define DIG_PROCESS_OUTPUTS_FLAG 0x02
|
||||
#define DIG_PROCESS_WD_FLAG 0x04
|
||||
#define DIG_PROCESS_APP_HOOK_FLAG 0x08
|
||||
|
||||
/* ATOMIC operations are used when running interrupt driven */
|
||||
#ifndef CC_ATOMIC_SET
|
||||
#define CC_ATOMIC_SET(var,val) (var = val)
|
||||
#endif
|
||||
|
||||
#ifndef CC_ATOMIC_GET
|
||||
#define CC_ATOMIC_GET(var) (var)
|
||||
#endif
|
||||
|
||||
#ifndef CC_ATOMIC_ADD
|
||||
#define CC_ATOMIC_ADD(var,val) (var += val)
|
||||
#endif
|
||||
|
||||
#ifndef CC_ATOMIC_SUB
|
||||
#define CC_ATOMIC_SUB(var,val) (var -= val)
|
||||
#endif
|
||||
|
||||
#ifndef CC_ATOMIC_AND
|
||||
#define CC_ATOMIC_AND(var,val) (var &= val)
|
||||
#endif
|
||||
|
||||
#ifndef CC_ATOMIC_OR
|
||||
#define CC_ATOMIC_OR(var,val) (var |= val)
|
||||
#endif
|
||||
|
||||
|
||||
#endif
|
||||
|
|
118
soes/esc_coe.c
118
soes/esc_coe.c
|
@ -61,6 +61,122 @@ int32_t SDO_findobject (uint16_t index)
|
|||
return n;
|
||||
}
|
||||
|
||||
/** Get the value for requested SDO 0x1C32 or 0x1C33 sub index
|
||||
*
|
||||
* @param[in] index = value on index of object we want to locate
|
||||
* @param[in] subindex = value on subindex of object we want to locate
|
||||
* @param[out] buf = buf to copy value to
|
||||
* @param[in] datatype = EtherCAT datatype of buf
|
||||
* @return 1 if value was found, else 0.
|
||||
*/
|
||||
int COE_getSyncMgrPara (uint16_t index, uint8_t subindex, void * buf, uint16_t datatype)
|
||||
{
|
||||
int result = 0;
|
||||
int32_t nidx;
|
||||
int32_t snidx;
|
||||
const _objd *objd;
|
||||
|
||||
nidx = SDO_findobject(index);
|
||||
|
||||
if(nidx < 0)
|
||||
{
|
||||
return result;
|
||||
}
|
||||
else if((index != 0x1c32) && (index != 0x1c33) && (index != 0x10F1))
|
||||
{
|
||||
return result;
|
||||
}
|
||||
|
||||
snidx = SDO_findsubindex(nidx, subindex);
|
||||
|
||||
if(snidx >= 0)
|
||||
{
|
||||
objd = SDOobjects[nidx].objdesc;
|
||||
|
||||
if((objd[snidx].data != NULL) &&
|
||||
(objd[snidx].datatype == datatype))
|
||||
{
|
||||
memcpy(buf, objd[snidx].data, objd[snidx].bitlength / 8 );
|
||||
result = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
if((datatype == DTYPE_UNSIGNED32) &&
|
||||
(objd[snidx].datatype == datatype))
|
||||
{
|
||||
*(uint32_t *)buf = objd[snidx].value;
|
||||
result = 1;
|
||||
}
|
||||
else if((datatype == DTYPE_UNSIGNED16) &&
|
||||
(objd[snidx].datatype == datatype))
|
||||
{
|
||||
*(uint16_t *)buf = (uint16_t)objd[snidx].value;
|
||||
result = 1;
|
||||
|
||||
}
|
||||
else if((datatype == DTYPE_UNSIGNED8) &&
|
||||
(objd[snidx].datatype == datatype))
|
||||
{
|
||||
*(uint8_t *)buf = (uint8_t)objd[snidx].value;
|
||||
result = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
/** Init default values for SDO Sync Objects
|
||||
*
|
||||
*/
|
||||
void COE_initDefaultSyncMgrPara (void)
|
||||
{
|
||||
uint32_t i,j;
|
||||
const _objd *objd;
|
||||
int32_t n = 0;
|
||||
|
||||
/* 1C3x */
|
||||
for(i = 0x1C32; i <= 0x1C33; i ++)
|
||||
{
|
||||
/* Look if index is present */
|
||||
n = SDO_findobject(i);
|
||||
if(n < 0)
|
||||
{
|
||||
continue;
|
||||
}
|
||||
|
||||
/* Load default values */
|
||||
objd = SDOobjects[n].objdesc;
|
||||
for(j = 1; j <= SDOobjects[n].maxsub; j++ )
|
||||
{
|
||||
if(objd[j].data != NULL)
|
||||
{
|
||||
*(uint32_t *)objd[j].data = objd[j].value;
|
||||
}
|
||||
if(objd[j].subindex >= SDOobjects[n].maxsub)
|
||||
{
|
||||
break;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/* Look if index is present */
|
||||
n = SDO_findobject(0x10F1);
|
||||
if(n >= 0)
|
||||
{
|
||||
/* Load default values */
|
||||
objd = SDOobjects[n].objdesc;
|
||||
for(j = 1; j <= objd[0].value; j++ )
|
||||
{
|
||||
if(objd[j].data != NULL)
|
||||
{
|
||||
*(uint32_t *)objd[j].data = objd[j].value;
|
||||
}
|
||||
}
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
/** Calculate the size in Bytes of RxPDO or TxPDOs by adding the objects
|
||||
* in SyncManager
|
||||
* SDO 1C1x.
|
||||
|
@ -443,6 +559,8 @@ void SDO_infoerror (uint32_t abortcode)
|
|||
coeres->infoheader.fragmentsleft = 0;
|
||||
coeres->index = htoel (abortcode);
|
||||
MBXcontrol[MBXout].state = MBXstate_outreq;
|
||||
MBXcontrol[0].state = MBXstate_idle;
|
||||
ESCvar.xoe = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -83,6 +83,8 @@ typedef struct CC_PACKED
|
|||
void ESC_coeprocess (void);
|
||||
uint16_t sizeOfPDO (uint16_t index);
|
||||
void SDO_abort (uint16_t index, uint8_t subindex, uint32_t abortcode);
|
||||
void COE_initDefaultSyncMgrPara (void);
|
||||
int COE_getSyncMgrPara (uint16_t index, uint8_t subindex, void * buf, uint16_t datatype);
|
||||
|
||||
extern void ESC_objecthandler (uint16_t index, uint8_t subindex);
|
||||
extern int ESC_pre_objecthandler (uint16_t index, uint8_t subindex);
|
||||
|
|
Loading…
Reference in New Issue