Fix initialization of lan9252 using bcm2835 spi
parent
984b202163
commit
2d795a0013
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@ -22,43 +22,47 @@
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#define ESC_CMD_SERIAL_WRITE 0x02
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#define ESC_CMD_SERIAL_READ 0x03
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#define ESC_CMD_FAST_READ 0x0B
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#define ESC_CMD_RESET_SQI 0xFF
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#define ESC_CMD_FAST_READ_DUMMY 1
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#define ESC_CMD_ADDR_INC BIT(6)
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#define ESC_CMD_RESET_CTL 0x01F8 // reset register
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#define ESC_CMD_HW_CFG 0x0074 // hardware configuration register
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#define ESC_CMD_BYTE_TEST 0x0064 // byte order test register
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#define ESC_CMD_ID_REV 0x0050 // chip ID and revision
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#define ESC_CMD_IRQ_CFG 0x0054 // interrupt configuration
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#define ESC_CMD_INT_EN 0x005C // interrupt enable
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#define ESC_PRAM_RD_FIFO_REG 0x000
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#define ESC_PRAM_WR_FIFO_REG 0x020
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#define ESC_PRAM_RD_ADDR_LEN_REG 0x308
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#define ESC_PRAM_RD_CMD_REG 0x30C
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#define ESC_PRAM_WR_ADDR_LEN_REG 0x310
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#define ESC_PRAM_WR_CMD_REG 0x314
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#define ESC_RESET_DIGITAL 0x00000001
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#define ESC_RESET_ETHERCAT 0x00000040
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#define ESC_RESET_CTRL_RST (ESC_RESET_DIGITAL & ESC_RESET_ETHERCAT)
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#define ESC_HW_CFG_READY 0x08000000
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#define ESC_BYTE_TEST_OK 0x87654321
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#define ESC_PRAM_CMD_BUSY BIT(31)
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#define ESC_PRAM_CMD_ABORT BIT(30)
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#define ESC_PRAM_RD_FIFO_REG 0x0000
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#define ESC_PRAM_WR_FIFO_REG 0x0020
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#define ESC_PRAM_RD_ADDR_LEN_REG 0x0308
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#define ESC_PRAM_RD_CMD_REG 0x030C
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#define ESC_PRAM_WR_ADDR_LEN_REG 0x0310
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#define ESC_PRAM_WR_CMD_REG 0x0314
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#define ESC_PRAM_CMD_BUSY 0x80000000
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#define ESC_PRAM_CMD_ABORT 0x40000000
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#define ESC_PRAM_CMD_AVAIL 0x00000001
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#define ESC_PRAM_CMD_CNT(x) ((x >> 8) & 0x1F)
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#define ESC_PRAM_CMD_AVAIL BIT(0)
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#define ESC_PRAM_SIZE(x) ((x) << 16)
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#define ESC_PRAM_ADDR(x) ((x) << 0)
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#define ESC_CSR_DATA_REG 0x300
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#define ESC_CSR_CMD_REG 0x304
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#define ESC_CSR_DATA_REG 0x0300
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#define ESC_CSR_CMD_REG 0x0304
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#define ESC_CSR_CMD_BUSY BIT(31)
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#define ESC_CSR_CMD_READ (BIT(31) | BIT(30))
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#define ESC_CSR_CMD_WRITE BIT(31)
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#define ESC_CSR_CMD_BUSY 0x80000000
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#define ESC_CSR_CMD_READ (0x80000000 | 0x40000000)
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#define ESC_CSR_CMD_WRITE 0x80000000
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#define ESC_CSR_CMD_SIZE(x) (x << 16)
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#define ESC_RESET_CTRL_REG 0x1F8
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#define ESC_RESET_CTRL_RST BIT(6)
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/* bcm2835 spi singel write */
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static void bcm2835_spi_write_32 (uint16_t address, uint32_t val)
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{
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uint8_t data[7];
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char data[7];
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data[0] = ESC_CMD_SERIAL_WRITE;
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data[1] = ((address >> 8) & 0xFF);
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@ -69,20 +73,20 @@ static void bcm2835_spi_write_32 (uint16_t address, uint32_t val)
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data[6] = ((val >> 24) & 0xFF);
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/* Write data */
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bcm2835_spi_transfern((char *)data, sizeof(data));
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bcm2835_spi_transfern(data, 7);
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}
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/* bcm2835 spi single read */
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static uint32_t bcm2835_spi_read_32 (uint32_t address)
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static uint32_t bcm2835_spi_read_32 (uint16_t address)
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{
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uint8_t data[7];
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char data[7];
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data[0] = ESC_CMD_SERIAL_READ;
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data[1] = ((address >>8) & 0xFF);
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data[1] = ((address >> 8) & 0xFF);
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data[2] = (address & 0xFF);
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/* Read data */
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bcm2835_spi_transfern((char *)data, sizeof(data));
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bcm2835_spi_transfern(data, 7);
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return ((data[6] << 24) |
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(data[5] << 16) |
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@ -424,32 +428,60 @@ void ESC_reset (void)
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void ESC_init (const esc_cfg_t * config)
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{
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uint32_t value;
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uint32_t counter = 0;
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uint32_t timeout = 1000; // wait 100msec
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if (bcm2835_init())
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{
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if (bcm2835_spi_begin())
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{
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bcm2835_spi_setBitOrder(BCM2835_SPI_BIT_ORDER_MSBFIRST); // Set SPI bit order
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bcm2835_spi_setDataMode(BCM2835_SPI_MODE0); // Set SPI data mode BCM2835_SPI_MODE0 = 0, CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge
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bcm2835_spi_setClockDivider(BCM2835_SPI_CLOCK_DIVIDER_16); // Set SPI clock speed BCM2835_SPI_CLOCK_DIVIDER_16 = 16, 16 = 64ns = 15.625MHz
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//bcm2835_spi_setClockDivider(BCM2835_SPI_CLOCK_DIVIDER_32); // Raspberry 4 due to a higher CPU speed this value is to change to: BCM2835_SPI_CLOCK_DIVIDER_32
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bcm2835_spi_chipSelect(BCM2835_SPI_CS_NONE); //Enable management of CS pin
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bcm2835_spi_setChipSelectPolarity(BCM2835_SPI_CS0, LOW); // enable CS0 and set polarity (for RPI_GPIO_P1_24)
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//bcm2835_spi_setChipSelectPolarity(BCM2835_SPI_CS1, LOW); // enable CS1 and set polarity (for RPI_GPIO_P1_26)
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bcm2835_spi_setBitOrder(BCM2835_SPI_BIT_ORDER_MSBFIRST); // Set SPI bit order
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bcm2835_spi_setDataMode(BCM2835_SPI_MODE0); // Set SPI data mode BCM2835_SPI_MODE0 = 0, CPOL = 0, CPHA = 0, Clock idle low, data is clocked in on rising edge, output data (change) on falling edge
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#ifdef RPI4
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bcm2835_spi_setClockDivider(BCM2835_SPI_CLOCK_DIVIDER_32); // Raspberry 4 due to a higher CPU speed this value is to change to: BCM2835_SPI_CLOCK_DIVIDER_32
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#else
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bcm2835_spi_setClockDivider(BCM2835_SPI_CLOCK_DIVIDER_16); // Set SPI clock speed BCM2835_SPI_CLOCK_DIVIDER_16 = 16, 16 = 64ns = 15.625MHz
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#endif
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bcm2835_spi_chipSelect(BCM2835_SPI_CS0); //Enable management of CS pin
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bcm2835_spi_setChipSelectPolarity(BCM2835_SPI_CS0, LOW); // enable CS0 and set polarity (for RPI_GPIO_P1_24)
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//bcm2835_spi_chipSelect(BCM2835_SPI_CS1); //Enable management of CS pin
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//bcm2835_spi_setChipSelectPolarity(BCM2835_SPI_CS1, LOW); // enable CS1 and set polarity (for RPI_GPIO_P1_26)
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//bcm2835_gpio_fsel(RPI_GPIO_P1_24, BCM2835_GPIO_FSEL_OUTP); // EtherC only?
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/* Reset the ecat core here due to evb-lan9252-digio not having any GPIO
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* for that purpose.
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*/
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bcm2835_spi_write_32(ESC_RESET_CTRL_REG,ESC_RESET_CTRL_RST);
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usleep (100000); // wait 100mS
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bcm2835_spi_write_32(ESC_CMD_RESET_CTL,ESC_RESET_CTRL_RST);
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do
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{
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value = bcm2835_spi_read_32(ESC_CSR_CMD_REG);
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} while(value & ESC_RESET_CTRL_RST);
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usleep(100);
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counter++;
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value = bcm2835_spi_read_32(ESC_CMD_RESET_CTL);
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} while ((value & ESC_RESET_CTRL_RST) && (counter < timeout));
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// Return SPI pins to default inputs state
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//bcm2835_spi_end(); // EtherC only?
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do
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{
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usleep(100);
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counter++;
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value = bcm2835_spi_read_32(ESC_CMD_BYTE_TEST);
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} while ((value != ESC_BYTE_TEST_OK) && (counter < timeout));
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do
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{
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usleep(100);
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counter++;
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value = bcm2835_spi_read_32(ESC_CMD_HW_CFG);
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} while (!(value & ESC_HW_CFG_READY) && (counter < timeout));
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if (counter < timeout) {
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value = bcm2835_spi_read_32(ESC_CMD_ID_REV); // read the chip identification and revision
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printf("Detected chip %x Rev %u \n", ((value >> 16) & 0xFFFF), (value & 0xFFFF));
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}
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else
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{
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printf("Timeout occurred during reset \n");
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bcm2835_spi_end();
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bcm2835_close();
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}
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}
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else
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{
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