ecat control latch input selection and ecat reset request (#56)

* ecat port control common register initialization
pull/67/head
Ilias Patsiaouras 2019-06-26 13:43:15 +02:00 committed by nakarlsson
parent 0f2959be46
commit 38099d31ed
1 changed files with 6 additions and 0 deletions

View File

@ -26,6 +26,7 @@
#define ECAT_MDO P0_12
#define ECAT_MCLK P3_3
#define ENABLE_ECAT_RESET_REQ 0U
#define ECAT_PORT_CTRL_LATCHIN0 XMC_ECAT_PORT_CTRL_LATCHIN0_P14_5
#define ECAT_PORT_CTRL_LATCHIN1 XMC_ECAT_PORT_CTRL_LATCHIN1_P14_4
#define ECAT_PHYADDR_OFFSET 0
@ -121,6 +122,7 @@
#define ECAT_MDO P0_12
#define ECAT_MCLK P3_3
#define ENABLE_ECAT_RESET_REQ 0U
#define ECAT_PORT_CTRL_LATCHIN0 XMC_ECAT_PORT_CTRL_LATCHIN0_P14_5
#define ECAT_PORT_CTRL_LATCHIN1 XMC_ECAT_PORT_CTRL_LATCHIN1_P14_4
#define ECAT_PHYADDR_OFFSET 0
@ -211,6 +213,10 @@
static const XMC_ECAT_PORT_CTRL_t port_control = {
.common = {
.enable_rstreq = ENABLE_ECAT_RESET_REQ,
.latch_input0 = ECAT_PORT_CTRL_LATCHIN0,
.latch_input1 = ECAT_PORT_CTRL_LATCHIN1,
.phyaddr_offset = ECAT_PHYADDR_OFFSET,
.mdio = ECAT_PORT_CTRL_MDIO
},
.port0 = {