pass AL event mask to interrupt worker function
parent
62772dd688
commit
6bb5aa643b
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@ -6,7 +6,7 @@ set(CMAKE_MODULE_PATH ${CMAKE_MODULE_PATH} "${CMAKE_SOURCE_DIR}/cmake")
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project (SOES)
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set (SOES_VERSION_MAJOR 2)
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set (SOES_VERSION_MINOR 0)
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set (SOES_VERSION_MINOR 1)
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set (SOES_VERSION_PATCH 0)
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# Generate version numbers
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@ -12,7 +12,7 @@ SOES is an EtherCAT slave stack written in c. Its purpose is to learn and
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to use. All users are invited to study the source to get an understanding
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how an EtherCAT slave functions.
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Features as of 2.0.0:
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Features as of 2.1.0:
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- Address offset based HAL for easy ESC read/write access via any
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interface
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- Mailbox with data link layer
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@ -156,7 +156,7 @@ void DIG_process (uint8_t flags)
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CC_ATOMIC_SET(watchdog, ESCvar.watchdogcnt);
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if(ESCvar.dcsync > 0)
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{
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CC_ATOMIC_ADD(ESCvar.synccounter,1);
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CC_ATOMIC_ADD(ESCvar.synccounter, 1);
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}
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/* Set outputs */
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cb_set_LEDgroup0();
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@ -174,7 +174,7 @@ void DIG_process (uint8_t flags)
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if((CC_ATOMIC_GET(ESCvar.App.state) & APPSTATE_OUTPUT) > 0)
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{
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CC_ATOMIC_SUB(ESCvar.synccounter,1);
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CC_ATOMIC_SUB(ESCvar.synccounter, 1);
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}
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if((ESCvar.dcsync > 0) &&
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@ -212,11 +212,11 @@ void DIG_process (uint8_t flags)
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}
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/**
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* ISR function. It should be called from ISR for applications entirely driven by
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* interrupts.
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* Read and handle events for the EtherCAT state, status, mailbox and eeprom.
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* Handler for SM change, SM0/1, AL CONTROL and EEPROM events, the application
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* control what interrupts that should be served and re-activated with
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* event mask argument
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*/
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void ecat_slv_isr (void)
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void ecat_slv_worker (uint32_t event_mask)
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{
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do
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{
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@ -239,15 +239,22 @@ void ecat_slv_isr (void)
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(ESCvar.esc_hw_eep_handler)();
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}
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CC_ATOMIC_SET(ESCvar.ALevent,ESC_ALeventread());
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CC_ATOMIC_SET(ESCvar.ALevent, ESC_ALeventread());
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}while(ESCvar.ALevent & (ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
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| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1 | ESCREG_ALEVENT_EEP));
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}while(ESCvar.ALevent & event_mask);
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ESC_ALeventmaskwrite(ESC_ALeventmaskread()
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| (ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
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| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1
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| ESCREG_ALEVENT_EEP));
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ESC_ALeventmaskwrite(ESC_ALeventmaskread() | event_mask);
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}
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/**
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* ISR function. It should be called from ISR for applications entirely driven by
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* interrupts.
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* Read and handle events for the EtherCAT state, status, mailbox and eeprom.
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*/
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void ecat_slv_isr (void)
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{
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ecat_slv_worker(ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
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| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1 | ESCREG_ALEVENT_EEP);
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}
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/**
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@ -37,11 +37,21 @@ void cb_post_write_variableRW(int subindex);
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*/
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void DIG_process (uint8_t flags);
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/**
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* Handler for SM change, SM0/1, AL CONTROL and EEPROM events, the application
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* control what interrupts that should be served and re-activated with
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* event mask argument
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*
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* @param[in] event_mask = Event mask for interrupts to serve and re-activate
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* after served
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*/
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void ecat_slv_worker (uint32_t event_mask);
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/**
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* ISR for SM0/1, EEPROM and AL CONTROL events in a SM/DC
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* synchronization application
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*/
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void ecat_slv_isr (void);
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CC_DEPRECATED void ecat_slv_isr (void);
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/**
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* Poll SM0/1, EEPROM and AL CONTROL events in a SM/DC synchronization
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@ -237,7 +237,8 @@ static void isr_run(void * arg)
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while(1)
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{
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sem_wait(ecat_isr_sem);
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ecat_slv_isr();
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ecat_slv_worker(ESCREG_ALEVENT_CONTROL | ESCREG_ALEVENT_SMCHANGE
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| ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1 | ESCREG_ALEVENT_EEP);
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}
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}
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@ -28,6 +28,8 @@ extern "C"
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#define CC_ASSERT(exp) assert (exp)
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#define CC_STATIC_ASSERT(exp) _Static_assert (exp, "")
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#define CC_DEPRECATED __attribute__((deprecated))
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#define CC_SWAP32(x) __builtin_bswap32 (x)
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#define CC_SWAP16(x) ((uint16_t)(x) >> 8 | ((uint16_t)(x) & 0xFF) << 8)
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