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SOES
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Only read SM Status and Activate in the dedicated function for that purpose

pull/41/head
rtlaka 2018-01-31 09:30:11 +01:00
parent 56a4dbf247
commit ba3716ba52
4 changed files with 14 additions and 22 deletions
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2
CMakeLists.txt
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@ -7,7 +7,7 @@ project (SOES)
set (SOES_VERSION_MAJOR 2)
set (SOES_VERSION_MINOR 1)
set (SOES_VERSION_PATCH 2)
set (SOES_VERSION_PATCH 3)
# Generate version numbers
configure_file (

2
README.md
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@ -12,7 +12,7 @@ SOES is an EtherCAT slave stack written in c. Its purpose is to learn and
to use. All users are invited to study the source to get an understanding
how an EtherCAT slave functions.
Features as of 2.1.2:
Feature list:
- Address offset based HAL for easy ESC read/write access via any
interface
- Mailbox with data link layer

30
soes/esc.c
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@ -86,15 +86,15 @@ uint32_t ESC_ALeventread (void)
return htoel(alevent);
}
/** Read SM Status register 0x805(+ offset to SyncManager n) to acknowledge a
/** Read SM Activate register 0x806(+ offset to SyncManager n) to acknowledge a
* Sync Manager event Bit 3 in ALevent. The result is not used.
*
* @param[in] n = Read Sync Manager no. n
*/
void ESC_SMack (uint8_t n)
{
uint16_t dummy;
ESC_read (ESCREG_SM0STATUS + (n << 3), &dummy, 2);
uint8_t dummy;
ESC_read (ESCREG_SM0ACTIVATE + (n << 3), &dummy, 1);
}
/** Read SM Status register 0x805(+ offset to SyncManager n) and save the
@ -105,18 +105,8 @@ void ESC_SMack (uint8_t n)
void ESC_SMstatus (uint8_t n)
{
_ESCsm2 *sm;
uint16_t temp;
sm = (_ESCsm2 *) & ESCvar.SM[n];
ESC_read (ESCREG_SM0STATUS + (n << 3), &temp, 2);
#if defined(EC_LITTLE_ENDIAN)
sm->ActESC = temp >> 8;
sm->Status = temp;
#endif
#if defined(EC_BIG_ENDIAN)
sm->ActESC = temp;
sm->Status = temp >> 8;
#endif
sm = (_ESCsm2 *)&ESCvar.SM[n];
ESC_read (ESCREG_SM0STATUS + (n << 3), &(sm->Status), 1);
}
/** Write ESCvar.SM[n] data to ESC PDI control register 0x807(+ offset to SyncManager n).
@ -126,7 +116,7 @@ void ESC_SMstatus (uint8_t n)
void ESC_SMwritepdi (uint8_t n)
{
_ESCsm2 *sm;
sm = (_ESCsm2 *) & ESCvar.SM[n];
sm = (_ESCsm2 *)&ESCvar.SM[n];
ESC_write (ESCREG_SM0PDI + (n << 3), &(sm->ActPDI), 1);
}
@ -137,7 +127,7 @@ void ESC_SMwritepdi (uint8_t n)
void ESC_SMenable (uint8_t n)
{
_ESCsm2 *sm;
sm = (_ESCsm2 *) & ESCvar.SM[n];
sm = (_ESCsm2 *)&ESCvar.SM[n];
sm->ActPDI &= ~ESCREG_SMENABLE_BIT;
ESC_SMwritepdi (n);
}
@ -148,7 +138,7 @@ void ESC_SMenable (uint8_t n)
void ESC_SMdisable (uint8_t n)
{
_ESCsm2 *sm;
sm = (_ESCsm2 *) & ESCvar.SM[n];
sm = (_ESCsm2 *)&ESCvar.SM[n];
sm->ActPDI |= ESCREG_SMENABLE_BIT;
ESC_SMwritepdi (n);
}
@ -545,8 +535,8 @@ uint8_t ESC_mbxprocess (void)
return 0;
}
/* SM0/1 access or SMn change event */
if (ESCvar.ALevent & ESCREG_ALEVENT_SM_MASK)
/* SM0/1 access */
if (ESCvar.ALevent & (ESCREG_ALEVENT_SM0 | ESCREG_ALEVENT_SM1))
{
ESC_SMstatus (0);
ESC_SMstatus (1);

2
soes/esc.h
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@ -36,11 +36,13 @@
#define ESCREG_EEDATA 0x0508
#define ESCREG_SM0 0x0800
#define ESCREG_SM0STATUS (ESCREG_SM0 + 5)
#define ESCREG_SM0ACTIVATE (ESCREG_SM0 + 6)
#define ESCREG_SM0PDI (ESCREG_SM0 + 7)
#define ESCREG_SM1 (ESCREG_SM0 + 0x08)
#define ESCREG_SM2 (ESCREG_SM0 + 0x10)
#define ESCREG_SM3 (ESCREG_SM0 + 0x18)
#define ESCREG_LOCALTIME 0x0910
#define ESCREG_LOCALTIME_OFFSET 0x0920
#define ESCREG_SYNC_ACT 0x0981
#define ESCREG_SYNC_ACT_ACTIVATED 0x01
#define ESCREG_SYNC_SYNC0_EN 0x02