Cedric Nugteren
f8fb707fa4
Merge pull request #297 from tyler-utah/master
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inline PTX to support subgroup shuffle for Nvidia GPUs
2018-07-23 19:43:03 +02:00
Tyler Sorensen
0772d63498
moved a two-line macro to a single line
2018-07-16 20:12:30 -04:00
Tyler Sorensen
f4e5b1c14c
forgot to add test cases back in, oops
2018-07-14 22:47:39 -04:00
Tyler Sorensen
7709a7308b
Applied feedback from Cedric from first pull request
2018-07-14 19:50:47 -04:00
Cedric Nugteren
f72620f474
Added tuning results for Intel i5-4970S
2018-07-13 21:25:21 +02:00
Cedric Nugteren
3621639b63
Added device-name removal code to handle POCL naming convention
2018-07-13 21:20:27 +02:00
Cedric Nugteren
08b1417956
Added tuning results for GeForce GTX 1070 Ti
2018-07-13 21:07:32 +02:00
Cedric Nugteren
c459582c4f
Added tuning results for HD Graphics 6000 Broadwell GT3
2018-07-13 21:05:43 +02:00
Tyler Sorensen
36093429fd
restored some of the changed tuning files for xgemm
2018-07-11 15:31:51 -04:00
Tyler Sorensen
7f2e98a140
added inline ptx to support shuffle on Nvidia GPUs
2018-07-11 15:12:22 -04:00
Alastair Murray
25661b2d6f
Eliminate a temporary Program object
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This was causing a crash for me because the temporary Program destructor called
clReleaseProgram on the cl_program with Program, and then clBuildProgram was
called on the same cl_program (belonging to the Program owned by the
shared_ptr, but it's the same cl_program).
2018-07-06 12:58:20 +01:00
Cedric Nugteren
e3eedacbcc
Disabled calls to clReleaseProgram under Windows to avoid segfaults when the OpenCL driver unloads first
2018-06-28 20:35:18 +09:00
Cedric Nugteren
bd1715aff9
Fixes for CUDA version of CLBlast
2018-06-03 10:41:57 +02:00
Cedric Nugteren
7c3431a72a
Fixes for Apple OpenCL CPU implementation which requires a LWGS of 1 when barriers are present
2018-06-01 20:59:44 +02:00
Cedric Nugteren
5702bff5ad
Added error-checking for half-empty local work group sizes; fixed a minor TRSV global worksize issue
2018-05-31 22:37:06 +02:00
Cedric Nugteren
e609220393
Some potential fixes for error -54 when launching TRSV and TRSM kernels
2018-05-31 20:09:49 +02:00
Cedric Nugteren
ff4d5558a6
Widened Apple OpenCL check, added way to debug too-large-workgroups issue
2018-05-30 22:59:04 +02:00
Cedric Nugteren
a8bb0c9f3c
Added Apple OpenCL TRSV block size override; removed failing old Intel GPU test from README
2018-05-29 21:29:12 +02:00
Cedric Nugteren
6616a59774
Merge pull request #287 from CNugteren/apple-opencl-limitations-fixes
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Apple opencl limitations for TRSV/TRSM now return not-implemented status
2018-05-27 20:54:27 +02:00
Cedric Nugteren
01d254c0b0
Added a check to return 'NotImplemented' error code in case of systems with < 16 LWGS for TSRV and TRSM
2018-05-27 18:38:47 +02:00
Cedric Nugteren
53198121ac
Made FillMatrix and FillVector functions take a configurable local workgroup size
2018-05-27 12:03:32 +02:00
Cedric Nugteren
c85c385aaf
Added an option in the clients to output timing statistics: minimum, mean, and standard-deviation
2018-05-23 22:36:38 +02:00
Cedric Nugteren
ba0b558e84
Added an option to run the routine tuner for a single specific GEMM size
2018-05-19 17:42:11 +02:00
Cedric Nugteren
76e0079a90
Fixed compilation issues
2018-05-19 14:18:23 +02:00
Cedric Nugteren
66583b3cda
The GEMM routine tuner now loads kernel JSON tuning results from disk if available; now run part of alltuners target
2018-05-19 12:48:59 +02:00
Cedric Nugteren
60d057c7fd
Merge branch 'master' into canary_buffer_overflow_protection
2018-05-18 21:30:11 +02:00
Cedric Nugteren
b855af681f
Added a canary region for overflow detection to the tuners
2018-05-17 10:45:10 +01:00
Cedric Nugteren
8258321a74
Now stores a shared_ptr to the Program class in the cache
2018-05-01 20:34:48 +02:00
Cedric Nugteren
b2248a17ae
Merge pull request #277 from CNugteren/CLBlast-257-intel-subgroups
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Intel subgroup shuffling
2018-04-29 15:48:35 +02:00
Cedric Nugteren
7b416c8686
Fixed an access violation when compiled with Visual Studio upon releasing the OpenCL program
2018-04-26 21:10:17 +02:00
Cedric Nugteren
2965b87dda
Added Intel subgroup shuffle support to the 2D register caching GEMM kernel
2018-04-24 21:32:42 +02:00
Cedric Nugteren
2b1e0295e6
Added a define to enable subgroup shuffling if supported by the device
2018-04-24 20:41:15 +02:00
Cedric Nugteren
3e3a26e0da
Fixes for the CUDA API
2018-04-20 21:50:36 +02:00
Cedric Nugteren
458e6717a9
Expressed HER2K as two HERK calls
2018-04-18 20:58:29 +02:00
Cedric Nugteren
dcce23d938
Expressed SYR2K as two SYRK calls
2018-04-18 20:29:28 +02:00
Cedric Nugteren
ef6b1207df
Updated HERK and SYRK to follow the GEMM style and functions to make it work with the new kernel
2018-04-17 21:13:28 +02:00
Cedric Nugteren
93610a9cba
Fixed some failing tests for GEMM and batched GEMM routines
2018-04-15 12:53:32 +02:00
Cedric Nugteren
f14e6f87d2
Updated tuning results for the Skylake ULT GT2 GPU with the new kernel
2018-04-15 11:45:45 +02:00
Cedric Nugteren
0dff7f1ac4
Made GEMM rotation expectations kernel-specific
2018-04-13 22:27:11 +02:00
Cedric Nugteren
0f49dd24e5
Updated database with defaults of GEMMK=0 and KREG=1
2018-04-10 21:26:18 +02:00
Cedric Nugteren
77ba11f686
Extended the maximum number of tuning parameters from 14 to 16
2018-04-08 18:12:54 +02:00
Cedric Nugteren
a93fec1026
Fixed issues with the pre-processor
2018-04-08 18:02:44 +02:00
Cedric Nugteren
7cbc6b7495
Merge branch 'master' into CLBlast-228-2d-register-gemm-kernel
2018-04-07 17:51:40 +02:00
Cedric Nugteren
16f7f49683
Added tuning results for NVIDIA GeForce 970
2018-04-07 17:48:25 +02:00
Cedric Nugteren
9596e46d01
Added tuning results for NVIDIA GeForce 920MX
2018-04-07 17:44:32 +02:00
Cedric Nugteren
048fe90e57
Added tuning results for Intel HD Graphics 620
2018-04-07 17:33:57 +02:00
Cedric Nugteren
3519d32ac4
Extended the GEMM tuner to be able to tune the new 'kernel 1'
2018-04-07 17:05:44 +02:00
Cedric Nugteren
381f1fe67a
Fixed a compilation issue for complex datatypes and vload
2018-04-07 16:57:36 +02:00
Cedric Nugteren
2a29dc061c
Fixed a compilation issue for complex datatypes and vload
2018-04-06 21:06:13 +02:00
Cedric Nugteren
eae25f5727
Added first version of 2D register tiling kernel with A and C transposed as well
2018-04-03 21:18:40 +02:00