2008-05-20 01:59:38 +02:00
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/*
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* Tiny Code Generator for QEMU
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*
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* Copyright (c) 2008 Fabrice Bellard
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* Copyright (c) 2008 Andrzej Zaborowski
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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2012-12-06 12:15:58 +01:00
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#ifndef TCG_TARGET_ARM
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2008-05-20 01:59:38 +02:00
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#define TCG_TARGET_ARM 1
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#undef TCG_TARGET_STACK_GROWSUP
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2014-04-24 23:23:40 +02:00
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#define TCG_TARGET_INSN_UNIT_SIZE 4
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2015-05-05 09:18:22 +02:00
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#define TCG_TARGET_TLB_DISPLACEMENT_BITS 16
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2008-05-20 01:59:38 +02:00
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2011-11-09 09:03:33 +01:00
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typedef enum {
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2008-05-20 01:59:38 +02:00
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TCG_REG_R0 = 0,
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TCG_REG_R1,
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TCG_REG_R2,
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TCG_REG_R3,
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TCG_REG_R4,
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TCG_REG_R5,
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TCG_REG_R6,
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TCG_REG_R7,
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TCG_REG_R8,
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TCG_REG_R9,
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TCG_REG_R10,
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TCG_REG_R11,
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TCG_REG_R12,
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TCG_REG_R13,
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TCG_REG_R14,
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2010-04-09 20:52:48 +02:00
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TCG_REG_PC,
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2011-11-09 09:03:33 +01:00
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} TCGReg;
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2008-05-20 01:59:38 +02:00
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2010-04-09 20:52:48 +02:00
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#define TCG_TARGET_NB_REGS 16
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2009-07-17 12:21:12 +02:00
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2013-05-02 13:18:38 +02:00
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#ifdef __ARM_ARCH_EXT_IDIV__
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#define use_idiv_instructions 1
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#else
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extern bool use_idiv_instructions;
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#endif
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2008-05-20 01:59:38 +02:00
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/* used for function call generation */
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2008-05-23 14:47:22 +02:00
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#define TCG_REG_CALL_STACK TCG_REG_R13
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#define TCG_TARGET_STACK_ALIGN 8
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2010-04-09 20:52:48 +02:00
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#define TCG_TARGET_CALL_ALIGN_ARGS 1
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2008-05-23 14:47:22 +02:00
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#define TCG_TARGET_CALL_STACK_OFFSET 0
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2008-05-20 01:59:38 +02:00
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2010-02-18 23:44:39 +01:00
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/* optional instructions */
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2011-08-17 23:11:46 +02:00
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#define TCG_TARGET_HAS_ext8s_i32 1
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#define TCG_TARGET_HAS_ext16s_i32 1
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#define TCG_TARGET_HAS_ext8u_i32 0 /* and r0, r1, #0xff */
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#define TCG_TARGET_HAS_ext16u_i32 1
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#define TCG_TARGET_HAS_bswap16_i32 1
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#define TCG_TARGET_HAS_bswap32_i32 1
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#define TCG_TARGET_HAS_not_i32 1
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#define TCG_TARGET_HAS_neg_i32 1
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#define TCG_TARGET_HAS_rot_i32 1
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#define TCG_TARGET_HAS_andc_i32 1
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#define TCG_TARGET_HAS_orc_i32 0
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#define TCG_TARGET_HAS_eqv_i32 0
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#define TCG_TARGET_HAS_nand_i32 0
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#define TCG_TARGET_HAS_nor_i32 0
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2013-03-05 06:12:30 +01:00
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#define TCG_TARGET_HAS_deposit_i32 1
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2012-09-26 20:48:55 +02:00
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#define TCG_TARGET_HAS_movcond_i32 1
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2014-03-26 18:59:14 +01:00
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#define TCG_TARGET_HAS_mulu2_i32 1
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2013-02-20 08:51:58 +01:00
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#define TCG_TARGET_HAS_muls2_i32 1
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2013-08-14 23:35:56 +02:00
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#define TCG_TARGET_HAS_muluh_i32 0
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#define TCG_TARGET_HAS_mulsh_i32 0
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2013-05-02 13:18:38 +02:00
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#define TCG_TARGET_HAS_div_i32 use_idiv_instructions
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2013-03-12 07:13:30 +01:00
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#define TCG_TARGET_HAS_rem_i32 0
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2013-03-12 06:11:30 +01:00
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2013-03-05 06:12:30 +01:00
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extern bool tcg_target_deposit_valid(int ofs, int len);
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#define TCG_TARGET_deposit_i32_valid tcg_target_deposit_valid
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2008-05-20 01:59:38 +02:00
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enum {
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2011-12-26 01:02:18 +01:00
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TCG_AREG0 = TCG_REG_R6,
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2008-05-20 01:59:38 +02:00
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};
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2013-08-20 23:22:50 +02:00
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static inline void flush_icache_range(uintptr_t start, uintptr_t stop)
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2008-05-20 01:59:38 +02:00
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{
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2008-12-01 03:02:37 +01:00
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#if QEMU_GNUC_PREREQ(4, 1)
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2009-07-17 12:21:12 +02:00
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__builtin___clear_cache((char *) start, (char *) stop);
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2008-12-01 03:02:37 +01:00
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#else
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2013-08-20 23:22:50 +02:00
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register uintptr_t _beg __asm("a1") = start;
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register uintptr_t _end __asm("a2") = stop;
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register uintptr_t _flg __asm("a3") = 0;
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2008-05-20 01:59:38 +02:00
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__asm __volatile__ ("swi 0x9f0002" : : "r" (_beg), "r" (_end), "r" (_flg));
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2008-12-01 03:02:37 +01:00
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#endif
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2008-05-20 01:59:38 +02:00
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}
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2012-12-06 12:15:58 +01:00
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#endif
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