target/mips: Mark switch fallthroughs with interpretable comments

Mark switch fallthroughs with comments, in cases fallthroughs
are intentional.

The comments "/* fall through */" are interpreted by compilers and
other tools, and they will not issue warnings in such cases. For gcc,
the warning is turnend on by -Wimplicit-fallthrough. With this patch,
there will be no such warnings in target/mips directory. If such
warning appears in future, it should be checked if it is intentional,
and, if yes, marked with a comment similar to those from this patch.

The comment must be just before next "case", otherwise gcc won't
understand it.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Signed-off-by: Stefan Markovic <smarkovic@wavecomp.com>
This commit is contained in:
Aleksandar Markovic 2018-08-02 16:15:50 +02:00
parent c38a1d5223
commit 146dd620db

View file

@ -14290,8 +14290,8 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
case SDP:
check_insn(ctx, ISA_MIPS3);
check_mips_64(ctx);
/* Fallthrough */
#endif
/* fall through */
case LWP:
case SWP:
gen_ldst_pair(ctx, minor, rt, rs, SIMM(ctx->opcode, 0, 12));
@ -14301,8 +14301,8 @@ static void decode_micromips32_opc(CPUMIPSState *env, DisasContext *ctx)
case SDM:
check_insn(ctx, ISA_MIPS3);
check_mips_64(ctx);
/* Fallthrough */
#endif
/* fall through */
case LWM32:
case SWM32:
gen_ldst_multiple(ctx, minor, rt, rs, SIMM(ctx->opcode, 0, 12));
@ -20087,6 +20087,7 @@ static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
case OPC_MTHC1:
check_cp1_enabled(ctx);
check_insn(ctx, ISA_MIPS32R2);
/* fall through */
case OPC_MFC1:
case OPC_CFC1:
case OPC_MTC1: