target-arm: Expose output GPIO line for VCPU maintenance interrupt
The GICv3 support for virtualization includes an outbound maintenance interrupt signal which is asserted when the CPU interface wants to signal to the hypervisor that it needs attention. Expose this as an outbound GPIO line from the CPU object which can be wired up as a physical interrupt line by the board code (as we do already for the CPU timers). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alistair Francis <alistair.francis@xilinx.com> Message-id: 1483977924-14522-4-git-send-email-peter.maydell@linaro.org
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@ -465,6 +465,9 @@ static void arm_cpu_initfn(Object *obj)
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arm_gt_stimer_cb, cpu);
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qdev_init_gpio_out(DEVICE(cpu), cpu->gt_timer_outputs,
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ARRAY_SIZE(cpu->gt_timer_outputs));
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qdev_init_gpio_out_named(DEVICE(cpu), &cpu->gicv3_maintenance_interrupt,
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"gicv3-maintenance-interrupt", 1);
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#endif
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/* DTB consumers generally don't in fact care what the 'compatible'
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@ -558,6 +558,8 @@ struct ARMCPU {
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QEMUTimer *gt_timer[NUM_GTIMERS];
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/* GPIO outputs for generic timer */
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qemu_irq gt_timer_outputs[NUM_GTIMERS];
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/* GPIO output for GICv3 maintenance interrupt signal */
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qemu_irq gicv3_maintenance_interrupt;
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/* MemoryRegion to use for secure physical accesses */
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MemoryRegion *secure_memory;
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