target/ppc: add mcrxrx instruction
mcrxrx: Move to CR from XER Extended Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
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@ -3819,6 +3819,28 @@ static void gen_mcrxr(DisasContext *ctx)
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tcg_gen_movi_tl(cpu_ca, 0);
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}
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#ifdef TARGET_PPC64
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/* mcrxrx */
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static void gen_mcrxrx(DisasContext *ctx)
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{
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TCGv t0 = tcg_temp_new();
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TCGv t1 = tcg_temp_new();
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TCGv_i32 dst = cpu_crf[crfD(ctx->opcode)];
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/* copy OV and OV32 */
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tcg_gen_shli_tl(t0, cpu_ov, 1);
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tcg_gen_or_tl(t0, t0, cpu_ov32);
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tcg_gen_shli_tl(t0, t0, 2);
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/* copy CA and CA32 */
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tcg_gen_shli_tl(t1, cpu_ca, 1);
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tcg_gen_or_tl(t1, t1, cpu_ca32);
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tcg_gen_or_tl(t0, t0, t1);
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tcg_gen_trunc_tl_i32(dst, t0);
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tcg_temp_free(t0);
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tcg_temp_free(t1);
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}
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#endif
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/* mfcr mfocrf */
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static void gen_mfcr(DisasContext *ctx)
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{
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@ -6488,6 +6510,7 @@ GEN_HANDLER(mtcrf, 0x1F, 0x10, 0x04, 0x00000801, PPC_MISC),
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#if defined(TARGET_PPC64)
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GEN_HANDLER(mtmsrd, 0x1F, 0x12, 0x05, 0x001EF801, PPC_64B),
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GEN_HANDLER_E(setb, 0x1F, 0x00, 0x04, 0x0003F801, PPC_NONE, PPC2_ISA300),
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GEN_HANDLER_E(mcrxrx, 0x1F, 0x00, 0x12, 0x007FF801, PPC_NONE, PPC2_ISA300),
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#endif
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GEN_HANDLER(mtmsr, 0x1F, 0x12, 0x04, 0x001EF801, PPC_MISC),
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GEN_HANDLER(mtspr, 0x1F, 0x13, 0x0E, 0x00000000, PPC_MISC),
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