mainstone: pass one irq to the mst_fpga instead of the whole PIC
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
This commit is contained in:
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21c75ddbf9
commit
bb70651e45
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@ -117,7 +117,7 @@ static void mainstone_common_init(ram_addr_t ram_size,
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}
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}
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}
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}
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mst_irq = mst_irq_init(cpu, MST_FPGA_PHYS, PXA2XX_PIC_GPIO_0);
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mst_irq = mst_irq_init(MST_FPGA_PHYS, cpu->pic[PXA2XX_PIC_GPIO_0]);
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/* setup keypad */
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/* setup keypad */
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printf("map addr %p\n", &map);
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printf("map addr %p\n", &map);
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@ -33,6 +33,6 @@
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#define S1_IRQ 15
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#define S1_IRQ 15
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extern qemu_irq
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extern qemu_irq
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*mst_irq_init(PXA2xxState *cpu, uint32_t base, int irq);
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*mst_irq_init(uint32_t base, qemu_irq irq);
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#endif /* __MAINSTONE_H__ */
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#endif /* __MAINSTONE_H__ */
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@ -28,7 +28,7 @@
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#define MST_PCMCIA1 0xe4
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#define MST_PCMCIA1 0xe4
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typedef struct mst_irq_state{
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typedef struct mst_irq_state{
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qemu_irq *parent;
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qemu_irq parent;
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qemu_irq *pins;
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qemu_irq *pins;
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uint32_t prev_level;
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uint32_t prev_level;
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@ -72,7 +72,7 @@ mst_fpga_set_irq(void *opaque, int irq, int level)
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if(s->intmskena & (1u << irq)) {
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if(s->intmskena & (1u << irq)) {
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s->intsetclr = 1u << irq;
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s->intsetclr = 1u << irq;
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qemu_set_irq(s->parent[0], level);
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qemu_set_irq(s->parent, level);
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}
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}
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}
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}
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@ -109,7 +109,7 @@ mst_fpga_readb(void *opaque, target_phys_addr_t addr)
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return s->pcmcia1;
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return s->pcmcia1;
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default:
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default:
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printf("Mainstone - mst_fpga_readb: Bad register offset "
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printf("Mainstone - mst_fpga_readb: Bad register offset "
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REG_FMT " \n", addr);
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"0x" TARGET_FMT_plx " \n", addr);
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}
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}
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return 0;
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return 0;
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}
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}
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@ -160,7 +160,7 @@ mst_fpga_writeb(void *opaque, target_phys_addr_t addr, uint32_t value)
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break;
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break;
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default:
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default:
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printf("Mainstone - mst_fpga_writeb: Bad register offset "
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printf("Mainstone - mst_fpga_writeb: Bad register offset "
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REG_FMT " \n", addr);
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"0x" TARGET_FMT_plx " \n", addr);
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}
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}
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}
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}
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@ -216,7 +216,7 @@ mst_fpga_load(QEMUFile *f, void *opaque, int version_id)
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return 0;
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return 0;
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}
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}
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qemu_irq *mst_irq_init(PXA2xxState *cpu, uint32_t base, int irq)
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qemu_irq *mst_irq_init(uint32_t base, qemu_irq irq)
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{
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{
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mst_irq_state *s;
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mst_irq_state *s;
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int iomemtype;
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int iomemtype;
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@ -225,7 +225,7 @@ qemu_irq *mst_irq_init(PXA2xxState *cpu, uint32_t base, int irq)
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s = (mst_irq_state *)
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s = (mst_irq_state *)
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qemu_mallocz(sizeof(mst_irq_state));
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qemu_mallocz(sizeof(mst_irq_state));
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s->parent = &cpu->pic[irq];
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s->parent = irq;
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/* alloc the external 16 irqs */
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/* alloc the external 16 irqs */
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qi = qemu_allocate_irqs(mst_fpga_set_irq, s, MST_NUM_IRQS);
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qi = qemu_allocate_irqs(mst_fpga_set_irq, s, MST_NUM_IRQS);
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